Mesa: Mesa 7.7-devel DEBUG build Sep 21 2009 17:07:04 r300NewTextureObject( 0x9a26af8 (target = GL_TEXTURE_2D_ARRAY_EXT) ) r300NewTextureObject( 0x9a22858 (target = GL_TEXTURE_1D_ARRAY_EXT) ) r300NewTextureObject( 0x9a22ad0 (target = GL_TEXTURE_CUBE_MAP) ) r300NewTextureObject( 0x9a22d48 (target = GL_TEXTURE_3D) ) r300NewTextureObject( 0x9a22fc0 (target = GL_TEXTURE_RECTANGLE_ARB) ) r300NewTextureObject( 0x9a23238 (target = GL_TEXTURE_2D) ) r300NewTextureObject( 0x9af2170 (target = GL_TEXTURE_1D) ) r300NewTextureObject( 0x9b08ef8 (target = GL_TEXTURE_1D) ) r300NewTextureObject( 0x9b09170 (target = GL_TEXTURE_2D) ) r300NewTextureObject( 0x9b093e8 (target = GL_TEXTURE_3D) ) r300NewTextureObject( 0x9b09660 (target = GL_TEXTURE_CUBE_MAP) ) r300NewTextureObject( 0x9b098d8 (target = GL_TEXTURE_RECTANGLE_ARB) ) r300NewTextureObject( 0x9b09b50 (target = GL_TEXTURE_1D_ARRAY_EXT) ) r300NewTextureObject( 0x9b09dc8 (target = GL_TEXTURE_2D_ARRAY_EXT) ) Mesa warning: software DXTn compression/decompression available Using 8 maximum texture units.. sizeof(drm_r300_cmd_header_t)=4 sizeof(drm_radeon_cmd_buffer_t)=16 Allocating 65536 bytes command buffer (max state is 25984 bytes) r300ResetHwState r300Enable( GL_DEPTH_TEST = GL_FALSE ) r300Enable( GL_STENCIL_TEST = GL_FALSE ) r300Enable( GL_ALPHA_TEST = GL_FALSE ) r300Enable( GL_POLYGON_OFFSET_POINT = GL_FALSE ) r300Enable( GL_POLYGON_OFFSET_LINE = GL_FALSE ) r300Enable( GL_POLYGON_OFFSET_FILL = GL_FALSE ) radeonMakeCurrent ctx 0x9ad5f68 dfb 0x9e249f0 rfb 0x9e249f0 r300Enable( GL_DEPTH_TEST = GL_FALSE ) r300Enable( GL_STENCIL_TEST = GL_FALSE ) r300Enable( GL_DEPTH_TEST = GL_FALSE ) r300Enable( GL_STENCIL_TEST = GL_FALSE ) End radeonMakeCurrent radeonMakeCurrent ctx 0x9ad5f68 dfb 0x9e249f0 rfb 0x9e249f0 r300Enable( GL_DEPTH_TEST = GL_FALSE ) r300Enable( GL_STENCIL_TEST = GL_FALSE ) r300Enable( GL_DEPTH_TEST = GL_FALSE ) r300Enable( GL_STENCIL_TEST = GL_FALSE ) End radeonMakeCurrent r300Clear r300Enable( GL_DEPTH_TEST = GL_FALSE ) r300Enable( GL_STENCIL_TEST = GL_FALSE ) Reemit state after flush (from r300EmitClearState) radeonEmitState Begin reemit state BEGIN_BATCH(1) at 0, from cp_wait:185 BEGIN_BATCH(2) at 1, from r300_vtbl_pre_emit_atoms:222 BEGIN_BATCH(1) at 3, from end_3d:162 emit vpt 7/7 BEGIN_BATCH(7) at 4, from radeon_emit_atom:1038 emit vap_cntl 4/4 BEGIN_BATCH(4) at 11, from radeon_emit_atom:1038 emit vap_index_offset 2/2 BEGIN_BATCH(2) at 15, from radeon_emit_atom:1038 emit vte 3/3 BEGIN_BATCH(3) at 17, from radeon_emit_atom:1038 emit vap_vf_max_vtx_indx 3/3 BEGIN_BATCH(3) at 20, from radeon_emit_atom:1038 emit vap_cntl_status 2/2 BEGIN_BATCH(2) at 23, from radeon_emit_atom:1038 emit vir[0] 2/9 BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038 emit vir[1] 2/9 BEGIN_BATCH(2) at 27, from radeon_emit_atom:1038 emit vic 3/3 BEGIN_BATCH(3) at 29, from radeon_emit_atom:1038 emit vap_psc_sgn_norm_cntl 2/2 BEGIN_BATCH(2) at 32, from radeon_emit_atom:1038 emit vap_clip_cntl 2/2 BEGIN_BATCH(2) at 34, from radeon_emit_atom:1038 emit vap_clip 5/5 BEGIN_BATCH(5) at 36, from radeon_emit_atom:1038 emit vap_pvs_vtx_timeout_reg 2/2 BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038 emit vof 3/3 BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038 emit pvs 4/4 BEGIN_BATCH(4) at 46, from radeon_emit_atom:1038 emit gb_enable 2/2 BEGIN_BATCH(2) at 50, from radeon_emit_atom:1038 emit gb_misc 4/4 BEGIN_BATCH(4) at 52, from radeon_emit_atom:1038 emit gb_misc2 3/3 BEGIN_BATCH(3) at 56, from radeon_emit_atom:1038 emit txe 2/2 BEGIN_BATCH(2) at 59, from radeon_emit_atom:1038 emit ga_point_s0 5/5 BEGIN_BATCH(5) at 61, from radeon_emit_atom:1038 emit ga_triangle_stipple 2/2 BEGIN_BATCH(2) at 66, from radeon_emit_atom:1038 emit ps 2/2 BEGIN_BATCH(2) at 68, from radeon_emit_atom:1038 emit ga_point_minmax 4/4 BEGIN_BATCH(4) at 70, from radeon_emit_atom:1038 emit lcntl 2/2 BEGIN_BATCH(2) at 74, from radeon_emit_atom:1038 emit ga_line_stipple 4/4 BEGIN_BATCH(4) at 76, from radeon_emit_atom:1038 emit shade 2/2 BEGIN_BATCH(2) at 80, from radeon_emit_atom:1038 emit shade2 4/4 BEGIN_BATCH(4) at 82, from radeon_emit_atom:1038 emit polygon_mode 4/4 BEGIN_BATCH(4) at 86, from radeon_emit_atom:1038 emit fogp 3/3 BEGIN_BATCH(3) at 90, from radeon_emit_atom:1038 emit zbias_cntl 2/2 BEGIN_BATCH(2) at 93, from radeon_emit_atom:1038 emit zbs 5/5 BEGIN_BATCH(5) at 95, from radeon_emit_atom:1038 emit occlusion_cntl 2/2 BEGIN_BATCH(2) at 100, from radeon_emit_atom:1038 emit cul 2/2 BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038 emit su_depth_scale 3/3 BEGIN_BATCH(3) at 104, from radeon_emit_atom:1038 emit rc 3/3 BEGIN_BATCH(3) at 107, from radeon_emit_atom:1038 emit ri 17/17 BEGIN_BATCH(17) at 110, from radeon_emit_atom:1038 emit rr 2/9 BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038 emit sc_hyperz 3/3 BEGIN_BATCH(3) at 129, from radeon_emit_atom:1038 emit sc_screendoor 2/2 BEGIN_BATCH(2) at 132, from radeon_emit_atom:1038 emit us_out_fmt 6/6 BEGIN_BATCH(6) at 134, from radeon_emit_atom:1038 emit fp 9/9 BEGIN_BATCH(9) at 140, from radeon_emit_atom:1038 skip state r500fp skip state r500fp_const emit fogs 2/2 BEGIN_BATCH(2) at 149, from radeon_emit_atom:1038 emit fogc 4/4 BEGIN_BATCH(4) at 151, from radeon_emit_atom:1038 emit at 3/3 BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038 emit fg_depth_src 2/2 BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038 emit rb3d_cctl 2/2 BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038 emit bld 3/3 BEGIN_BATCH(3) at 162, from radeon_emit_atom:1038 emit cmk 2/2 BEGIN_BATCH(2) at 165, from radeon_emit_atom:1038 emit blend_color 3/3 BEGIN_BATCH(3) at 167, from radeon_emit_atom:1038 emit rop 2/2 BEGIN_BATCH(2) at 170, from radeon_emit_atom:1038 emit cb 6/4 rrb is 0x9e24df8 0 800x600 BEGIN_BATCH(6) at 172, from emit_cb_offset:299 emit rb3d_dither_ctl 10/10 BEGIN_BATCH(10) at 176, from radeon_emit_atom:1038 emit rb3d_aaresolve_ctl 2/2 BEGIN_BATCH(2) at 186, from radeon_emit_atom:1038 emit rb3d_discard_src_pixel_lte_threshold 3/3 BEGIN_BATCH(3) at 188, from radeon_emit_atom:1038 emit zs 4/4 BEGIN_BATCH(4) at 191, from radeon_emit_atom:1038 skip state zsb emit zstencil_format 5/5 BEGIN_BATCH(5) at 195, from emit_zstencil_format:411 emit zb 6/3 BEGIN_BATCH(6) at 200, from emit_zb_offset:383 emit zb_depthclearvalue 2/2 BEGIN_BATCH(2) at 204, from radeon_emit_atom:1038 emit zb_zmask 3/3 BEGIN_BATCH(3) at 206, from radeon_emit_atom:1038 emit zb_hiz_offset 2/2 BEGIN_BATCH(2) at 209, from radeon_emit_atom:1038 emit zb_hiz_pitch 2/2 BEGIN_BATCH(2) at 211, from radeon_emit_atom:1038 skip state vap_flush skip state vpi skip state vpp emit vps 5/5 BEGIN_BATCH(5) at 213, from radeon_emit_atom:1038 emit vpucp[i] 5/5 BEGIN_BATCH(5) at 218, from radeon_emit_atom:1038 emit vpucp[i] 5/5 BEGIN_BATCH(5) at 223, from radeon_emit_atom:1038 emit vpucp[i] 5/5 BEGIN_BATCH(5) at 228, from radeon_emit_atom:1038 emit vpucp[i] 5/5 BEGIN_BATCH(5) at 233, from radeon_emit_atom:1038 emit vpucp[i] 5/5 BEGIN_BATCH(5) at 238, from radeon_emit_atom:1038 emit vpucp[i] 5/5 BEGIN_BATCH(5) at 243, from radeon_emit_atom:1038 skip state tex.filter skip state tex.filter_1 skip state tex.size skip state tex.format skip state tex.pitch skip state tex.offset skip state tex.chroma_key skip state tex.border_color skip state queryobj BEGIN_BATCH(31) at 248, from r300EmitClearState:301 BEGIN_BATCH(2) at 279, from r300EmitClearState:377 BEGIN_BATCH(2) at 281, from r300EmitClearState:382 BEGIN_BATCH(14) at 283, from r300EmitClearState:409 BEGIN_BATCH(7) at 297, from r300EmitClearState:460 BEGIN_BATCH(7) at 304, from r300EmitClearState:514 BEGIN_BATCH(2) at 311, from r300EmitClearState:521 BEGIN_BATCH(2) at 313, from r300EmitClearState:554 BEGIN_BATCH(4) at 315, from r300EmitClearState:565 BEGIN_BATCH(9) at 319, from r300EmitClearState:612 r300ClearBuffer: buffer 0x9e24df8 (445,255 800x600) BEGIN_BATCH(1) at 328, from cp_wait:185 BEGIN_BATCH(1) at 329, from end_3d:162 BEGIN_BATCH(6) at 330, from r300ClearBuffer:164 BEGIN_BATCH(6) at 334, from r300ClearBuffer:190 BEGIN_BATCH(9) at 340, from r300ClearBuffer:237 BEGIN_BATCH(4) at 349, from r300EmitCacheFlush:131 BEGIN_BATCH(1) at 353, from cp_wait:185 radeonFlush 354 radeonEmitState Begin dirty state BEGIN_BATCH(1) at 354, from cp_wait:185 BEGIN_BATCH(2) at 355, from r300_vtbl_pre_emit_atoms:222 BEGIN_BATCH(1) at 357, from end_3d:162 emit vpt 7/7 BEGIN_BATCH(7) at 358, from radeon_emit_atom:1038 emit vap_cntl 4/4 BEGIN_BATCH(4) at 365, from radeon_emit_atom:1038 emit vte 3/3 BEGIN_BATCH(3) at 369, from radeon_emit_atom:1038 emit vir[0] 2/9 BEGIN_BATCH(2) at 372, from radeon_emit_atom:1038 emit vir[1] 2/9 BEGIN_BATCH(2) at 374, from radeon_emit_atom:1038 emit vic 3/3 BEGIN_BATCH(3) at 376, from radeon_emit_atom:1038 emit vap_clip_cntl 2/2 BEGIN_BATCH(2) at 379, from radeon_emit_atom:1038 emit vof 3/3 BEGIN_BATCH(3) at 381, from radeon_emit_atom:1038 emit pvs 4/4 BEGIN_BATCH(4) at 384, from radeon_emit_atom:1038 emit txe 2/2 BEGIN_BATCH(2) at 388, from radeon_emit_atom:1038 emit ps 2/2 BEGIN_BATCH(2) at 390, from radeon_emit_atom:1038 emit rc 3/3 BEGIN_BATCH(3) at 392, from radeon_emit_atom:1038 emit ri 17/17 BEGIN_BATCH(17) at 395, from radeon_emit_atom:1038 emit rr 2/9 BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038 emit fp 9/9 BEGIN_BATCH(9) at 414, from radeon_emit_atom:1038 skip state r500fp emit fogs 2/2 BEGIN_BATCH(2) at 423, from radeon_emit_atom:1038 emit at 3/3 BEGIN_BATCH(3) at 425, from radeon_emit_atom:1038 emit bld 3/3 BEGIN_BATCH(3) at 428, from radeon_emit_atom:1038 emit cmk 2/2 BEGIN_BATCH(2) at 431, from radeon_emit_atom:1038 emit cb 6/4 rrb is 0x9e24df8 0 800x600 BEGIN_BATCH(6) at 433, from emit_cb_offset:299 emit zs 4/4 BEGIN_BATCH(4) at 437, from radeon_emit_atom:1038 skip state vap_flush skip state vpi radeonReleaseDmaRegions: free 0, wait 0, reserved 0, minimum_size: 65536 rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects radeonFlush 0 radeonCopyBuffer( 0x9ad5f68 ) r300Clear Reemit state after flush (from r300EmitClearState) radeonEmitState Begin reemit state BEGIN_BATCH(1) at 0, from cp_wait:185 BEGIN_BATCH(2) at 1, from r300_vtbl_pre_emit_atoms:222 BEGIN_BATCH(1) at 3, from end_3d:162 emit vpt 7/7 BEGIN_BATCH(7) at 4, from radeon_emit_atom:1038 emit vap_cntl 4/4 BEGIN_BATCH(4) at 11, from radeon_emit_atom:1038 emit vap_index_offset 2/2 BEGIN_BATCH(2) at 15, from radeon_emit_atom:1038 emit vte 3/3 BEGIN_BATCH(3) at 17, from radeon_emit_atom:1038 emit vap_vf_max_vtx_indx 3/3 BEGIN_BATCH(3) at 20, from radeon_emit_atom:1038 emit vap_cntl_status 2/2 BEGIN_BATCH(2) at 23, from radeon_emit_atom:1038 emit vir[0] 2/9 BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038 emit vir[1] 2/9 BEGIN_BATCH(2) at 27, from radeon_emit_atom:1038 emit vic 3/3 BEGIN_BATCH(3) at 29, from radeon_emit_atom:1038 emit vap_psc_sgn_norm_cntl 2/2 BEGIN_BATCH(2) at 32, from radeon_emit_atom:1038 emit vap_clip_cntl 2/2 BEGIN_BATCH(2) at 34, from radeon_emit_atom:1038 emit vap_clip 5/5 BEGIN_BATCH(5) at 36, from radeon_emit_atom:1038 emit vap_pvs_vtx_timeout_reg 2/2 BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038 emit vof 3/3 BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038 emit pvs 4/4 BEGIN_BATCH(4) at 46, from radeon_emit_atom:1038 emit gb_enable 2/2 BEGIN_BATCH(2) at 50, from radeon_emit_atom:1038 emit gb_misc 4/4 BEGIN_BATCH(4) at 52, from radeon_emit_atom:1038 emit gb_misc2 3/3 BEGIN_BATCH(3) at 56, from radeon_emit_atom:1038 emit txe 2/2 BEGIN_BATCH(2) at 59, from radeon_emit_atom:1038 emit ga_point_s0 5/5 BEGIN_BATCH(5) at 61, from radeon_emit_atom:1038 emit ga_triangle_stipple 2/2 BEGIN_BATCH(2) at 66, from radeon_emit_atom:1038 emit ps 2/2 BEGIN_BATCH(2) at 68, from radeon_emit_atom:1038 emit ga_point_minmax 4/4 BEGIN_BATCH(4) at 70, from radeon_emit_atom:1038 emit lcntl 2/2 BEGIN_BATCH(2) at 74, from radeon_emit_atom:1038 emit ga_line_stipple 4/4 BEGIN_BATCH(4) at 76, from radeon_emit_atom:1038 emit shade 2/2 BEGIN_BATCH(2) at 80, from radeon_emit_atom:1038 emit shade2 4/4 BEGIN_BATCH(4) at 82, from radeon_emit_atom:1038 emit polygon_mode 4/4 BEGIN_BATCH(4) at 86, from radeon_emit_atom:1038 emit fogp 3/3 BEGIN_BATCH(3) at 90, from radeon_emit_atom:1038 emit zbias_cntl 2/2 BEGIN_BATCH(2) at 93, from radeon_emit_atom:1038 emit zbs 5/5 BEGIN_BATCH(5) at 95, from radeon_emit_atom:1038 emit occlusion_cntl 2/2 BEGIN_BATCH(2) at 100, from radeon_emit_atom:1038 emit cul 2/2 BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038 emit su_depth_scale 3/3 BEGIN_BATCH(3) at 104, from radeon_emit_atom:1038 emit rc 3/3 BEGIN_BATCH(3) at 107, from radeon_emit_atom:1038 emit ri 17/17 BEGIN_BATCH(17) at 110, from radeon_emit_atom:1038 emit rr 2/9 BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038 emit sc_hyperz 3/3 BEGIN_BATCH(3) at 129, from radeon_emit_atom:1038 emit sc_screendoor 2/2 BEGIN_BATCH(2) at 132, from radeon_emit_atom:1038 emit us_out_fmt 6/6 BEGIN_BATCH(6) at 134, from radeon_emit_atom:1038 emit fp 9/9 BEGIN_BATCH(9) at 140, from radeon_emit_atom:1038 skip state r500fp skip state r500fp_const emit fogs 2/2 BEGIN_BATCH(2) at 149, from radeon_emit_atom:1038 emit fogc 4/4 BEGIN_BATCH(4) at 151, from radeon_emit_atom:1038 emit at 3/3 BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038 emit fg_depth_src 2/2 BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038 emit rb3d_cctl 2/2 BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038 emit bld 3/3 BEGIN_BATCH(3) at 162, from radeon_emit_atom:1038 emit cmk 2/2 BEGIN_BATCH(2) at 165, from radeon_emit_atom:1038 emit blend_color 3/3 BEGIN_BATCH(3) at 167, from radeon_emit_atom:1038 emit rop 2/2 BEGIN_BATCH(2) at 170, from radeon_emit_atom:1038 emit cb 6/4 rrb is 0x9e24df8 0 800x600 BEGIN_BATCH(6) at 172, from emit_cb_offset:299 emit rb3d_dither_ctl 10/10 BEGIN_BATCH(10) at 176, from radeon_emit_atom:1038 emit rb3d_aaresolve_ctl 2/2 BEGIN_BATCH(2) at 186, from radeon_emit_atom:1038 emit rb3d_discard_src_pixel_lte_threshold 3/3 BEGIN_BATCH(3) at 188, from radeon_emit_atom:1038 emit zs 4/4 BEGIN_BATCH(4) at 191, from radeon_emit_atom:1038 skip state zsb emit zstencil_format 5/5 BEGIN_BATCH(5) at 195, from emit_zstencil_format:411 emit zb 6/3 BEGIN_BATCH(6) at 200, from emit_zb_offset:383 emit zb_depthclearvalue 2/2 BEGIN_BATCH(2) at 204, from radeon_emit_atom:1038 emit zb_zmask 3/3 BEGIN_BATCH(3) at 206, from radeon_emit_atom:1038 emit zb_hiz_offset 2/2 BEGIN_BATCH(2) at 209, from radeon_emit_atom:1038 emit zb_hiz_pitch 2/2 BEGIN_BATCH(2) at 211, from radeon_emit_atom:1038 skip state vap_flush skip state vpi skip state vpp emit vps 5/5 BEGIN_BATCH(5) at 213, from radeon_emit_atom:1038 emit vpucp[i] 5/5 BEGIN_BATCH(5) at 218, from radeon_emit_atom:1038 emit vpucp[i] 5/5 BEGIN_BATCH(5) at 223, from radeon_emit_atom:1038 emit vpucp[i] 5/5 BEGIN_BATCH(5) at 228, from radeon_emit_atom:1038 emit vpucp[i] 5/5 BEGIN_BATCH(5) at 233, from radeon_emit_atom:1038 emit vpucp[i] 5/5 BEGIN_BATCH(5) at 238, from radeon_emit_atom:1038 emit vpucp[i] 5/5 BEGIN_BATCH(5) at 243, from radeon_emit_atom:1038 skip state tex.filter skip state tex.filter_1 skip state tex.size skip state tex.format skip state tex.pitch skip state tex.offset skip state tex.chroma_key skip state tex.border_color skip state queryobj BEGIN_BATCH(31) at 248, from r300EmitClearState:301 BEGIN_BATCH(2) at 279, from r300EmitClearState:377 BEGIN_BATCH(2) at 281, from r300EmitClearState:382 BEGIN_BATCH(14) at 283, from r300EmitClearState:409 BEGIN_BATCH(7) at 297, from r300EmitClearState:460 BEGIN_BATCH(7) at 304, from r300EmitClearState:514 BEGIN_BATCH(2) at 311, from r300EmitClearState:521 BEGIN_BATCH(2) at 313, from r300EmitClearState:554 BEGIN_BATCH(4) at 315, from r300EmitClearState:565 BEGIN_BATCH(9) at 319, from r300EmitClearState:612 r300ClearBuffer: buffer 0x9e24df8 (445,255 800x600) BEGIN_BATCH(1) at 328, from cp_wait:185 BEGIN_BATCH(1) at 329, from end_3d:162 BEGIN_BATCH(6) at 330, from r300ClearBuffer:164 BEGIN_BATCH(6) at 334, from r300ClearBuffer:190 BEGIN_BATCH(9) at 340, from r300ClearBuffer:237 BEGIN_BATCH(4) at 349, from r300EmitCacheFlush:131 BEGIN_BATCH(1) at 353, from cp_wait:185 radeonFlush 354 radeonEmitState Begin dirty state BEGIN_BATCH(1) at 354, from cp_wait:185 BEGIN_BATCH(2) at 355, from r300_vtbl_pre_emit_atoms:222 BEGIN_BATCH(1) at 357, from end_3d:162 emit vpt 7/7 BEGIN_BATCH(7) at 358, from radeon_emit_atom:1038 emit vap_cntl 4/4 BEGIN_BATCH(4) at 365, from radeon_emit_atom:1038 emit vte 3/3 BEGIN_BATCH(3) at 369, from radeon_emit_atom:1038 emit vir[0] 2/9 BEGIN_BATCH(2) at 372, from radeon_emit_atom:1038 emit vir[1] 2/9 BEGIN_BATCH(2) at 374, from radeon_emit_atom:1038 emit vic 3/3 BEGIN_BATCH(3) at 376, from radeon_emit_atom:1038 emit vap_clip_cntl 2/2 BEGIN_BATCH(2) at 379, from radeon_emit_atom:1038 emit vof 3/3 BEGIN_BATCH(3) at 381, from radeon_emit_atom:1038 emit pvs 4/4 BEGIN_BATCH(4) at 384, from radeon_emit_atom:1038 emit txe 2/2 BEGIN_BATCH(2) at 388, from radeon_emit_atom:1038 emit ps 2/2 BEGIN_BATCH(2) at 390, from radeon_emit_atom:1038 emit rc 3/3 BEGIN_BATCH(3) at 392, from radeon_emit_atom:1038 emit ri 17/17 BEGIN_BATCH(17) at 395, from radeon_emit_atom:1038 emit rr 2/9 BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038 emit fp 9/9 BEGIN_BATCH(9) at 414, from radeon_emit_atom:1038 skip state r500fp emit fogs 2/2 BEGIN_BATCH(2) at 423, from radeon_emit_atom:1038 emit at 3/3 BEGIN_BATCH(3) at 425, from radeon_emit_atom:1038 emit bld 3/3 BEGIN_BATCH(3) at 428, from radeon_emit_atom:1038 emit cmk 2/2 BEGIN_BATCH(2) at 431, from radeon_emit_atom:1038 emit cb 6/4 rrb is 0x9e24df8 0 800x600 BEGIN_BATCH(6) at 433, from emit_cb_offset:299 emit zs 4/4 BEGIN_BATCH(4) at 437, from radeon_emit_atom:1038 skip state vap_flush skip state vpi radeonReleaseDmaRegions: free 0, wait 0, reserved 0, minimum_size: 65536 rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects radeonFlush 0 radeonCopyBuffer( 0x9ad5f68 ) r300NewTextureObject( 0x9e2f060 (target = GL_FALSE) ) level 0, face 0: rs:256 128x128 at 0 level 0, face 1: rs:256 128x128 at 8192 level 0, face 2: rs:256 128x128 at 16384 level 0, face 3: rs:256 128x128 at 24576 level 0, face 4: rs:256 128x128 at 32768 level 0, face 5: rs:256 128x128 at 40960 level 1, face 0: rs:128 64x64 at 49152 level 1, face 1: rs:128 64x64 at 51200 level 1, face 2: rs:128 64x64 at 53248 level 1, face 3: rs:128 64x64 at 55296 level 1, face 4: rs:128 64x64 at 57344 level 1, face 5: rs:128 64x64 at 59392 level 2, face 0: rs:64 32x32 at 61440 level 2, face 1: rs:64 32x32 at 61952 level 2, face 2: rs:64 32x32 at 62464 level 2, face 3: rs:64 32x32 at 62976 level 2, face 4: rs:64 32x32 at 63488 level 2, face 5: rs:64 32x32 at 64000 level 3, face 0: rs:64 16x16 at 64512 level 3, face 1: rs:64 16x16 at 64640 level 3, face 2: rs:64 16x16 at 64768 level 3, face 3: rs:64 16x16 at 64896 level 3, face 4: rs:64 16x16 at 65024 level 3, face 5: rs:64 16x16 at 65152 level 4, face 0: rs:64 8x8 at 65280 level 4, face 1: rs:64 8x8 at 65344 level 4, face 2: rs:64 8x8 at 65408 level 4, face 3: rs:64 8x8 at 65472 level 4, face 4: rs:64 8x8 at 65536 level 4, face 5: rs:64 8x8 at 65600 level 5, face 0: rs:64 4x4 at 65664 level 5, face 1: rs:64 4x4 at 65696 level 5, face 2: rs:64 4x4 at 65728 level 5, face 3: rs:64 4x4 at 65760 level 5, face 4: rs:64 4x4 at 65792 level 5, face 5: rs:64 4x4 at 65824 level 6, face 0: rs:64 2x2 at 65856 level 6, face 1: rs:64 2x2 at 65888 level 6, face 2: rs:64 2x2 at 65920 level 6, face 3: rs:64 2x2 at 65952 level 6, face 4: rs:64 2x2 at 65984 level 6, face 5: rs:64 2x2 at 66016 level 7, face 0: rs:64 1x1 at 66048 level 7, face 1: rs:64 1x1 at 66080 level 7, face 2: rs:64 1x1 at 66112 level 7, face 3: rs:64 1x1 at 66144 level 7, face 4: rs:64 1x1 at 66176 level 7, face 5: rs:64 1x1 at 66208 r300TexParameter( GL_TEXTURE_MIN_FILTER ) r300TexParameter( GL_TEXTURE_WRAP_S ) r300TexParameter( GL_TEXTURE_WRAP_T ) r300TexParameter( GL_TEXTURE_WRAP_R ) r300NewTextureObject( 0x9e7dc10 (target = GL_FALSE) ) level 0, face 0: rs:128 32x1 at 0 level 1, face 0: rs:64 16x1 at 128 level 2, face 0: rs:32 8x1 at 192 level 3, face 0: rs:32 4x1 at 224 level 4, face 0: rs:32 2x1 at 256 level 5, face 0: rs:32 1x1 at 288 r300TexParameter( GL_TEXTURE_MIN_FILTER ) r300TexParameter( GL_TEXTURE_WRAP_S ) r300TexParameter( GL_TEXTURE_WRAP_T ) r300TexParameter( GL_TEXTURE_WRAP_R ) r300TexParameter( GL_TEXTURE_MIN_FILTER ) r300Enable( GL_VERTEX_PROGRAM_ARB = GL_TRUE ) radeonUnbindContext ctx 0x9ad5f68 radeonFreeDmaRegions radeonReleaseArrays r300DeleteTexture( 0x9b08ef8 (target = GL_TEXTURE_1D) ) r300DeleteTexture( 0x9b09170 (target = GL_TEXTURE_2D) ) r300DeleteTexture( 0x9b093e8 (target = GL_TEXTURE_3D) ) r300DeleteTexture( 0x9b09660 (target = GL_TEXTURE_CUBE_MAP) ) r300DeleteTexture( 0x9b098d8 (target = GL_TEXTURE_RECTANGLE_ARB) ) r300DeleteTexture( 0x9b09b50 (target = GL_TEXTURE_1D_ARRAY_EXT) ) r300DeleteTexture( 0x9b09dc8 (target = GL_TEXTURE_2D_ARRAY_EXT) ) r300DeleteTexture( 0x9a26af8 (target = GL_TEXTURE_2D_ARRAY_EXT) ) r300DeleteTexture( 0x9a22858 (target = GL_TEXTURE_1D_ARRAY_EXT) ) r300DeleteTexture( 0x9a22ad0 (target = GL_TEXTURE_CUBE_MAP) ) r300DeleteTexture( 0x9a22d48 (target = GL_TEXTURE_3D) ) r300DeleteTexture( 0x9a22fc0 (target = GL_TEXTURE_RECTANGLE_ARB) ) r300DeleteTexture( 0x9a23238 (target = GL_TEXTURE_2D) ) r300DeleteTexture( 0x9af2170 (target = GL_TEXTURE_1D) ) r300DeleteTexture( 0x9e2f060 (target = GL_TEXTURE_CUBE_MAP) ) r300DeleteTexture( 0x9e7dc10 (target = GL_TEXTURE_2D) )