630,657d629
< (II) intel(0): I2C bus "CRTDDC_A" initialized.
< (II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" registered at address 0x60.
< (II) intel(0): I2C device "CRTDDC_A:ddc2" registered at address 0xA0.
< (II) intel(0): I2C device "CRTDDC_A:ddc2" removed.
< (II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" removed.
< (II) intel(0): I2C bus "CRTDDC_A" removed.
< (II) intel(0): EDID vendor "SAM", prod id 1245
< (II) intel(0): EDID vendor "SEC", prod id 13125
< (II) intel(0): Using hsync ranges from config file
< (II) intel(0): Using vrefresh ranges from config file
< (II) intel(0): Printing DDC gathered Modelines:
< (II) intel(0): Modeline "1280x800"x0.0   68.94  1280 1296 1344 1408  800 801 804 816 -hsync -vsync (49.0 kHz)
< (II) intel(0): EDID vendor "SEC", prod id 13125
< (II) intel(0): I2C bus "CRTDDC_A" initialized.
< (II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" registered at address 0x60.
< (II) intel(0): I2C device "CRTDDC_A:ddc2" registered at address 0xA0.
< (II) intel(0): I2C device "CRTDDC_A:ddc2" removed.
< (II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" removed.
< (II) intel(0): I2C bus "CRTDDC_A" removed.
< (II) intel(0): EDID vendor "SAM", prod id 1245
< (II) intel(0): EDID vendor "SEC", prod id 13125
< (II) intel(0): Using hsync ranges from config file
< (II) intel(0): Using vrefresh ranges from config file
< (II) intel(0): Printing DDC gathered Modelines:
< (II) intel(0): Modeline "1280x800"x0.0   68.94  1280 1296 1344 1408  800 801 804 816 -hsync -vsync (49.0 kHz)
< (II) intel(0): EDID vendor "SEC", prod id 13125
< (II) intel(0): using SSC reference clock of 96 MHz
< (II) intel(0): Selecting standard 18 bit TMDS pixel format.