loader/xf86sym.c         |    1 
 os-support/bus/Pci.c     |   59 +++++++++++++++++++++++++++++++++++++++++++++++
 os-support/bus/Pci.h     |    2 +
 os-support/bus/xf86Pci.h |    7 +++++
 4 files changed, 69 insertions(+)

Index: programs/Xserver/hw/xfree86/loader/xf86sym.c
===================================================================
RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/loader/xf86sym.c,v
retrieving revision 1.15
diff -u -d -r1.15 xf86sym.c
--- programs/Xserver/hw/xfree86/loader/xf86sym.c	24 Aug 2005 21:28:40 -0000	1.15
+++ programs/Xserver/hw/xfree86/loader/xf86sym.c	28 Aug 2005 19:03:23 -0000
@@ -1168,6 +1168,7 @@
 
     /* Pci.c */
     SYMVAR(pciNumBuses)
+    SYMFUNC(xorgIsAGP)
 
     {0, 0}
 };
Index: programs/Xserver/hw/xfree86/os-support/bus/Pci.c
===================================================================
RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c,v
retrieving revision 1.9
diff -u -d -r1.9 Pci.c
--- programs/Xserver/hw/xfree86/os-support/bus/Pci.c	26 Aug 2005 05:47:36 -0000	1.9
+++ programs/Xserver/hw/xfree86/os-support/bus/Pci.c	28 Aug 2005 19:03:23 -0000
@@ -1414,3 +1414,62 @@
 }
 
 #endif /* INCLUDE_XF86_NO_DOMAIN */
+
+/*
+ * Proper autodetection of an AGP capable device requires examining
+ * PCI config registers to determine if the device implements extended
+ * PCI capabilities, and then walking the capability list as indicated
+ * in the PCI 2.2 and AGP 2.0 specifications, to determine if AGP
+ * capability is present.  The procedure is outlined as follows:
+ *
+ * 1) Test bit 4 (CAP_LIST) of the PCI status register of the device
+ *    to determine wether or not this device implements any extended
+ *    capabilities.  If this bit is zero, then the device is a PCI 2.1
+ *    or earlier device and is not AGP capable, and we can conclude it
+ *    to be a PCI device.
+ *
+ * 2) If bit 4 of the status register is set, then the device implements
+ *    extended capabilities.  There is an 8 bit wide capabilities pointer
+ *    register located at offset 0x34 in PCI config space which points to
+ *    the first capability in a linked list of extended capabilities that
+ *    this device implements.  The lower two bits of this register are
+ *    reserved and MBZ so must be masked out.
+ *
+ * 3) The extended capabilities list is formed by one or more extended
+ *    capabilities structures which are aligned on DWORD boundaries.
+ *    The first byte of the structure is the capability ID (CAP_ID)
+ *    indicating what extended capability this structure refers to.  The
+ *    second byte of the structure is an offset from the beginning of
+ *    PCI config space pointing to the next capability in the linked
+ *    list (NEXT_PTR) or NULL (0x00) at the end of the list.  The lower
+ *    two bits of this pointer are reserved and MBZ.  By examining the
+ *    CAP_ID of each capability and walking through the list, we will
+ *    either find the AGP_CAP_ID (0x02) indicating this device is an
+ *    AGP device, or we'll reach the end of the list, indicating it is
+ *    a PCI device.
+ *
+ * Mike A. Harris <mharris@redhat.com>
+ *
+ * References:
+ *  - PCI Local Bus Specification Revision 2.2, Chapter 6
+ *  - AGP Interface Specification Revision 2.0, Section 6.1.5
+ */
+
+_X_EXPORT Bool
+xorgIsAGP(PCITAG pciTag)
+{
+    if (pciReadLong(pciTag, PCI_CMD_STAT_REG) & PCI_CAP_LIST) {
+        CARD32 cap_ptr, cap_id;
+
+        cap_ptr = pciReadLong(pciTag, PCI_CAPABILITIES_PTR) & PCI_CAP_PTR_MASK;
+
+        while (cap_ptr != PCI_CAP_ID_NULL) {
+            cap_id = pciReadLong(pciTag, cap_ptr);
+            if ((cap_id && 0xff) == PCI_CAP_ID_AGP)
+                return TRUE;
+            cap_ptr = (cap_id >> 8) & PCI_CAP_PTR_MASK;
+        }
+    }
+
+    return FALSE;
+}
Index: programs/Xserver/hw/xfree86/os-support/bus/Pci.h
===================================================================
RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h,v
retrieving revision 1.9
diff -u -d -r1.9 Pci.h
--- programs/Xserver/hw/xfree86/os-support/bus/Pci.h	3 Jul 2005 07:01:30 -0000	1.9
+++ programs/Xserver/hw/xfree86/os-support/bus/Pci.h	28 Aug 2005 19:03:23 -0000
@@ -435,4 +435,6 @@
 
 extern pciBusInfo_t  *pciBusInfo[];
 
+extern Bool xorgIsAGP(PCITAG pciTag);
+
 #endif /* _PCI_H */
Index: programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h
===================================================================
RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h,v
retrieving revision 1.8
diff -u -d -r1.8 xf86Pci.h
--- programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h	24 Aug 2005 11:18:35 -0000	1.8
+++ programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h	28 Aug 2005 19:03:23 -0000
@@ -134,6 +134,13 @@
 #define PCI_CMD_BACKTOBACK_ENABLE	0x200
 #define PCI_CMD_BIOS_ENABLE		0x01
 
+/* capability registers */
+#define PCI_CAP_LIST                    0x100000
+#define PCI_CAPABILITIES_PTR            0x34
+#define PCI_CAP_PTR_MASK                0xfc
+#define PCI_CAP_ID_NULL                 0x00
+#define PCI_CAP_ID_AGP                  0x02
+
 /* base class */
 #define PCI_CLASS_REG		0x08
 #define PCI_CLASS_MASK		0xff000000