From ff143761fcae8c026c332e0cc8b2f190411e98f4 Mon Sep 17 00:00:00 2001 From: Maxim Levitsky Date: Wed, 25 Nov 2009 17:46:28 +0200 Subject: [PATCH 2/2] Add tools/intel_overlay_dump overlay dump tool Signed-off-by Maxim Levitsky --- lib/intel_gpu_tools.c | 21 +++++- lib/intel_gpu_tools.h | 10 +++ tools/Makefile.am | 3 +- tools/intel_overlay_dump.c | 160 ++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 189 insertions(+), 5 deletions(-) create mode 100644 tools/intel_overlay_dump.c diff --git a/lib/intel_gpu_tools.c b/lib/intel_gpu_tools.c index 6c85d2a..c49237f 100644 --- a/lib/intel_gpu_tools.c +++ b/lib/intel_gpu_tools.c @@ -39,6 +39,7 @@ struct pci_device *pci_dev; uint32_t devid; void *mmio; +void *gart = NULL; void intel_get_drm_devid(int fd) @@ -85,29 +86,41 @@ intel_get_pci_device(void) void intel_get_mmio(void) { - int mmio_bar; + int mmio_bar, gart_bar; int err; intel_get_pci_device(); - if (IS_9XX(devid)) + if (IS_9XX(devid)) { mmio_bar = 0; - else + gart_bar = 2; + } else { mmio_bar = 1; + gart_bar = -1; + } err = pci_device_map_range (pci_dev, pci_dev->regions[mmio_bar].base_addr, pci_dev->regions[mmio_bar].size, PCI_DEV_MAP_FLAG_WRITABLE, &mmio); - if (err != 0) { fprintf(stderr, "Couldn't map MMIO region: %s\n", strerror(err)); exit(1); } + + if (gart_bar < 0) + return; + + pci_device_map_range (pci_dev, + pci_dev->regions[gart_bar].base_addr, + pci_dev->regions[gart_bar].size, + PCI_DEV_MAP_FLAG_WRITABLE, + &gart); } + void intel_copy_bo(struct intel_batchbuffer *batch, drm_intel_bo *dst_bo, drm_intel_bo *src_bo, diff --git a/lib/intel_gpu_tools.h b/lib/intel_gpu_tools.h index 07340cc..abf20da 100644 --- a/lib/intel_gpu_tools.h +++ b/lib/intel_gpu_tools.h @@ -35,6 +35,7 @@ extern struct pci_device *pci_dev; extern uint32_t devid; extern void *mmio; +extern void *gart; #define ARRAY_SIZE(arr) (sizeof(arr)/sizeof(arr[0])) @@ -50,6 +51,15 @@ OUTREG(uint32_t reg, uint32_t val) *(volatile uint32_t *)((volatile char *)mmio + reg) = val; } +static inline uint32_t INGART(uint32_t reg) +{ + if(!gart) + return -1; + + return *(volatile uint32_t *)((volatile char *)gart + reg); +} + + void intel_get_pci_device(void); void intel_get_mmio(void); void intel_get_drm_devid(int fd); diff --git a/tools/Makefile.am b/tools/Makefile.am index 8bb1509..c70e808 100644 --- a/tools/Makefile.am +++ b/tools/Makefile.am @@ -5,7 +5,8 @@ bin_PROGRAMS = \ intel_gpu_time \ intel_stepping \ intel_reg_dumper \ - intel_reg_write + intel_reg_write \ + intel_overlay_dump intel_gpu_dump_SOURCES = \ intel_gpu_dump.c \ diff --git a/tools/intel_overlay_dump.c b/tools/intel_overlay_dump.c new file mode 100644 index 0000000..6bcad4f --- /dev/null +++ b/tools/intel_overlay_dump.c @@ -0,0 +1,160 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "intel_gpu_tools.h" + +int mem_page_address = 0; + +void dump_reg(int addr, char * nm, char * descr) { + uint32_t value = INREG(addr); + uint32_t gart_value = -1; + + + + if (mem_page_address && addr >= 0x30100 && addr <= 0x301A7) + gart_value = INGART(mem_page_address + addr - 0x30100); + + + printf("%-16s = 0x%08x - 0x%08x (%s)\n", nm, value, gart_value, descr); +} + + +void dump_range(int start_addr, int stop_addr, int gart_addr) +{ + uint32_t value, gart_value = -1; + int i = 0; + + + while (start_addr <= stop_addr) { + value = INREG(start_addr); + + if(mem_page_address) + gart_value = INGART(mem_page_address + gart_addr); + + i++; + + start_addr += 4; + gart_addr+=4; + + printf("0x%08x (0x%08x) " , value, gart_value); + + if (i == 4) { + printf("\n"); + i=0; + } + } + + printf("\n"); +} + + + +int main(int argc, char **argv) +{ + intel_get_mmio(); + mem_page_address = INREG(0x30000); + + + printf("general settings:\n"); + dump_reg(0x30000, "OVADD", "Overlay Control Register Update Address"); + dump_reg(0x30164, "OCONFIG", "Overlay Configuration"); + dump_reg(0x30168, "OCMD", "Overlay Command"); + + printf("\nsource buffer settings:\n"); + dump_reg(0x30100, "OBUF_0Y", "Overlay Buffer 0 Y Pointer"); + dump_reg(0x30108, "OBUF_0U", "Overlay Buffer 0 U Pointer"); + dump_reg(0x3010C, "OBUF_0V", "Overlay Buffer 0 V Pointer"); + dump_reg(0x30104, "OBUF_1Y", "Overlay Buffer 1 Y Pointer"); + dump_reg(0x30110, "OBUF_1U", "Overlay Buffer 1 U Pointer"); + dump_reg(0x30114, "OBUF_1V", "Overlay Buffer 1 V Pointer"); + dump_reg(0x30170, "OSTART_0Y", "Overlay Surface Start 0 Y Pointer"); + dump_reg(0x30178, "OSTART _0U", "Overlay Surface Start 0 U Pointer"); + dump_reg(0x3017C, "OSTART _0V", "Overlay Surface Start 0 V Pointer"); + dump_reg(0x30174, "OSTART _1Y", "Overlay Surface Start 1 Y Pointer"); + dump_reg(0x30180, "OSTART _1U", "Overlay Surface Start 1 U Pointer"); + dump_reg(0x30184, "OSTART _1V", "Overlay Surface Start 1 V Pointer"); + dump_reg(0x30188, "OTILEOFF_0Y", "Overlay Surface 0 Y Tiled Offset"); + dump_reg(0x30190, "OTILEOFF _0U", "Overlay Surface 0 U Tiled Offset"); + dump_reg(0x30194, "OTILEOFF _0V", "Overlay Surface 0 V Tiled Offset"); + dump_reg(0x3018C, "OTILEOFF _1Y", "Overlay Surface 1 Y Tiled Offset"); + dump_reg(0x30198, "OTILEOFF _1U", "Overlay Surface 1 U Tiled Offset"); + dump_reg(0x3019C, "OTILEOFF _1V", "Overlay Surface 1 V Tiled Offset"); + dump_reg(0x30118, "OSTRIDE", "Overlay Stride"); + + printf("\nscale, position & size:\n"); + dump_reg(0x3012C, "DWINPOS", "Destination Window Position"); + dump_reg(0x30130, "DWINSZ", "Destination Window Size"); + dump_reg(0x30134, "SWIDTH", "Source Width"); + dump_reg(0x30138, "SWIDTHSW", "Source Width In SWORDS"); + dump_reg(0x3013C, "SHEIGHT", "Source Height"); + dump_reg(0x30140, "YRGBSCALE", "Y/RGB Scale Factor"); + dump_reg(0x30144, "UVSCALE", "U V Scale Factor"); + + printf("\nvideo correction:\n"); + dump_reg(0x30148, "OCLRC0", "Overlay Color Correction 0"); + dump_reg(0x3014C, "OCLRC1", "Overlay Color Correction 1"); + + + printf("\ncolor key:\n"); + dump_reg(0x30150, "DCLRKV", "Destination Color Key Value"); + dump_reg(0x30154, "DCLRKM", "Destination Color Key Mask"); + + + printf("\nmisc:\n"); + dump_reg(0x3011C, "YRGB_VPH", "Y/RGB Vertical Phase 0/1"); + dump_reg(0x30120, "UV_VPH", "UV Vertical Phase 0/1"); + dump_reg(0x30124, "HORZ_PH", "Horizontal Phase"); + dump_reg(0x30128, "INIT_PHS", "Initial Phase Shift"); + dump_reg(0x30158, "SCHRKVH", "Source Chroma Key Value High"); + dump_reg(0x3015C, "SCHRKVL", "Source Chroma Key Value Low"); + dump_reg(0x30160, "SCHRKEN", "Source Chroma Key Enable"); + dump_reg(0x301A0, "FASTHSCALE", "Fast Horizontal Downscale"); + dump_reg(0x301A4, "UVSCALEV", "UV Vertical Downscale Integer"); + + + printf("\ngamma correction:\n"); + dump_reg(0x30010, "GAMMA0", "Piecewise Linear Gamma Correction Register #0"); + dump_reg(0x30014, "GAMMA1", "Piecewise Linear Gamma Correction Register #1"); + dump_reg(0x30018, "GAMMA2", "Piecewise Linear Gamma Correction Register #2"); + dump_reg(0x3001C, "GAMMA3", "Piecewise Linear Gamma Correction Register #3"); + dump_reg(0x30020, "GAMMA4", "Piecewise Linear Gamma Correction Register #4"); + dump_reg(0x30024, "GAMMA5", "Piecewise Linear Gamma Correction Register #5"); + + printf("\nstatus:\n"); + dump_reg(0x30008, "DOVSTA", "Display/Overlay Status Register"); + dump_reg(0x30058, "SYNCPH0", "Video Sync Lock Phase Register #0"); + dump_reg(0x3005C, "SYNCPH0", "Video Sync Lock Phase Register #1"); + dump_reg(0x30060, "SYNCPH0", "Video Sync Lock Phase Register #2"); + dump_reg(0x30064, "SYNCPH0", "Video Sync Lock Phase Register #3"); + + + printf("Overlay Y Vertical Filter Coefficient:\n"); + dump_range(0x30300, 0x30368, 0x200); + + printf("Overlay Y Horizontal Filter Coefficients:\n"); + dump_range(0x30400, 0x304ab, 0x300); + + printf("Overlay UV Vertical Filter Coefficients:\n"); + dump_range(0x30600, 0x30668, 0x500); + + printf("Overlay UV Horizontal Filter Coefficients:\n"); + dump_range(0x30700, 0x30778, 0x600); + + + + + return 0; +} + + + + -- 1.6.3.3