Index: Mesa/src/mesa/drivers/dri/radeon/radeon_compat.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_compat.c,v retrieving revision 1.4 diff -u -r1.4 radeon_compat.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_compat.c 25 Sep 2004 07:00:15 -0000 1.4 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_compat.c 3 Sep 2005 18:54:49 -0000 @@ -77,6 +77,7 @@ drm_radeon_context_regs_t *ctx = &sarea->context_state; drm_radeon_texture_regs_t *tex0 = &sarea->tex_state[0]; drm_radeon_texture_regs_t *tex1 = &sarea->tex_state[1]; + drm_radeon_texture_regs_t *tex2 = &sarea->tex_state[2]; int i; int *buf = state->cmd; @@ -180,14 +181,25 @@ tex1->pp_border_color = buf[i++]; sarea->dirty |= RADEON_UPLOAD_TEX1; break; + case RADEON_EMIT_PP_TXFILTER_2: + tex2->pp_txfilter = buf[i++]; + tex2->pp_txformat = buf[i++]; + tex2->pp_txoffset = buf[i++]; + tex2->pp_txcblend = buf[i++]; + tex2->pp_txablend = buf[i++]; + tex2->pp_tfactor = buf[i++]; + sarea->dirty |= RADEON_UPLOAD_TEX2; + break; + case RADEON_EMIT_PP_BORDER_COLOR_2: + tex2->pp_border_color = buf[i++]; + sarea->dirty |= RADEON_UPLOAD_TEX2; + break; case RADEON_EMIT_SE_ZBIAS_FACTOR: i++; i++; break; - case RADEON_EMIT_PP_TXFILTER_2: - case RADEON_EMIT_PP_BORDER_COLOR_2: case RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT: case RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED: default: Index: Mesa/src/mesa/drivers/dri/radeon/radeon_context.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_context.c,v retrieving revision 1.40 diff -u -r1.40 radeon_context.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_context.c 1 Sep 2005 03:54:34 -0000 1.40 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_context.c 3 Sep 2005 18:54:50 -0000 @@ -69,7 +69,7 @@ #define need_GL_EXT_secondary_color #include "extension_helper.h" -#define DRIVER_DATE "20050831" +#define DRIVER_DATE "20050902" #include "vblank.h" #include "utils.h" @@ -326,9 +326,10 @@ */ ctx = rmesa->glCtx; - ctx->Const.MaxTextureUnits = 2; - ctx->Const.MaxTextureImageUnits = 2; - ctx->Const.MaxTextureCoordUnits = 2; + ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->optionCache, + "texture_units"); + ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits; + ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits; driCalculateMaxTextureLevels( rmesa->texture_heaps, rmesa->nr_heaps, @@ -336,7 +337,7 @@ 4, 11, /* max 2D texture size is 2048x2048 */ 0, /* 3D textures unsupported. */ - 0, /* cube textures unsupported. */ + 9, /* \todo: max cube texture size seems to be 512x512(x6) */ 11, /* max rect texture size is 2048x2048. */ 12, GL_FALSE ); @@ -402,14 +403,16 @@ _tnl_allow_vertex_fog( ctx, GL_TRUE ); - _math_matrix_ctr( &rmesa->TexGenMatrix[0] ); - _math_matrix_ctr( &rmesa->TexGenMatrix[1] ); + for ( i = 0 ; i < RADEON_MAX_TEXTURE_UNITS ; i++ ) { + _math_matrix_ctr( &rmesa->TexGenMatrix[i] ); + _math_matrix_set_identity( &rmesa->TexGenMatrix[i] ); + } _math_matrix_ctr( &rmesa->tmpmat ); - _math_matrix_set_identity( &rmesa->TexGenMatrix[0] ); - _math_matrix_set_identity( &rmesa->TexGenMatrix[1] ); _math_matrix_set_identity( &rmesa->tmpmat ); driInitExtensions( ctx, card_extensions, GL_TRUE ); + if (rmesa->radeonScreen->drmSupportsCubeMaps) + _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" ); if (rmesa->glCtx->Mesa_DXTn) { _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" ); _mesa_enable_extension( ctx, "GL_S3_s3tc" ); Index: Mesa/src/mesa/drivers/dri/radeon/radeon_context.h =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_context.h,v retrieving revision 1.24 diff -u -r1.24 radeon_context.h --- Mesa/src/mesa/drivers/dri/radeon/radeon_context.h 1 Sep 2005 03:54:34 -0000 1.24 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_context.h 3 Sep 2005 18:54:51 -0000 @@ -126,7 +126,8 @@ #define TEX_0 0x1 #define TEX_1 0x2 -#define TEX_ALL 0x3 +#define TEX_2 0x4 +#define TEX_ALL 0x7 typedef struct radeon_tex_obj radeonTexObj, *radeonTexObjPtr; @@ -258,6 +259,16 @@ #define TXR_PP_TEX_PITCH 2 /* 0x1d08, 0x1d10 for NPOT! */ #define TXR_STATE_SIZE 3 +#define CUBE_CMD_0 0 +#define CUBE_PP_CUBIC_FACES 1 +#define CUBE_CMD_1 2 +#define CUBE_PP_CUBIC_OFFSET_0 3 +#define CUBE_PP_CUBIC_OFFSET_1 4 +#define CUBE_PP_CUBIC_OFFSET_2 5 +#define CUBE_PP_CUBIC_OFFSET_3 6 +#define CUBE_PP_CUBIC_OFFSET_4 7 +#define CUBE_STATE_SIZE 8 + #define ZBS_CMD_0 0 #define ZBS_SE_ZBIAS_FACTOR 1 #define ZBS_SE_ZBIAS_CONSTANT 2 @@ -408,17 +419,18 @@ struct radeon_state_atom vpt; struct radeon_state_atom tcl; struct radeon_state_atom msc; - struct radeon_state_atom tex[2]; + struct radeon_state_atom tex[3]; + struct radeon_state_atom cube[3]; struct radeon_state_atom zbs; struct radeon_state_atom mtl; - struct radeon_state_atom mat[5]; + struct radeon_state_atom mat[6]; struct radeon_state_atom lit[8]; /* includes vec, scl commands */ struct radeon_state_atom ucp[6]; struct radeon_state_atom eye; /* eye pos */ struct radeon_state_atom grd; /* guard band clipping */ struct radeon_state_atom fog; struct radeon_state_atom glt; - struct radeon_state_atom txr[2]; /* for NPOT */ + struct radeon_state_atom txr[3]; /* for NPOT */ int max_state_size; /* Number of bytes necessary for a full state emit. */ GLboolean is_dirty, all_dirty; @@ -528,6 +540,8 @@ GLuint RenderIndex; GLuint vertex_size; GLuint vertex_format; + GLuint projformat; /* bit n (0..2): Qn is used for projtex */ + struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX]; GLuint vertex_attr_count; @@ -599,10 +613,18 @@ struct dynfn SecondaryColor3fvEXT; struct dynfn Normal3f; struct dynfn Normal3fv; +#if 0 /* \todo: vtxfmt doesnt work correctly with cubemaps yet */ + struct dynfn TexCoord3f; + struct dynfn TexCoord3fv; +#endif struct dynfn TexCoord2f; struct dynfn TexCoord2fv; struct dynfn TexCoord1f; struct dynfn TexCoord1fv; +#if 0 + struct dynfn MultiTexCoord3fARB; + struct dynfn MultiTexCoord3fvARB; +#endif struct dynfn MultiTexCoord2fARB; struct dynfn MultiTexCoord2fvARB; struct dynfn MultiTexCoord1fARB; @@ -628,10 +650,18 @@ struct dynfn *(*SecondaryColor3fvEXT)( GLcontext *, int ); struct dynfn *(*Normal3f)( GLcontext *, int ); struct dynfn *(*Normal3fv)( GLcontext *, int ); +#if 0 + struct dynfn *(*TexCoord3f)( GLcontext *, int ); + struct dynfn *(*TexCoord3fv)( GLcontext *, int ); +#endif struct dynfn *(*TexCoord2f)( GLcontext *, int ); struct dynfn *(*TexCoord2fv)( GLcontext *, int ); struct dynfn *(*TexCoord1f)( GLcontext *, int ); struct dynfn *(*TexCoord1fv)( GLcontext *, int ); +#if 0 + struct dynfn *(*MultiTexCoord3fARB)( GLcontext *, int ); + struct dynfn *(*MultiTexCoord3fvARB)( GLcontext *, int ); +#endif struct dynfn *(*MultiTexCoord2fARB)( GLcontext *, int ); struct dynfn *(*MultiTexCoord2fvARB)( GLcontext *, int ); struct dynfn *(*MultiTexCoord1fARB)( GLcontext *, int ); @@ -646,30 +676,29 @@ GLuint prim; }; +#define RADEON_MAX_VERTEX_SIZE 20 + struct radeon_vbinfo { GLint counter, initial_counter; GLint *dmaptr; void (*notify)( void ); GLint vertex_size; - /* A maximum total of 15 elements per vertex: 3 floats for position, 3 + /* A maximum total of 20 elements per vertex: 3 floats for position, 3 * floats for normal, 4 floats for color, 4 bytes for secondary color, - * 2 floats for each texture unit (4 floats total). - * - * As soon as the 3rd TMU is supported or cube maps (or 3D textures) are - * supported, this value will grow. + * 3 floats for each texture unit (9 floats total). * * The position data is never actually stored here, so 3 elements could be * trimmed out of the buffer. */ - union { float f; int i; radeon_color_t color; } vertex[15]; + union { float f; int i; radeon_color_t color; } vertex[RADEON_MAX_VERTEX_SIZE]; GLfloat *normalptr; GLfloat *floatcolorptr; radeon_color_t *colorptr; GLfloat *floatspecptr; radeon_color_t *specptr; - GLfloat *texcoordptr[2]; + GLfloat *texcoordptr[4]; /* 3 (TMU) + 1 for radeon_vtxfmt_c.c when GL_TEXTURE3 */ GLenum *prim; /* &ctx->Driver.CurrentExecPrimitive */ GLuint primflags; @@ -679,6 +708,7 @@ GLboolean recheck; GLint nrverts; GLuint vertex_format; + GLuint projformat; /* bit n (0..2): Qn is used for projtex */ GLuint installed_vertex_format; GLuint installed_color_3f_sz; Index: Mesa/src/mesa/drivers/dri/radeon/radeon_ioctl.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_ioctl.c,v retrieving revision 1.27 diff -u -r1.27 radeon_ioctl.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_ioctl.c 1 Sep 2005 20:10:17 -0000 1.27 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_ioctl.c 3 Sep 2005 18:54:52 -0000 @@ -152,6 +152,7 @@ for (i = 0; i < mtu; ++i) { insert_at_tail(&rmesa->hw.atomlist, &rmesa->hw.tex[i]); insert_at_tail(&rmesa->hw.atomlist, &rmesa->hw.txr[i]); + insert_at_tail(&rmesa->hw.atomlist, &rmesa->hw.cube[i]); } insert_at_tail(&rmesa->hw.atomlist, &rmesa->hw.zbs); insert_at_tail(&rmesa->hw.atomlist, &rmesa->hw.mtl); @@ -423,6 +424,12 @@ rmesa->ioctl.vertex_size = component[0]->aos_size; rmesa->ioctl.vertex_offset = (component[0]->aos_start + offset * component[0]->aos_stride * 4); + if (RADEON_DEBUG & DEBUG_VERTS) { + fprintf( stderr, "%s: RADEON_OLD_PACKETS\n", __FUNCTION__); + fprintf( stderr, " rmesa->ioctl.vertex_size= %d, rmesa->ioctl.vertex_offset= %d\n", + rmesa->ioctl.vertex_size, + rmesa->ioctl.vertex_offset); + } #else drm_radeon_cmd_header_t *cmd; int sz = AOS_BUFSZ(nr); Index: Mesa/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c,v retrieving revision 1.6 diff -u -r1.6 radeon_maos_arrays.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c 28 May 2004 14:55:07 -0000 1.6 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c 3 Sep 2005 18:54:52 -0000 @@ -49,6 +49,9 @@ #include "radeon_swtcl.h" #include "radeon_maos.h" +/* this file is usually unused in the radeon driver, see radeon_maos.c */ +/* because it is said verts are faster on radeon (R100) */ + #if 0 /* Usage: * - from radeon_tcl_render @@ -386,6 +389,7 @@ assert (!rvb->buf); switch (size) { + case 3: case 4: emitsize = 3; break; default: emitsize = 2; break; } @@ -416,7 +420,7 @@ emit_vec8( ctx, rvb, data, stride, count ); break; case 3: - emit_vec8( ctx, rvb, data, stride, count ); + emit_vec12( ctx, rvb, data, stride, count ); break; case 4: emit_stq_vec( ctx, rvb, data, stride, count ); @@ -525,8 +529,8 @@ } vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] & - ~(RADEON_TCL_VTX_Q0|RADEON_TCL_VTX_Q1)); - + ~(RADEON_TCL_VTX_Q0|RADEON_TCL_VTX_Q1|RADEON_TCL_VTX_Q2)); + if (inputs & VERT_BIT_TEX0) { if (!rmesa->tcl.tex[0].buf) emit_tex_vector( ctx, @@ -537,6 +541,7 @@ count ); switch( VB->TexCoordPtr[0]->size ) { + case 3: case 4: vtx |= RADEON_TCL_VTX_Q0; vfmt |= RADEON_CP_VC_FRMT_Q0; @@ -556,6 +561,7 @@ count ); switch( VB->TexCoordPtr[1]->size ) { + case 3: case 4: vtx |= RADEON_TCL_VTX_Q1; vfmt |= RADEON_CP_VC_FRMT_Q1; @@ -565,6 +571,26 @@ component[nr++] = &rmesa->tcl.tex[1]; } + if (inputs & VERT_BIT_TEX2) { + if (!rmesa->tcl.tex[2].buf) + emit_tex_vector( ctx, + &(rmesa->tcl.tex[2]), + (char *)VB->TexCoordPtr[2]->data, + VB->TexCoordPtr[2]->size, + VB->TexCoordPtr[2]->stride, + count ); + + switch( VB->TexCoordPtr[2]->size ) { + case 3: + case 4: + vtx |= RADEON_TCL_VTX_Q2; + vfmt |= RADEON_CP_VC_FRMT_Q2; + default: + vfmt |= RADEON_CP_VC_FRMT_ST2; + } + component[nr++] = &rmesa->tcl.tex[2]; + } + if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) { RADEON_STATECHANGE( rmesa, tcl ); rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx; @@ -601,4 +627,7 @@ if (newinputs & VERT_BIT_TEX1) radeonReleaseDmaRegion( rmesa, &rmesa->tcl.tex[1], __FUNCTION__ ); + + if (newinputs & VERT_BIT_TEX2) + radeonReleaseDmaRegion( rmesa, &rmesa->tcl.tex[2], __FUNCTION__ ); } Index: Mesa/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h,v retrieving revision 1.3 diff -u -r1.3 radeon_maos_vbtmp.h --- Mesa/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h 24 Nov 2003 15:21:16 -0000 1.3 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h 3 Sep 2005 18:54:53 -0000 @@ -47,6 +47,7 @@ GLuint tc0_stride, tc1_stride, col_stride, spec_stride, fog_stride; GLuint tc2_stride, norm_stride; GLuint fill_tex = 0; + GLuint cubemap_tex = 0; GLuint (*coord)[4]; GLuint coord_stride; /* object coordinates */ GLubyte dummy[4]; @@ -65,8 +66,11 @@ const GLuint t2 = GET_TEXSOURCE(2); tc2 = (GLuint (*)[4])VB->TexCoordPtr[t2]->data; tc2_stride = VB->TexCoordPtr[t2]->stride; - if (DO_PTEX && VB->TexCoordPtr[t2]->size < 4) { - fill_tex |= (1<<2); + if (DO_PTEX) { + if (VB->TexCoordPtr[t2]->size < 3) + fill_tex |= (1<<2); + else if (VB->TexCoordPtr[t2]->size < 4) + cubemap_tex |= (1<<2); } } else { tc2 = (GLuint (*)[4])&ctx->Current.Attrib[VERT_ATTRIB_TEX2]; @@ -79,8 +83,11 @@ const GLuint t1 = GET_TEXSOURCE(1); tc1 = (GLuint (*)[4])VB->TexCoordPtr[t1]->data; tc1_stride = VB->TexCoordPtr[t1]->stride; - if (DO_PTEX && VB->TexCoordPtr[t1]->size < 4) { - fill_tex |= (1<<1); + if (DO_PTEX) { + if (VB->TexCoordPtr[t1]->size < 3) + fill_tex |= (1<<1); + else if (VB->TexCoordPtr[t1]->size < 4) + cubemap_tex |= (1<<1); } } else { tc1 = (GLuint (*)[4])&ctx->Current.Attrib[VERT_ATTRIB_TEX1]; @@ -93,8 +100,11 @@ const GLuint t0 = GET_TEXSOURCE(0); tc0_stride = VB->TexCoordPtr[t0]->stride; tc0 = (GLuint (*)[4])VB->TexCoordPtr[t0]->data; - if (DO_PTEX && VB->TexCoordPtr[t0]->size < 4) { - fill_tex |= (1<<0); + if (DO_PTEX) { + if (VB->TexCoordPtr[t0]->size < 3) + fill_tex |= (1<<0); + else if (VB->TexCoordPtr[t0]->size < 4) + cubemap_tex |= (1<<0); } } else { tc0 = (GLuint (*)[4])&ctx->Current.Attrib[VERT_ATTRIB_TEX0]; @@ -213,6 +223,8 @@ if (DO_PTEX) { if (fill_tex & (1<<0)) v[2].f = 1.0; + else if (cubemap_tex & (1<<0)) + v[2].ui = tc0[0][2]; /* prefer cubemapping/3dtexures */ else v[2].ui = tc0[0][3]; if (TCL_DEBUG) fprintf(stderr, "%.2f ", v[2].f); @@ -229,6 +241,8 @@ if (DO_PTEX) { if (fill_tex & (1<<1)) v[2].f = 1.0; + else if (cubemap_tex & (1<<1)) + v[2].ui = tc1[0][2]; else v[2].ui = tc1[0][3]; if (TCL_DEBUG) fprintf(stderr, "%.2f ", v[2].f); @@ -241,11 +255,15 @@ if (DO_TEX2) { v[0].ui = tc2[0][0]; v[1].ui = tc2[0][1]; + if (TCL_DEBUG) fprintf(stderr, "t0: %.2f %.2f ", v[0].f, v[1].f); if (DO_PTEX) { if (fill_tex & (1<<2)) v[2].f = 1.0; + else if (cubemap_tex & (1<<2)) + v[2].ui = tc2[0][2]; else v[2].ui = tc2[0][3]; + if (TCL_DEBUG) fprintf(stderr, "%.2f ", v[2].f); v += 3; } else Index: Mesa/src/mesa/drivers/dri/radeon/radeon_maos_verts.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_maos_verts.c,v retrieving revision 1.9 diff -u -r1.9 radeon_maos_verts.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_maos_verts.c 8 Apr 2004 08:54:24 -0000 1.9 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_maos_verts.c 3 Sep 2005 18:54:53 -0000 @@ -51,7 +51,7 @@ #include "radeon_maos.h" -#define RADEON_TCL_MAX_SETUP 13 +#define RADEON_TCL_MAX_SETUP 19 union emit_union { float f; GLuint ui; radeon_color_t rgba; }; @@ -67,10 +67,10 @@ #define DO_FOG (IND & RADEON_CP_VC_FRMT_PKSPEC) #define DO_TEX0 (IND & RADEON_CP_VC_FRMT_ST0) #define DO_TEX1 (IND & RADEON_CP_VC_FRMT_ST1) +#define DO_TEX2 (IND & RADEON_CP_VC_FRMT_ST2) #define DO_PTEX (IND & RADEON_CP_VC_FRMT_Q0) #define DO_NORM (IND & RADEON_CP_VC_FRMT_N0) -#define DO_TEX2 0 #define DO_TEX3 0 #define GET_TEXSOURCE(n) n @@ -202,6 +202,77 @@ #define TAG(x) x##_w_rgba_spec_stq_stq_n #include "radeon_maos_vbtmp.h" +#define IDX 13 +#define IND (RADEON_CP_VC_FRMT_XY| \ + RADEON_CP_VC_FRMT_Z| \ + RADEON_CP_VC_FRMT_PKCOLOR| \ + RADEON_CP_VC_FRMT_ST0| \ + RADEON_CP_VC_FRMT_ST1| \ + RADEON_CP_VC_FRMT_ST2) +#define TAG(x) x##_rgba_st_st_st +#include "radeon_maos_vbtmp.h" + +#define IDX 14 +#define IND (RADEON_CP_VC_FRMT_XY| \ + RADEON_CP_VC_FRMT_Z| \ + RADEON_CP_VC_FRMT_PKCOLOR| \ + RADEON_CP_VC_FRMT_PKSPEC| \ + RADEON_CP_VC_FRMT_ST0| \ + RADEON_CP_VC_FRMT_ST1| \ + RADEON_CP_VC_FRMT_ST2) +#define TAG(x) x##_rgba_spec_st_st_st +#include "radeon_maos_vbtmp.h" + +#define IDX 15 +#define IND (RADEON_CP_VC_FRMT_XY| \ + RADEON_CP_VC_FRMT_Z| \ + RADEON_CP_VC_FRMT_ST0| \ + RADEON_CP_VC_FRMT_ST1| \ + RADEON_CP_VC_FRMT_ST2| \ + RADEON_CP_VC_FRMT_N0) +#define TAG(x) x##_st_st_st_n +#include "radeon_maos_vbtmp.h" + +#define IDX 16 +#define IND (RADEON_CP_VC_FRMT_XY| \ + RADEON_CP_VC_FRMT_Z| \ + RADEON_CP_VC_FRMT_PKCOLOR| \ + RADEON_CP_VC_FRMT_PKSPEC| \ + RADEON_CP_VC_FRMT_ST0| \ + RADEON_CP_VC_FRMT_ST1| \ + RADEON_CP_VC_FRMT_ST2| \ + RADEON_CP_VC_FRMT_N0) +#define TAG(x) x##_rgba_spec_st_st_st_n +#include "radeon_maos_vbtmp.h" + +#define IDX 17 +#define IND (RADEON_CP_VC_FRMT_XY| \ + RADEON_CP_VC_FRMT_Z| \ + RADEON_CP_VC_FRMT_PKCOLOR| \ + RADEON_CP_VC_FRMT_ST0| \ + RADEON_CP_VC_FRMT_Q0| \ + RADEON_CP_VC_FRMT_ST1| \ + RADEON_CP_VC_FRMT_Q1| \ + RADEON_CP_VC_FRMT_ST2| \ + RADEON_CP_VC_FRMT_Q2) +#define TAG(x) x##_rgba_stq_stq_stq +#include "radeon_maos_vbtmp.h" + +#define IDX 18 +#define IND (RADEON_CP_VC_FRMT_XY| \ + RADEON_CP_VC_FRMT_Z| \ + RADEON_CP_VC_FRMT_W0| \ + RADEON_CP_VC_FRMT_PKCOLOR| \ + RADEON_CP_VC_FRMT_PKSPEC| \ + RADEON_CP_VC_FRMT_ST0| \ + RADEON_CP_VC_FRMT_Q0| \ + RADEON_CP_VC_FRMT_ST1| \ + RADEON_CP_VC_FRMT_Q1| \ + RADEON_CP_VC_FRMT_ST2| \ + RADEON_CP_VC_FRMT_Q2| \ + RADEON_CP_VC_FRMT_N0) +#define TAG(x) x##_w_rgba_spec_stq_stq_stq_n +#include "radeon_maos_vbtmp.h" @@ -226,6 +297,12 @@ init_rgba_stq(); init_rgba_stq_stq(); init_w_rgba_spec_stq_stq_n(); + init_rgba_st_st_st(); + init_rgba_spec_st_st_st(); + init_st_st_st_n(); + init_rgba_spec_st_st_st_n(); + init_rgba_stq_stq_stq(); + init_w_rgba_spec_stq_stq_stq_n(); } @@ -235,7 +312,7 @@ struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; GLuint req = 0; GLuint vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] & - ~(RADEON_TCL_VTX_Q0|RADEON_TCL_VTX_Q1)); + ~(RADEON_TCL_VTX_Q0|RADEON_TCL_VTX_Q1|RADEON_TCL_VTX_Q2)); int i; static int firsttime = 1; @@ -266,21 +343,35 @@ if (inputs & VERT_BIT_TEX0) { req |= RADEON_CP_VC_FRMT_ST0; - if (VB->TexCoordPtr[0]->size == 4) { + if (RADEON_DEBUG & DEBUG_VERTS) + fprintf( stderr, "%s: st0 used\n", __FUNCTION__); + + if (VB->TexCoordPtr[0]->size >= 3) { req |= RADEON_CP_VC_FRMT_Q0; vtx |= RADEON_TCL_VTX_Q0; + if (RADEON_DEBUG & DEBUG_VERTS) + fprintf( stderr, "%s: q0 used\n", __FUNCTION__); } } if (inputs & VERT_BIT_TEX1) { req |= RADEON_CP_VC_FRMT_ST1; - if (VB->TexCoordPtr[1]->size == 4) { + if (VB->TexCoordPtr[1]->size >= 3) { req |= RADEON_CP_VC_FRMT_Q1; vtx |= RADEON_TCL_VTX_Q1; } } + if (inputs & VERT_BIT_TEX2) { + req |= RADEON_CP_VC_FRMT_ST2; + + if (VB->TexCoordPtr[2]->size >= 3) { + req |= RADEON_CP_VC_FRMT_Q2; + vtx |= RADEON_TCL_VTX_Q2; + } + } + if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) { RADEON_STATECHANGE( rmesa, tcl ); rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx; Index: Mesa/src/mesa/drivers/dri/radeon/radeon_screen.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_screen.c,v retrieving revision 1.39 diff -u -r1.39 radeon_screen.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_screen.c 2 Sep 2005 13:20:20 -0000 1.39 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_screen.c 3 Sep 2005 18:54:54 -0000 @@ -65,6 +65,7 @@ DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN) DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS) DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0) + DRI_CONF_MAX_TEXTURE_UNITS(2,2,3) DRI_CONF_HYPERZ(false) DRI_CONF_SECTION_END DRI_CONF_SECTION_QUALITY @@ -81,7 +82,7 @@ DRI_CONF_NO_RAST(false) DRI_CONF_SECTION_END DRI_CONF_END; -static const GLuint __driNConfigOptions = 13; +static const GLuint __driNConfigOptions = 14; extern const struct dri_extension card_extensions[]; @@ -260,6 +261,7 @@ fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_IRQ_NR): %d\n", ret); return NULL; } + screen->drmSupportsCubeMaps = (sPriv->drmMinor >= 15); } } Index: Mesa/src/mesa/drivers/dri/radeon/radeon_screen.h =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_screen.h,v retrieving revision 1.14 diff -u -r1.14 radeon_screen.h --- Mesa/src/mesa/drivers/dri/radeon/radeon_screen.h 4 May 2005 20:11:38 -0000 1.14 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_screen.h 3 Sep 2005 18:54:54 -0000 @@ -98,6 +98,7 @@ /* Configuration cache with default values for all contexts */ driOptionCache optionCache; + GLboolean drmSupportsCubeMaps; } radeonScreenRec, *radeonScreenPtr; #endif /* __RADEON_SCREEN_H__ */ Index: Mesa/src/mesa/drivers/dri/radeon/radeon_state.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_state.c,v retrieving revision 1.29 diff -u -r1.29 radeon_state.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_state.c 1 Sep 2005 03:54:34 -0000 1.29 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_state.c 3 Sep 2005 18:54:56 -0000 @@ -2060,7 +2060,7 @@ rmesa->TexMatEnabled = 0; - for (unit = 0 ; unit < 2; unit++) { + for (unit = 0 ; unit < ctx->Const.MaxTextureUnits; unit++) { if (!ctx->Texture.Unit[unit]._ReallyEnabled) { } else if (ctx->TextureMatrixStack[unit].Top->type != MATRIX_IDENTITY) { @@ -2095,8 +2095,10 @@ tpc = (rmesa->TexMatEnabled | rmesa->TexGenEnabled); vs &= ~((0xf << RADEON_TCL_TEX_0_OUTPUT_SHIFT) | - (0xf << RADEON_TCL_TEX_1_OUTPUT_SHIFT)); + (0xf << RADEON_TCL_TEX_1_OUTPUT_SHIFT) | + (0xf << RADEON_TCL_TEX_2_OUTPUT_SHIFT)); +/* FIXME: this should be replaced by a look-up-table (... idr-patch) */ if (tpc & RADEON_TEXGEN_TEXMAT_0_ENABLE) vs |= RADEON_TCL_TEX_COMPUTED_TEX_0 << RADEON_TCL_TEX_0_OUTPUT_SHIFT; else @@ -2107,6 +2109,11 @@ else vs |= RADEON_TCL_TEX_INPUT_TEX_1 << RADEON_TCL_TEX_1_OUTPUT_SHIFT; + if (tpc & RADEON_TEXGEN_TEXMAT_2_ENABLE) + vs |= RADEON_TCL_TEX_COMPUTED_TEX_2 << RADEON_TCL_TEX_2_OUTPUT_SHIFT; + else + vs |= RADEON_TCL_TEX_INPUT_TEX_2 << RADEON_TCL_TEX_2_OUTPUT_SHIFT; + if (tpc != rmesa->hw.tcl.cmd[TCL_TEXTURE_PROC_CTL] || vs != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL]) { Index: Mesa/src/mesa/drivers/dri/radeon/radeon_state_init.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_state_init.c,v retrieving revision 1.15 diff -u -r1.15 radeon_state_init.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_state_init.c 1 Sep 2005 03:54:34 -0000 1.15 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_state_init.c 3 Sep 2005 18:54:57 -0000 @@ -113,12 +113,18 @@ CHECK( always, GL_TRUE ) +CHECK( never, GL_FALSE ) CHECK( tex0, ctx->Texture.Unit[0]._ReallyEnabled ) CHECK( tex1, ctx->Texture.Unit[1]._ReallyEnabled ) +CHECK( tex2, ctx->Texture.Unit[2]._ReallyEnabled ) +CHECK( cube0, (ctx->Texture.Unit[0]._ReallyEnabled & TEXTURE_CUBE_BIT)) +CHECK( cube1, (ctx->Texture.Unit[1]._ReallyEnabled & TEXTURE_CUBE_BIT)) +CHECK( cube2, (ctx->Texture.Unit[2]._ReallyEnabled & TEXTURE_CUBE_BIT)) CHECK( fog, ctx->Fog.Enabled ) TCL_CHECK( tcl, GL_TRUE ) TCL_CHECK( tcl_tex0, ctx->Texture.Unit[0]._ReallyEnabled ) TCL_CHECK( tcl_tex1, ctx->Texture.Unit[1]._ReallyEnabled ) +TCL_CHECK( tcl_tex2, ctx->Texture.Unit[2]._ReallyEnabled ) TCL_CHECK( tcl_lighting, ctx->Light.Enabled ) TCL_CHECK( tcl_eyespace_or_lighting, ctx->_NeedEyeCoords || ctx->Light.Enabled ) TCL_CHECK( tcl_lit0, ctx->Light.Enabled && ctx->Light.Light[0].Enabled ) @@ -137,8 +143,10 @@ TCL_CHECK( tcl_ucp5, (ctx->Transform.ClipPlanesEnabled & 0x20) ) TCL_CHECK( tcl_eyespace_or_fog, ctx->_NeedEyeCoords || ctx->Fog.Enabled ) +/* FIXME: disable this always if rectangle textures not supported by drm-driver */ CHECK( txr0, (ctx->Texture.Unit[0]._ReallyEnabled & TEXTURE_RECT_BIT)) CHECK( txr1, (ctx->Texture.Unit[1]._ReallyEnabled & TEXTURE_RECT_BIT)) +CHECK( txr2, (ctx->Texture.Unit[2]._ReallyEnabled & TEXTURE_RECT_BIT)) @@ -229,11 +237,25 @@ ALLOC_STATE( eye, tcl_lighting, EYE_STATE_SIZE, "EYE/eye-vector", 1 ); ALLOC_STATE( tex[0], tex0, TEX_STATE_SIZE, "TEX/tex-0", 0 ); ALLOC_STATE( tex[1], tex1, TEX_STATE_SIZE, "TEX/tex-1", 0 ); + ALLOC_STATE( tex[2], tex2, TEX_STATE_SIZE, "TEX/tex-2", 0 ); + if (rmesa->radeonScreen->drmSupportsCubeMaps) + { + ALLOC_STATE( cube[0], cube0, CUBE_STATE_SIZE, "CUBE/cube-0", 0 ); + ALLOC_STATE( cube[1], cube1, CUBE_STATE_SIZE, "CUBE/cube-1", 0 ); + ALLOC_STATE( cube[2], cube2, CUBE_STATE_SIZE, "CUBE/cube-2", 0 ); + } + else + { + ALLOC_STATE( cube[0], never, CUBE_STATE_SIZE, "CUBE/cube-0", 0 ); + ALLOC_STATE( cube[1], never, CUBE_STATE_SIZE, "CUBE/cube-1", 0 ); + ALLOC_STATE( cube[2], never, CUBE_STATE_SIZE, "CUBE/cube-2", 0 ); + } ALLOC_STATE( mat[0], tcl, MAT_STATE_SIZE, "MAT/modelproject", 1 ); ALLOC_STATE( mat[1], tcl_eyespace_or_fog, MAT_STATE_SIZE, "MAT/modelview", 1 ); ALLOC_STATE( mat[2], tcl_eyespace_or_lighting, MAT_STATE_SIZE, "MAT/it-modelview", 1 ); ALLOC_STATE( mat[3], tcl_tex0, MAT_STATE_SIZE, "MAT/texmat0", 1 ); ALLOC_STATE( mat[4], tcl_tex1, MAT_STATE_SIZE, "MAT/texmat1", 1 ); + ALLOC_STATE( mat[5], tcl_tex2, MAT_STATE_SIZE, "MAT/texmat2", 1 ); ALLOC_STATE( ucp[0], tcl_ucp0, UCP_STATE_SIZE, "UCP/userclip-0", 1 ); ALLOC_STATE( ucp[1], tcl_ucp1, UCP_STATE_SIZE, "UCP/userclip-1", 1 ); ALLOC_STATE( ucp[2], tcl_ucp2, UCP_STATE_SIZE, "UCP/userclip-2", 1 ); @@ -250,6 +272,7 @@ ALLOC_STATE( lit[7], tcl_lit7, LIT_STATE_SIZE, "LIT/light-7", 1 ); ALLOC_STATE( txr[0], txr0, TXR_STATE_SIZE, "TXR/txr-0", 0 ); ALLOC_STATE( txr[1], txr1, TXR_STATE_SIZE, "TXR/txr-1", 0 ); + ALLOC_STATE( txr[2], txr2, TXR_STATE_SIZE, "TXR/txr-2", 0 ); radeonSetUpAtomList( rmesa ); @@ -269,12 +292,21 @@ rmesa->hw.tex[0].cmd[TEX_CMD_1] = cmdpkt(RADEON_EMIT_PP_BORDER_COLOR_0); rmesa->hw.tex[1].cmd[TEX_CMD_0] = cmdpkt(RADEON_EMIT_PP_TXFILTER_1); rmesa->hw.tex[1].cmd[TEX_CMD_1] = cmdpkt(RADEON_EMIT_PP_BORDER_COLOR_1); + rmesa->hw.tex[2].cmd[TEX_CMD_0] = cmdpkt(RADEON_EMIT_PP_TXFILTER_2); + rmesa->hw.tex[2].cmd[TEX_CMD_1] = cmdpkt(RADEON_EMIT_PP_BORDER_COLOR_2); + rmesa->hw.cube[0].cmd[CUBE_CMD_0] = cmdpkt(RADEON_EMIT_PP_CUBIC_FACES_0); + rmesa->hw.cube[0].cmd[CUBE_CMD_1] = cmdpkt(RADEON_EMIT_PP_CUBIC_OFFSETS_T0); + rmesa->hw.cube[1].cmd[CUBE_CMD_0] = cmdpkt(RADEON_EMIT_PP_CUBIC_FACES_1); + rmesa->hw.cube[1].cmd[CUBE_CMD_1] = cmdpkt(RADEON_EMIT_PP_CUBIC_OFFSETS_T1); + rmesa->hw.cube[2].cmd[CUBE_CMD_0] = cmdpkt(RADEON_EMIT_PP_CUBIC_FACES_2); + rmesa->hw.cube[2].cmd[CUBE_CMD_1] = cmdpkt(RADEON_EMIT_PP_CUBIC_OFFSETS_T2); rmesa->hw.zbs.cmd[ZBS_CMD_0] = cmdpkt(RADEON_EMIT_SE_ZBIAS_FACTOR); rmesa->hw.tcl.cmd[TCL_CMD_0] = cmdpkt(RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT); rmesa->hw.mtl.cmd[MTL_CMD_0] = cmdpkt(RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED); rmesa->hw.txr[0].cmd[TXR_CMD_0] = cmdpkt(RADEON_EMIT_PP_TEX_SIZE_0); rmesa->hw.txr[1].cmd[TXR_CMD_0] = cmdpkt(RADEON_EMIT_PP_TEX_SIZE_1); + rmesa->hw.txr[2].cmd[TXR_CMD_0] = cmdpkt(RADEON_EMIT_PP_TEX_SIZE_2); rmesa->hw.grd.cmd[GRD_CMD_0] = cmdscl( RADEON_SS_VERT_GUARD_CLIP_ADJ_ADDR, 1, 4 ); rmesa->hw.fog.cmd[FOG_CMD_0] = @@ -284,7 +316,7 @@ rmesa->hw.eye.cmd[EYE_CMD_0] = cmdvec( RADEON_VS_EYE_VECTOR_ADDR, 1, 4 ); - for (i = 0 ; i < 5; i++) { + for (i = 0 ; i < 6; i++) { rmesa->hw.mat[i].cmd[MAT_CMD_0] = cmdvec( RADEON_VS_MATRIX_0_ADDR + i*4, 1, 16); } @@ -309,8 +341,8 @@ RADEON_CHROMA_FUNC_FAIL | RADEON_CHROMA_KEY_NEAREST | RADEON_SHADOW_FUNC_EQUAL | - RADEON_SHADOW_PASS_1 | - RADEON_RIGHT_HAND_CUBE_OGL); + RADEON_SHADOW_PASS_1); + /* isn't it strange that we mustn't set RADEON_RIGHT_HAND_CUBE_OGL ? */ rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] = (RADEON_FOG_VERTEX | RADEON_FOG_USE_DEPTH); @@ -479,6 +511,18 @@ RADEON_SCALE_1X | RADEON_CLAMP_TX); rmesa->hw.tex[i].cmd[TEX_PP_TFACTOR] = 0; + + rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_FACES] = 0; + rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_0] = + rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; + rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_1] = + rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; + rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_2] = + rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; + rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_3] = + rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; + rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_4] = + rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP]; } /* Can only add ST1 at the time of doing some multitex but can keep @@ -505,7 +549,8 @@ rmesa->hw.tcl.cmd[TCL_MATRIX_SELECT_1] = ((MODEL_PROJ << RADEON_MODELPROJECT_0_SHIFT) | (TEXMAT_0 << RADEON_TEXMAT_0_SHIFT) | - (TEXMAT_1 << RADEON_TEXMAT_1_SHIFT)); + (TEXMAT_1 << RADEON_TEXMAT_1_SHIFT) | + (TEXMAT_2 << RADEON_TEXMAT_2_SHIFT)); rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] = (RADEON_UCP_IN_CLIP_SPACE | Index: Mesa/src/mesa/drivers/dri/radeon/radeon_swtcl.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_swtcl.c,v retrieving revision 1.22 diff -u -r1.22 radeon_swtcl.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_swtcl.c 1 Sep 2005 03:51:58 -0000 1.22 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_swtcl.c 3 Sep 2005 18:54:57 -0000 @@ -94,6 +94,7 @@ struct vertex_buffer *VB = &tnl->vb; GLuint index = tnl->render_inputs; int fmt_0 = 0; + int projtex = 0; int offset = 0; @@ -184,13 +185,35 @@ switch (sz) { case 1: case 2: - case 3: EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_2F, radeon_cp_vc_frmts[i][0] ); break; + case 3: + if (ctx->Texture.Unit[i]._ReallyEnabled & (TEXTURE_CUBE_BIT) ) { + EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_3F, + radeon_cp_vc_frmts[i][1] ); + if (RADEON_DEBUG & DEBUG_VERTS) + fprintf( stderr, "%s: sz=3, EMIT_3F\n", __FUNCTION__); + } else { /* ut2003_demo uses 3 texcoords for 2d texturing */ + EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_2F, + radeon_cp_vc_frmts[i][0] ); + if (RADEON_DEBUG & DEBUG_VERTS) + fprintf( stderr, "%s: sz=3, EMIT_2F\n", __FUNCTION__); + } + break; case 4: - EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_3F_XYW, - radeon_cp_vc_frmts[i][1] ); + if (ctx->Texture.Unit[i]._ReallyEnabled & (TEXTURE_CUBE_BIT) ) { + EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_3F, + radeon_cp_vc_frmts[i][1] ); + if (RADEON_DEBUG & DEBUG_VERTS) + fprintf( stderr, "%s: sz=4, EMIT_3F\n", __FUNCTION__); + } else { + EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_3F_XYW, + radeon_cp_vc_frmts[i][1] ); + projtex |= 1<tnl_index != index || - fmt_0 != rmesa->swtcl.vertex_format) { + fmt_0 != rmesa->swtcl.vertex_format || + projtex != rmesa->swtcl.projformat) { RADEON_NEWPRIM(rmesa); rmesa->swtcl.vertex_format = fmt_0; + rmesa->swtcl.projformat= projtex; rmesa->swtcl.vertex_size = _tnl_install_attrs( ctx, rmesa->swtcl.vertex_attrs, @@ -615,7 +640,8 @@ #define RADEON_TWOSIDE_BIT 0x01 #define RADEON_UNFILLED_BIT 0x02 -#define RADEON_MAX_TRIFUNC 0x08 +/* FIXME: why 8 but not 4 (as in r200 driver) ? */ +#define RADEON_MAX_TRIFUNC 0x04 static struct { Index: Mesa/src/mesa/drivers/dri/radeon/radeon_tcl.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_tcl.c,v retrieving revision 1.15 diff -u -r1.15 radeon_tcl.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_tcl.c 15 Jul 2005 20:17:02 -0000 1.15 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_tcl.c 3 Sep 2005 18:55:03 -0000 @@ -240,6 +240,9 @@ GLuint last, GLuint flags ) { + if( RADEON_DEBUG & DEBUG_PRIMS) + fprintf( stderr, "%s: flags= %0x, prim:%s\n", + __FUNCTION__, flags, _mesa_lookup_enum_by_nr( flags & PRIM_MODE_MASK )); tcl_render_tab_verts[flags&PRIM_MODE_MASK]( ctx, first, last, flags ); } @@ -248,6 +251,8 @@ GLuint last, GLuint flags ) { + if( RADEON_DEBUG & DEBUG_PRIMS) + fprintf( stderr, "%s: flags= %0x\n", __FUNCTION__, flags); tcl_render_tab_elts[flags&PRIM_MODE_MASK]( ctx, first, last, flags ); } Index: Mesa/src/mesa/drivers/dri/radeon/radeon_tcl.h =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_tcl.h,v retrieving revision 1.4 diff -u -r1.4 radeon_tcl.h --- Mesa/src/mesa/drivers/dri/radeon/radeon_tcl.h 31 Jan 2005 23:40:06 -0000 1.4 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_tcl.h 3 Sep 2005 18:55:03 -0000 @@ -59,7 +59,7 @@ #define RADEON_TCL_FALLBACK_TEXRECT_1 0x200 /* texture rectangle */ #define RADEON_TCL_FALLBACK_TEXRECT_2 0x400 /* texture rectangle */ -#define RADEON_MAX_TCL_VERTSIZE (15*4) +#define RADEON_MAX_TCL_VERTSIZE (RADEON_MAX_VERTEX_SIZE*4) #define TCL_FALLBACK( ctx, bit, mode ) radeonTclFallback( ctx, bit, mode ) Index: Mesa/src/mesa/drivers/dri/radeon/radeon_tex.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_tex.c,v retrieving revision 1.15 diff -u -r1.15 radeon_tex.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_tex.c 7 Oct 2004 23:30:30 -0000 1.15 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_tex.c 3 Sep 2005 18:55:03 -0000 @@ -161,6 +161,31 @@ } /** + * returns a non-mipmap texfilter out of any texfilter: + * ugly workaround since mipmaped cubemaps seem to be unsupported on radeon. + * I think the mipmaps are generated but are unused.. which is worse when + * using dynamically generated textures (reflections, etc)... + * + * \todo: fix mipmaped cubemaps and get rid of this. + * + * \param filtermode original filtermode + */ +static GLenum radeonFakedCubeTexFilter( GLenum filtermode) +{ + switch (filtermode) { + case GL_NEAREST_MIPMAP_NEAREST: + case GL_NEAREST_MIPMAP_LINEAR: + return (GL_NEAREST); + case GL_LINEAR_MIPMAP_NEAREST: + case GL_LINEAR_MIPMAP_LINEAR: + return (GL_LINEAR); + default: + break; + } + return (filtermode); +} + +/** * Set the texture magnification and minification modes. * * \param t Texture whose filter modes are to be set @@ -260,7 +285,10 @@ radeonSetTexWrap( t, texObj->WrapS, texObj->WrapT ); radeonSetTexMaxAnisotropy( t, texObj->MaxAnisotropy ); - radeonSetTexFilter( t, texObj->MinFilter, texObj->MagFilter ); + if (texObj->Target != GL_TEXTURE_CUBE_MAP) + radeonSetTexFilter( t, texObj->MinFilter, texObj->MagFilter ); + else + radeonSetTexFilter( t, radeonFakedCubeTexFilter(texObj->MinFilter), texObj->MagFilter ); radeonSetTexBorderColor( t, texObj->_BorderChan ); } @@ -731,7 +759,10 @@ case GL_TEXTURE_MAG_FILTER: case GL_TEXTURE_MAX_ANISOTROPY_EXT: radeonSetTexMaxAnisotropy( t, texObj->MaxAnisotropy ); - radeonSetTexFilter( t, texObj->MinFilter, texObj->MagFilter ); + if (target != GL_TEXTURE_CUBE_MAP) + radeonSetTexFilter( t, texObj->MinFilter, texObj->MagFilter ); + else + radeonSetTexFilter( t, radeonFakedCubeTexFilter( texObj->MinFilter), texObj->MagFilter ); break; case GL_TEXTURE_WRAP_S: @@ -774,7 +805,7 @@ } assert( (target != GL_TEXTURE_1D && target != GL_TEXTURE_2D && - target != GL_TEXTURE_RECTANGLE_NV) || + target != GL_TEXTURE_RECTANGLE_NV && target != GL_TEXTURE_CUBE_MAP) || (texObj->DriverData != NULL) ); } Index: Mesa/src/mesa/drivers/dri/radeon/radeon_texmem.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_texmem.c,v retrieving revision 1.12 diff -u -r1.12 radeon_texmem.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_texmem.c 25 Aug 2005 03:38:07 -0000 1.12 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_texmem.c 3 Sep 2005 18:55:03 -0000 @@ -68,6 +68,7 @@ if ( t == rmesa->state.texture.unit[i].texobj ) { rmesa->state.texture.unit[i].texobj = NULL; rmesa->hw.tex[i].dirty = GL_FALSE; + rmesa->hw.cube[i].dirty = GL_FALSE; } } } @@ -226,7 +227,7 @@ imageWidth = texImage->Width; imageHeight = texImage->Height; - offset = t->bufAddr; + offset = t->bufAddr + t->base.totalSize * face / 6; if ( RADEON_DEBUG & (DEBUG_TEXTURE|DEBUG_IOCTL) ) { GLint imageX = 0; Index: Mesa/src/mesa/drivers/dri/radeon/radeon_texstate.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_texstate.c,v retrieving revision 1.16 diff -u -r1.16 radeon_texstate.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_texstate.c 26 Jun 2005 21:53:11 -0000 1.16 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_texstate.c 3 Sep 2005 18:55:04 -0000 @@ -284,6 +284,22 @@ */ t->base.totalSize = (curOffset + RADEON_OFFSET_MASK) & ~RADEON_OFFSET_MASK; + /* Setup remaining cube face blits, if needed */ + if (tObj->Target == GL_TEXTURE_CUBE_MAP) { + const GLuint faceSize = t->base.totalSize; + GLuint face; + /* reuse face 0 x/y/width/height - just update the offset when uploading */ + for (face = 1; face < 6; face++) { + for (i = 0; i < numLevels; i++) { + t->image[face][i].x = t->image[0][i].x; + t->image[face][i].y = t->image[0][i].y; + t->image[face][i].width = t->image[0][i].width; + t->image[face][i].height = t->image[0][i].height; + } + } + t->base.totalSize = 6 * faceSize; /* total texmem needed */ + } + /* Hardware state: */ t->pp_txfilter &= ~RADEON_MAX_MIP_LEVEL_MASK; @@ -291,10 +307,27 @@ t->pp_txformat &= ~(RADEON_TXFORMAT_WIDTH_MASK | RADEON_TXFORMAT_HEIGHT_MASK | - RADEON_TXFORMAT_CUBIC_MAP_ENABLE); + RADEON_TXFORMAT_CUBIC_MAP_ENABLE | + RADEON_TXFORMAT_F5_WIDTH_MASK | + RADEON_TXFORMAT_F5_HEIGHT_MASK); t->pp_txformat |= ((log2Width << RADEON_TXFORMAT_WIDTH_SHIFT) | (log2Height << RADEON_TXFORMAT_HEIGHT_SHIFT)); + if (tObj->Target == GL_TEXTURE_CUBE_MAP) { + assert(log2Width == log2Height); + t->pp_txformat |= ((log2Width << RADEON_TXFORMAT_F5_WIDTH_SHIFT) | + (log2Height << RADEON_TXFORMAT_F5_HEIGHT_SHIFT) | + (RADEON_TXFORMAT_CUBIC_MAP_ENABLE)); + t->pp_cubic_faces = ((log2Width << RADEON_FACE_WIDTH_1_SHIFT) | + (log2Height << RADEON_FACE_HEIGHT_1_SHIFT) | + (log2Width << RADEON_FACE_WIDTH_2_SHIFT) | + (log2Height << RADEON_FACE_HEIGHT_2_SHIFT) | + (log2Width << RADEON_FACE_WIDTH_3_SHIFT) | + (log2Height << RADEON_FACE_HEIGHT_3_SHIFT) | + (log2Width << RADEON_FACE_WIDTH_4_SHIFT) | + (log2Height << RADEON_FACE_HEIGHT_4_SHIFT)); + } + t->pp_txsize = (((tObj->Image[0][t->base.firstLevel]->Width - 1) << 0) | ((tObj->Image[0][t->base.firstLevel]->Height - 1) << 16)); @@ -816,30 +849,63 @@ cmd[TEX_PP_TXFORMAT] |= texobj->pp_txformat & TEXOBJ_TXFORMAT_MASK; cmd[TEX_PP_TXOFFSET] = texobj->pp_txoffset; cmd[TEX_PP_BORDER_COLOR] = texobj->pp_border_color; - RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.tex[unit] ); - if (texobj->base.tObj->Target == GL_TEXTURE_RECTANGLE_NV) { + if (texobj->base.tObj->Target == GL_TEXTURE_CUBE_MAP) { + GLuint *cube_cmd = RADEON_DB_STATE( cube[unit] ); + GLuint bytesPerFace = texobj->base.totalSize / 6; + ASSERT(texobj->totalSize % 6 == 0); + + cube_cmd[CUBE_PP_CUBIC_FACES] = texobj->pp_cubic_faces; + /* dont know if this setup conforms to OpenGL.. + * at least it matches the behavior of mesa software renderer + */ + cube_cmd[CUBE_PP_CUBIC_OFFSET_0] = texobj->pp_txoffset; /* right */ + cube_cmd[CUBE_PP_CUBIC_OFFSET_1] = texobj->pp_txoffset + 1 * bytesPerFace; /* left */ + cube_cmd[CUBE_PP_CUBIC_OFFSET_2] = texobj->pp_txoffset + 2 * bytesPerFace; /* top */ + cube_cmd[CUBE_PP_CUBIC_OFFSET_3] = texobj->pp_txoffset + 3 * bytesPerFace; /* bottom */ + cube_cmd[CUBE_PP_CUBIC_OFFSET_4] = texobj->pp_txoffset + 4 * bytesPerFace; /* front */ + RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.cube[unit] ); + cmd[TEX_PP_TXOFFSET] = texobj->pp_txoffset + 5 * bytesPerFace; /* back */ + } + else if (texobj->base.tObj->Target == GL_TEXTURE_RECTANGLE_NV) { GLuint *txr_cmd = RADEON_DB_STATE( txr[unit] ); txr_cmd[TXR_PP_TEX_SIZE] = texobj->pp_txsize; /* NPOT only! */ txr_cmd[TXR_PP_TEX_PITCH] = texobj->pp_txpitch; /* NPOT only! */ RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.txr[unit] ); } + RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.tex[unit] ); + texobj->dirty_state &= ~(1<TexGenEnabled |= RADEON_TEXMAT_0_ENABLE<TexGenMatrix[unit].m[0] = s_plane[0]; rmesa->TexGenMatrix[unit].m[4] = s_plane[1]; @@ -850,10 +916,60 @@ rmesa->TexGenMatrix[unit].m[5] = t_plane[1]; rmesa->TexGenMatrix[unit].m[9] = t_plane[2]; rmesa->TexGenMatrix[unit].m[13] = t_plane[3]; + + /* NOTE: r_plane goes in the 4th row, not 3rd! */ + rmesa->TexGenMatrix[unit].m[3] = r_plane[0]; + rmesa->TexGenMatrix[unit].m[7] = r_plane[1]; + rmesa->TexGenMatrix[unit].m[11] = r_plane[2]; + rmesa->TexGenMatrix[unit].m[15] = r_plane[3]; + + +/* FIXME: check this: atm we overwrite the r_plane */ + + rmesa->TexGenMatrix[unit].m[2] = 0; + rmesa->TexGenMatrix[unit].m[6] = 0; + rmesa->TexGenMatrix[unit].m[10] = 0; + rmesa->TexGenMatrix[unit].m[14] = 0; + + + rmesa->TexGenMatrix[unit].m[3] = 0; + rmesa->TexGenMatrix[unit].m[7] = 0; + rmesa->TexGenMatrix[unit].m[11] = 0; + rmesa->TexGenMatrix[unit].m[15] = 0; + rmesa->NewGLState |= _NEW_TEXTURE_MATRIX; } } +/* Need this special matrix to get correct reflection map coords */ +static void +set_texgen_reflection_matrix( radeonContextPtr rmesa, GLuint unit ) +{ + static const GLfloat m[16] = { + -1, 0, 0, 0, + 0, -1, 0, 0, + 0, 0, 0, -1, + 0, 0, -1, 0 }; + _math_matrix_loadf( &(rmesa->TexGenMatrix[unit]), m); + _math_matrix_analyse( &(rmesa->TexGenMatrix[unit]) ); + rmesa->TexGenEnabled |= RADEON_TEXMAT_0_ENABLE<TexGenMatrix[unit]), m); + _math_matrix_analyse( &(rmesa->TexGenMatrix[unit]) ); + rmesa->TexGenEnabled |= RADEON_TEXMAT_0_ENABLE<TexGenEnabled &= ~(RADEON_TEXGEN_INPUT_MASK<TexGenNeedNormals[unit] = 0; - if ((texUnit->TexGenEnabled & (S_BIT|T_BIT)) == 0) { + if ((texUnit->TexGenEnabled & (S_BIT|T_BIT|R_BIT)) == 0) { /* Disabled, no fallback: */ +/* FIXME: shouldnt we disable texgen? */ rmesa->TexGenEnabled |= (RADEON_TEXGEN_INPUT_TEXCOORD_0+unit) << inputshift; return GL_TRUE; } +#if 1 else if (texUnit->TexGenEnabled & Q_BIT) { /* Very easy to do this, in fact would remove a fallback case * elsewhere, but I haven't done it yet... Fallback: @@ -885,40 +1003,71 @@ fprintf(stderr, "fallback Q_BIT\n"); return GL_FALSE; } - else if ((texUnit->TexGenEnabled & (S_BIT|T_BIT)) != (S_BIT|T_BIT) || - texUnit->GenModeS != texUnit->GenModeT) { +#endif + else if (texUnit->TexGenEnabled == (S_BIT|T_BIT) && + texUnit->GenModeS == texUnit->GenModeT) { + /* OK */ + rmesa->TexGenEnabled |= RADEON_TEXGEN_TEXMAT_0_ENABLE << unit; + /* continue */ + } +#if 0 +/* doesnt work at the moment */ + else if (texUnit->TexGenEnabled == (S_BIT|T_BIT|R_BIT) && + texUnit->GenModeS == texUnit->GenModeT && + texUnit->GenModeT == texUnit->GenModeR) { + /* OK */ + rmesa->TexGenEnabled |= RADEON_TEXGEN_TEXMAT_0_ENABLE << unit; + /* continue */ + } +#endif +/* FIXME: dont know if Q_BIT works ... */ +/* just ignore the R texgenmode */ + else if (texUnit->TexGenEnabled == (S_BIT|T_BIT|R_BIT|Q_BIT) && + texUnit->GenModeS == texUnit->GenModeT && + texUnit->GenModeT == texUnit->GenModeQ) { + /* OK */ + rmesa->TexGenEnabled |= RADEON_TEXGEN_TEXMAT_0_ENABLE << unit; + /* continue */ + } + else { /* Mixed modes, fallback: */ if (RADEON_DEBUG & DEBUG_FALLBACKS) fprintf(stderr, "fallback mixed texgen\n"); return GL_FALSE; } - else - rmesa->TexGenEnabled |= RADEON_TEXGEN_TEXMAT_0_ENABLE << unit; + + rmesa->TexGenEnabled |= RADEON_TEXGEN_TEXMAT_0_ENABLE << unit; switch (texUnit->GenModeS) { case GL_OBJECT_LINEAR: rmesa->TexGenEnabled |= RADEON_TEXGEN_INPUT_OBJ << inputshift; set_texgen_matrix( rmesa, unit, texUnit->ObjectPlaneS, - texUnit->ObjectPlaneT); + texUnit->ObjectPlaneT, + texUnit->ObjectPlaneR, + texUnit->ObjectPlaneQ); break; case GL_EYE_LINEAR: rmesa->TexGenEnabled |= RADEON_TEXGEN_INPUT_EYE << inputshift; set_texgen_matrix( rmesa, unit, texUnit->EyePlaneS, - texUnit->EyePlaneT); + texUnit->EyePlaneT, + texUnit->EyePlaneR, + texUnit->EyePlaneQ); break; case GL_REFLECTION_MAP_NV: rmesa->TexGenNeedNormals[unit] = GL_TRUE; rmesa->TexGenEnabled |= RADEON_TEXGEN_INPUT_EYE_REFLECT<TexGenNeedNormals[unit] = GL_TRUE; rmesa->TexGenEnabled |= RADEON_TEXGEN_INPUT_EYE_NORMAL<hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~(RADEON_TCL_VTX_ST1 | RADEON_TCL_VTX_Q1); break; + case 2: + rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~(RADEON_TCL_VTX_ST2 | + RADEON_TCL_VTX_Q2); + break; default: break; } @@ -1025,6 +1178,48 @@ return GL_TRUE; } +static GLboolean enable_tex_cube( GLcontext *ctx, int unit ) +{ + radeonContextPtr rmesa = RADEON_CONTEXT(ctx); + struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; + struct gl_texture_object *tObj = texUnit->_Current; + radeonTexObjPtr t = (radeonTexObjPtr) tObj->DriverData; + GLuint face; + + /* Need to load the 2d images associated with this unit. + */ + if (t->pp_txformat & RADEON_TXFORMAT_NON_POWER2) { + t->pp_txformat &= ~RADEON_TXFORMAT_NON_POWER2; + for (face = 0; face < 6; face++) + t->base.dirty_images[face] = ~0; + } + + ASSERT(tObj->Target == GL_TEXTURE_CUBE_MAP); + + if ( t->base.dirty_images[0] || t->base.dirty_images[1] || + t->base.dirty_images[2] || t->base.dirty_images[3] || + t->base.dirty_images[4] || t->base.dirty_images[5] ) { + /* flush */ + RADEON_FIREVERTICES( rmesa ); + /* layout memory space, once for all faces */ + radeonSetTexImages( rmesa, tObj ); + } + + /* upload (per face) */ + for (face = 0; face < 6; face++) { + if (t->base.dirty_images[face]) { + radeonUploadTexImages( rmesa, (radeonTexObjPtr) tObj->DriverData, face ); + } + } + + if ( !t->base.memBlock ) { + /* texmem alloc failed, use s/w fallback */ + return GL_FALSE; + } + + return GL_TRUE; +} + static GLboolean enable_tex_rect( GLcontext *ctx, int unit ) { radeonContextPtr rmesa = RADEON_CONTEXT(ctx); @@ -1096,10 +1291,19 @@ RADEON_STATECHANGE( rmesa, tcl ); - if (unit == 0) + switch (unit) { + case 0: rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_ST0; - else + break; + case 1: rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_ST1; + break; + case 2: + rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_ST2; + break; + default: + break; + } rmesa->recheck_texgen[unit] = GL_TRUE; } @@ -1147,6 +1351,10 @@ return (enable_tex_2d( ctx, unit ) && update_tex_common( ctx, unit )); } + else if ( texUnit->_ReallyEnabled & (TEXTURE_CUBE_BIT) ) { + return (enable_tex_cube( ctx, unit ) && + update_tex_common( ctx, unit )); + } else if ( texUnit->_ReallyEnabled ) { return GL_FALSE; } @@ -1162,7 +1370,8 @@ GLboolean ok; ok = (radeonUpdateTextureUnit( ctx, 0 ) && - radeonUpdateTextureUnit( ctx, 1 )); + radeonUpdateTextureUnit( ctx, 1 ) && + radeonUpdateTextureUnit( ctx, 2 )); FALLBACK( rmesa, RADEON_FALLBACK_TEXTURE, !ok ); Index: Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt.c,v retrieving revision 1.10 diff -u -r1.10 radeon_vtxfmt.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt.c 18 Jul 2005 12:31:26 -0000 1.10 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt.c 3 Sep 2005 18:55:04 -0000 @@ -57,6 +57,24 @@ #include "radeon_swtcl.h" #include "radeon_vtxfmt.h" +#define VERT_ATTRIB_TEX(u) (VERT_ATTRIB_TEX0 + (u)) + +static const GLuint radeon_cp_vc_frmt_st_table[4] = +{ + RADEON_CP_VC_FRMT_ST0, + RADEON_CP_VC_FRMT_ST1, + RADEON_CP_VC_FRMT_ST2, + RADEON_CP_VC_FRMT_ST3, +}; + +static const GLuint radeon_cp_vc_frmt_q_table[4] = +{ + RADEON_CP_VC_FRMT_Q0, + RADEON_CP_VC_FRMT_Q1, + RADEON_CP_VC_FRMT_Q2, + RADEON_CP_VC_FRMT_Q3, +}; + #include "dispatch.h" static void radeonVtxfmtFlushVertices( GLcontext *, GLuint ); @@ -89,10 +107,18 @@ count_func( "SecondaryColor3ubv", &rmesa->vb.dfn_cache.SecondaryColor3ubvEXT ); count_func( "Normal3f", &rmesa->vb.dfn_cache.Normal3f ); count_func( "Normal3fv", &rmesa->vb.dfn_cache.Normal3fv ); +#if 0 /* \todo: make this working */ + count_func( "TexCoord3f", &rmesa->vb.dfn_cache.TexCoord3f ); + count_func( "TexCoord3fv", &rmesa->vb.dfn_cache.TexCoord3fv ); +#endif count_func( "TexCoord2f", &rmesa->vb.dfn_cache.TexCoord2f ); count_func( "TexCoord2fv", &rmesa->vb.dfn_cache.TexCoord2fv ); count_func( "TexCoord1f", &rmesa->vb.dfn_cache.TexCoord1f ); count_func( "TexCoord1fv", &rmesa->vb.dfn_cache.TexCoord1fv ); +#if 0 + count_func( "MultiTexCoord3fARB", &rmesa->vb.dfn_cache.MultiTexCoord3fARB ); + count_func( "MultiTexCoord3fvARB", &rmesa->vb.dfn_cache.MultiTexCoord3fvARB ); +#endif count_func( "MultiTexCoord2fARB", &rmesa->vb.dfn_cache.MultiTexCoord2fARB ); count_func( "MultiTexCoord2fvARB", &rmesa->vb.dfn_cache.MultiTexCoord2fvARB ); count_func( "MultiTexCoord1fARB", &rmesa->vb.dfn_cache.MultiTexCoord1fARB ); @@ -102,6 +128,7 @@ void radeon_copy_to_current( GLcontext *ctx ) { + GLuint unit; radeonContextPtr rmesa = RADEON_CONTEXT(ctx); assert(ctx->Driver.NeedFlush & FLUSH_UPDATE_CURRENT); @@ -134,18 +161,17 @@ ctx->Current.Attrib[VERT_ATTRIB_COLOR1][2] = UBYTE_TO_FLOAT( rmesa->vb.specptr->blue ); } - if (rmesa->vb.vertex_format & RADEON_CP_VC_FRMT_ST0) { - ctx->Current.Attrib[VERT_ATTRIB_TEX0][0] = rmesa->vb.texcoordptr[0][0]; - ctx->Current.Attrib[VERT_ATTRIB_TEX0][1] = rmesa->vb.texcoordptr[0][1]; - ctx->Current.Attrib[VERT_ATTRIB_TEX0][2] = 0.0F; - ctx->Current.Attrib[VERT_ATTRIB_TEX0][3] = 1.0F; - } - - if (rmesa->vb.vertex_format & RADEON_CP_VC_FRMT_ST1) { - ctx->Current.Attrib[VERT_ATTRIB_TEX1][0] = rmesa->vb.texcoordptr[1][0]; - ctx->Current.Attrib[VERT_ATTRIB_TEX1][1] = rmesa->vb.texcoordptr[1][1]; - ctx->Current.Attrib[VERT_ATTRIB_TEX1][2] = 0.0F; - ctx->Current.Attrib[VERT_ATTRIB_TEX1][3] = 1.0F; + for (unit = 0 ; unit < ctx->Const.MaxTextureUnits; unit++) { + if (rmesa->vb.vertex_format & radeon_cp_vc_frmt_st_table[unit]) { + ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][0] = rmesa->vb.texcoordptr[unit][0]; + ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][1] = rmesa->vb.texcoordptr[unit][1]; + if (rmesa->vb.vertex_format & radeon_cp_vc_frmt_q_table[unit]) { /* \todo: texcoord4 still won't work */ + ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][2] = rmesa->vb.texcoordptr[unit][2]; + } else { + ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][2] = 0.0F; + } + ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][3] = 1.0F; + } } ctx->Driver.NeedFlush &= ~FLUSH_UPDATE_CURRENT; @@ -182,6 +208,13 @@ rmesa->tcl.nr_aos_components = 1; rmesa->dma.flush = NULL; + if( RADEON_DEBUG & DEBUG_PRIMS) { + fprintf( stderr, "%s: \n", __FUNCTION__); + fprintf( stderr, " rmesa->tcl.vertex_format=0x%0x\n", rmesa->tcl.vertex_format); + fprintf( stderr, " rmesa->vb.vertex_size=%d\n", rmesa->vb.vertex_size); + fprintf( stderr, " rmesa->vb.nrprims=%d\n", rmesa->vb.nrprims); + } + /* Optimize the primitive list: */ if (rmesa->vb.nrprims > 1) { @@ -201,6 +234,10 @@ rmesa->vb.nrprims = j+1; } + if( RADEON_DEBUG & DEBUG_PRIMS) { + fprintf( stderr, " rmesa->vb.nrprims=%d\n", rmesa->vb.nrprims); + } + for (i = 0 ; i < rmesa->vb.nrprims; i++) { if (RADEON_DEBUG & DEBUG_PRIMS) fprintf(stderr, "vtxfmt prim %d: %s %d..%d\n", i, @@ -217,6 +254,9 @@ rmesa->vb.nrprims = 0; radeonReleaseDmaRegion( rmesa, &tmp, __FUNCTION__ ); + + if( RADEON_DEBUG & DEBUG_PRIMS) + fprintf( stderr, "%s: --end--\n", __FUNCTION__); } @@ -264,7 +304,7 @@ * memory. Could also use the counter/notify mechanism to populate * tmp on the fly as vertices are generated. */ -static GLuint copy_dma_verts( radeonContextPtr rmesa, GLfloat (*tmp)[15] ) +static GLuint copy_dma_verts( radeonContextPtr rmesa, GLfloat (*tmp)[RADEON_MAX_VERTEX_SIZE] ) { GLuint ovf, i; GLuint nr = (rmesa->vb.initial_counter - rmesa->vb.counter) - rmesa->vb.primlist[rmesa->vb.nrprims].start; @@ -352,15 +392,16 @@ } -static void VFMT_FALLBACK( const char *caller ) +void VFMT_FALLBACK( const char *caller ) { GET_CURRENT_CONTEXT(ctx); radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - GLfloat tmp[3][15]; + GLfloat tmp[3][RADEON_MAX_VERTEX_SIZE]; GLuint i, prim; GLuint ind = rmesa->vb.vertex_format; GLuint nrverts; GLfloat alpha = 1.0; + GLuint unit; if (RADEON_DEBUG & (DEBUG_FALLBACKS|DEBUG_VFMT)) fprintf(stderr, "%s from %s\n", __FUNCTION__, caller); @@ -423,14 +464,20 @@ offset++; } - if (ind & RADEON_CP_VC_FRMT_ST0) { - CALL_TexCoord2fv(GET_DISPATCH(), (&tmp[i][offset])); - offset += 2; - } - - if (ind & RADEON_CP_VC_FRMT_ST1) { - CALL_MultiTexCoord2fvARB(GET_DISPATCH(), (GL_TEXTURE1_ARB, &tmp[i][offset])); - offset += 2; +/* FIXME: what should happen if Q0 is set from projective texture? */ +/* unfortunately the vertex_format used here is from the vb struct, not from the swtcl struct */ +/* so I think we cant use the projformat from swtcl */ + + for (unit = 0 ; unit < ctx->Const.MaxTextureUnits; unit++) { + if (ind & radeon_cp_vc_frmt_st_table[unit]) { + if (ind & radeon_cp_vc_frmt_q_table[unit]) { + CALL_MultiTexCoord3fvARB(GET_DISPATCH(), ((GL_TEXTURE0+unit), &tmp[i][offset])); + offset += 3; + } else { + CALL_MultiTexCoord2fvARB(GET_DISPATCH(), ((GL_TEXTURE0+unit), &tmp[i][offset])); + offset += 2; + } + } } CALL_Vertex3fv(GET_DISPATCH(), (&tmp[i][0])); } @@ -457,11 +504,15 @@ if (ind & RADEON_CP_VC_FRMT_PKSPEC) CALL_SecondaryColor3ubEXT(GET_DISPATCH(), (rmesa->vb.specptr->red, rmesa->vb.specptr->green, rmesa->vb.specptr->blue)); - if (ind & RADEON_CP_VC_FRMT_ST0) - CALL_TexCoord2fv(GET_DISPATCH(), (rmesa->vb.texcoordptr[0])); - - if (ind & RADEON_CP_VC_FRMT_ST1) - CALL_MultiTexCoord2fvARB(GET_DISPATCH(), (GL_TEXTURE1_ARB, rmesa->vb.texcoordptr[1])); + for (unit = 0 ; unit < ctx->Const.MaxTextureUnits; unit++) { + if (ind & radeon_cp_vc_frmt_st_table[unit]) { + if (ind & radeon_cp_vc_frmt_q_table[unit]) { + CALL_MultiTexCoord3fvARB(GET_DISPATCH(), ((GL_TEXTURE0+unit), rmesa->vb.texcoordptr[unit])); + } else { + CALL_MultiTexCoord2fvARB(GET_DISPATCH(), ((GL_TEXTURE0+unit), rmesa->vb.texcoordptr[unit])); + } + } + } } @@ -470,7 +521,7 @@ { GET_CURRENT_CONTEXT(ctx); radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - GLfloat tmp[3][15]; + GLfloat tmp[3][RADEON_MAX_VERTEX_SIZE]; GLuint i, nrverts; if (RADEON_DEBUG & (DEBUG_VFMT|DEBUG_PRIMS)) @@ -547,6 +598,7 @@ { radeonContextPtr rmesa = RADEON_CONTEXT(ctx); GLuint ind = RADEON_CP_VC_FRMT_Z; + GLuint unit; if (rmesa->TclFallback || rmesa->vb.fell_back || ctx->CompileFlag) return GL_FALSE; @@ -581,35 +633,37 @@ } } - if (ctx->Texture.Unit[0]._ReallyEnabled) { - if (ctx->Texture.Unit[0].TexGenEnabled) { - if (rmesa->TexGenNeedNormals[0]) { - ind |= RADEON_CP_VC_FRMT_N0; - } - } else { - if (ctx->Current.Attrib[VERT_ATTRIB_TEX0][2] != 0.0F || - ctx->Current.Attrib[VERT_ATTRIB_TEX0][3] != 1.0) { - if (RADEON_DEBUG & (DEBUG_VFMT|DEBUG_FALLBACKS)) - fprintf(stderr, "%s: rq0\n", __FUNCTION__); - return GL_FALSE; - } - ind |= RADEON_CP_VC_FRMT_ST0; - } - } - - if (ctx->Texture.Unit[1]._ReallyEnabled) { - if (ctx->Texture.Unit[1].TexGenEnabled) { - if (rmesa->TexGenNeedNormals[1]) { - ind |= RADEON_CP_VC_FRMT_N0; - } - } else { - if (ctx->Current.Attrib[VERT_ATTRIB_TEX1][2] != 0.0F || - ctx->Current.Attrib[VERT_ATTRIB_TEX1][3] != 1.0) { - if (RADEON_DEBUG & (DEBUG_VFMT|DEBUG_FALLBACKS)) - fprintf(stderr, "%s: rq1\n", __FUNCTION__); - return GL_FALSE; + for (unit = 0 ; unit < ctx->Const.MaxTextureUnits; unit++) { + if (ctx->Texture.Unit[unit]._ReallyEnabled) { + if (ctx->Texture.Unit[unit].TexGenEnabled) { + if (rmesa->TexGenNeedNormals[unit]) { + ind |= RADEON_CP_VC_FRMT_N0; + } + } else { + if (ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][3] != 1.0) { + if (RADEON_DEBUG & (DEBUG_VFMT|DEBUG_FALLBACKS)) + fprintf(stderr, "%s: q%u\n", __FUNCTION__, unit); + return GL_FALSE; + } + ind |= radeon_cp_vc_frmt_st_table[unit]; +/* FIXME: This doesnt work as expected */ + if (ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][2] != 0.0F) + ind |= radeon_cp_vc_frmt_q_table[unit]; +/* workaround? */ +#if 1 + if (ctx->Texture.Unit[unit]._ReallyEnabled == TEXTURE_CUBE_BIT) /* FIXME: or: & TEXTURE_CUBE_BIT ? */ + ind |= radeon_cp_vc_frmt_q_table[unit]; +#endif + if( RADEON_DEBUG & DEBUG_VFMT) { + fprintf( stderr, "%s: ctx->Current.Attrib[VERT_ATTRIB_TEX%d][0..3] = %f %f %f %f\n", + __FUNCTION__, + unit, + ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][0], + ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][1], + ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][2], + ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][3]); + } } - ind |= RADEON_CP_VC_FRMT_ST1; } } @@ -628,6 +682,8 @@ rmesa->vb.floatspecptr = ctx->Current.Attrib[VERT_ATTRIB_COLOR1]; rmesa->vb.texcoordptr[0] = ctx->Current.Attrib[VERT_ATTRIB_TEX0]; rmesa->vb.texcoordptr[1] = ctx->Current.Attrib[VERT_ATTRIB_TEX1]; + rmesa->vb.texcoordptr[2] = ctx->Current.Attrib[VERT_ATTRIB_TEX2]; + rmesa->vb.texcoordptr[3] = ctx->Current.Attrib[VERT_ATTRIB_TEX0]; /* dummy */ /* Run through and initialize the vertex components in the order * the hardware understands: @@ -671,20 +727,21 @@ UNCLAMPED_FLOAT_TO_CHAN( rmesa->vb.specptr->blue, ctx->Current.Attrib[VERT_ATTRIB_COLOR1][2] ); } - if (ind & RADEON_CP_VC_FRMT_ST0) { - rmesa->vb.texcoordptr[0] = &rmesa->vb.vertex[rmesa->vb.vertex_size].f; - rmesa->vb.vertex_size += 2; - rmesa->vb.texcoordptr[0][0] = ctx->Current.Attrib[VERT_ATTRIB_TEX0][0]; - rmesa->vb.texcoordptr[0][1] = ctx->Current.Attrib[VERT_ATTRIB_TEX0][1]; - } - - if (ind & RADEON_CP_VC_FRMT_ST1) { - rmesa->vb.texcoordptr[1] = &rmesa->vb.vertex[rmesa->vb.vertex_size].f; - rmesa->vb.vertex_size += 2; - rmesa->vb.texcoordptr[1][0] = ctx->Current.Attrib[VERT_ATTRIB_TEX1][0]; - rmesa->vb.texcoordptr[1][1] = ctx->Current.Attrib[VERT_ATTRIB_TEX1][1]; - } + for (unit = 0 ; unit < ctx->Const.MaxTextureUnits; unit++) { + if (ind & radeon_cp_vc_frmt_st_table[unit]) { + rmesa->vb.texcoordptr[unit] = &rmesa->vb.vertex[rmesa->vb.vertex_size].f; + rmesa->vb.vertex_size += 2; + rmesa->vb.texcoordptr[unit][0] = ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][0]; + rmesa->vb.texcoordptr[unit][1] = ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][1]; +/* FIXME: first check if Q0 is set from projtex or cubemap/3dtex */ + if (ind & radeon_cp_vc_frmt_q_table[unit]) { + rmesa->vb.texcoordptr[unit][2] = ctx->Current.Attrib[VERT_ATTRIB_TEX(unit)][2]; + rmesa->vb.vertex_size += 1; + } + } + } +/* FIXME: also check projformat/installed_projformat ? */ if (rmesa->vb.installed_vertex_format != rmesa->vb.vertex_format) { if (RADEON_DEBUG & DEBUG_VFMT) fprintf(stderr, "reinstall on vertex_format change\n"); @@ -813,6 +870,7 @@ /* Need to arrange to save vertices here? Or always copy from dma (yuk)? */ if (!rmesa->dma.flush) { +/* FIXME: what are these constants? */ if (rmesa->dma.current.ptr + 12*rmesa->vb.vertex_size*4 > rmesa->dma.current.end) { RADEON_NEWPRIM( rmesa ); @@ -984,12 +1042,14 @@ vfmt->EvalMesh2 = radeon_fallback_EvalMesh2; vfmt->EvalPoint1 = radeon_fallback_EvalPoint1; vfmt->EvalPoint2 = radeon_fallback_EvalPoint2; - vfmt->TexCoord3f = radeon_fallback_TexCoord3f; - vfmt->TexCoord3fv = radeon_fallback_TexCoord3fv; vfmt->TexCoord4f = radeon_fallback_TexCoord4f; vfmt->TexCoord4fv = radeon_fallback_TexCoord4fv; +#if 1 /* \todo: eliminate fallback */ + vfmt->TexCoord3f = radeon_fallback_TexCoord3f; + vfmt->TexCoord3fv = radeon_fallback_TexCoord3fv; vfmt->MultiTexCoord3fARB = radeon_fallback_MultiTexCoord3fARB; vfmt->MultiTexCoord3fvARB = radeon_fallback_MultiTexCoord3fvARB; +#endif vfmt->MultiTexCoord4fARB = radeon_fallback_MultiTexCoord4fARB; vfmt->MultiTexCoord4fvARB = radeon_fallback_MultiTexCoord4fvARB; vfmt->Vertex4f = radeon_fallback_Vertex4f; @@ -1029,10 +1089,18 @@ make_empty_list( &rmesa->vb.dfn_cache.SecondaryColor3ubvEXT ); make_empty_list( &rmesa->vb.dfn_cache.Normal3f ); make_empty_list( &rmesa->vb.dfn_cache.Normal3fv ); +#if 0 + make_empty_list( &rmesa->vb.dfn_cache.TexCoord3f ); + make_empty_list( &rmesa->vb.dfn_cache.TexCoord3fv ); +#endif make_empty_list( &rmesa->vb.dfn_cache.TexCoord2f ); make_empty_list( &rmesa->vb.dfn_cache.TexCoord2fv ); make_empty_list( &rmesa->vb.dfn_cache.TexCoord1f ); make_empty_list( &rmesa->vb.dfn_cache.TexCoord1fv ); +#if 0 + make_empty_list( &rmesa->vb.dfn_cache.MultiTexCoord3fARB ); + make_empty_list( &rmesa->vb.dfn_cache.MultiTexCoord3fvARB ); +#endif make_empty_list( &rmesa->vb.dfn_cache.MultiTexCoord2fARB ); make_empty_list( &rmesa->vb.dfn_cache.MultiTexCoord2fvARB ); make_empty_list( &rmesa->vb.dfn_cache.MultiTexCoord1fARB ); @@ -1081,10 +1149,18 @@ free_funcs( &rmesa->vb.dfn_cache.SecondaryColor3fvEXT ); free_funcs( &rmesa->vb.dfn_cache.Normal3f ); free_funcs( &rmesa->vb.dfn_cache.Normal3fv ); +#if 0 + free_funcs( &rmesa->vb.dfn_cache.TexCoord3f ); + free_funcs( &rmesa->vb.dfn_cache.TexCoord3fv ); +#endif free_funcs( &rmesa->vb.dfn_cache.TexCoord2f ); free_funcs( &rmesa->vb.dfn_cache.TexCoord2fv ); free_funcs( &rmesa->vb.dfn_cache.TexCoord1f ); free_funcs( &rmesa->vb.dfn_cache.TexCoord1fv ); +#if 0 + free_funcs( &rmesa->vb.dfn_cache.MultiTexCoord3fARB ); + free_funcs( &rmesa->vb.dfn_cache.MultiTexCoord3fvARB ); +#endif free_funcs( &rmesa->vb.dfn_cache.MultiTexCoord2fARB ); free_funcs( &rmesa->vb.dfn_cache.MultiTexCoord2fvARB ); free_funcs( &rmesa->vb.dfn_cache.MultiTexCoord1fARB ); Index: Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt.h =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt.h,v retrieving revision 1.4 diff -u -r1.4 radeon_vtxfmt.h --- Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt.h 31 Jan 2005 23:40:06 -0000 1.4 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt.h 3 Sep 2005 18:55:04 -0000 @@ -49,6 +49,7 @@ extern void radeonVtxfmtUnbindContext( GLcontext *ctx ); extern void radeon_copy_to_current( GLcontext *ctx ); +extern void VFMT_FALLBACK( const char *caller ); #define DFN( FUNC, CACHE) \ do { \ Index: Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt_c.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt_c.c,v retrieving revision 1.7 diff -u -r1.7 radeon_vtxfmt_c.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt_c.c 18 Jul 2005 12:31:26 -0000 1.7 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt_c.c 3 Sep 2005 18:55:04 -0000 @@ -512,88 +512,142 @@ /* TexCoord */ -static void radeon_TexCoord1f( GLfloat s ) + +/* MultiTexcoord + * + * Technically speaking, these functions should subtract GL_TEXTURE0 from + * \c target before masking and using it. The value of GL_TEXTURE0 is 0x84C0, + * which has the low-order 5 bits 0. For all possible valid values of + * \c target. Subtracting GL_TEXTURE0 has the net effect of masking \c target + * with 0x1F. Masking with 0x1F and then masking with 0x01 is redundant, so + * the subtraction has been omitted. + */ + +/* \todo for tmu3: maybe (target & 2 ? 2 : target & 1) is more save than (target & 2) */ +static void radeon_MultiTexCoord1fARB( GLenum target, GLfloat s ) { GET_CURRENT_CONTEXT(ctx); radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - GLfloat *dest = rmesa->vb.texcoordptr[0]; - dest[0] = s; - dest[1] = 0; + GLint unit = (target & 3); + GLfloat * const dest = rmesa->vb.texcoordptr[unit]; + + switch( ctx->Texture.Unit[unit]._ReallyEnabled ) { + case TEXTURE_CUBE_BIT: + dest[2] = 0.0; + /* FALLTHROUGH */ + case TEXTURE_2D_BIT: + case TEXTURE_RECT_BIT: + case TEXTURE_1D_BIT: + default: + dest[1] = 0.0; + dest[0] = s; + } } -static void radeon_TexCoord1fv( const GLfloat *v ) +static void radeon_MultiTexCoord2fARB( GLenum target, GLfloat s, GLfloat t ) { GET_CURRENT_CONTEXT(ctx); radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - GLfloat *dest = rmesa->vb.texcoordptr[0]; - dest[0] = v[0]; - dest[1] = 0; + GLint unit = (target & 3); + GLfloat * const dest = rmesa->vb.texcoordptr[unit]; + + switch( ctx->Texture.Unit[unit]._ReallyEnabled ) { + case TEXTURE_CUBE_BIT: + dest[2] = 0.0; + /* FALLTHROUGH */ + case TEXTURE_2D_BIT: + case TEXTURE_RECT_BIT: + case TEXTURE_1D_BIT: + default: + dest[1] = t; + dest[0] = s; + } } -static void radeon_TexCoord2f( GLfloat s, GLfloat t ) +#if 0 /* \todo: make this work */ +static void radeon_MultiTexCoord3fARB(GLenum target, GLfloat s, GLfloat t, GLfloat r) { GET_CURRENT_CONTEXT(ctx); radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - GLfloat *dest = rmesa->vb.texcoordptr[0]; - dest[0] = s; - dest[1] = t; + GLint unit = (target & 3); + GLfloat * const dest = rmesa->vb.texcoordptr[unit]; + + if( RADEON_DEBUG & DEBUG_VFMT) + fprintf( stderr, "%s: rmesa->vb.texcoordptr[%d]=0x%0x\n", __FUNCTION__, unit, rmesa->vb.texcoordptr[unit]); + if( RADEON_DEBUG & DEBUG_VFMT) + fprintf( stderr, "%s: rmesa->vb.vertex_size=%d\n", __FUNCTION__, rmesa->vb.vertex_size); + if( RADEON_DEBUG & DEBUG_VFMT) + fprintf( stderr, "%s: old str: %f %f %f\n", __FUNCTION__, dest[0], dest[1], dest[2]); + + switch( ctx->Texture.Unit[unit]._ReallyEnabled ) { + case TEXTURE_CUBE_BIT: + dest[2] = r; + dest[1] = t; + dest[0] = s; + if( (RADEON_DEBUG & DEBUG_VFMT) && (RADEON_DEBUG & DEBUG_VERBOSE)) + fprintf( stderr, "%s: emit s %f t %f r %f to dest\n", + __FUNCTION__, s, t, r); + + break; + default: + VFMT_FALLBACK(__FUNCTION__); + GL_CALL(MultiTexCoord3fARB)(target, s, t, r); + return; + } } +#endif -static void radeon_TexCoord2fv( const GLfloat *v ) +static void radeon_TexCoord1f(GLfloat s) { - GET_CURRENT_CONTEXT(ctx); - radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - GLfloat *dest = rmesa->vb.texcoordptr[0]; - dest[0] = v[0]; - dest[1] = v[1]; + radeon_MultiTexCoord1fARB(GL_TEXTURE0, s); } +static void radeon_TexCoord2f(GLfloat s, GLfloat t) +{ + radeon_MultiTexCoord2fARB(GL_TEXTURE0, s, t); +} -/* MultiTexcoord - * - * Technically speaking, these functions should subtract GL_TEXTURE0 from - * \c target before masking and using it. The value of GL_TEXTURE0 is 0x84C0, - * which has the low-order 5 bits 0. For all possible valid values of - * \c target. Subtracting GL_TEXTURE0 has the net effect of masking \c target - * with 0x1F. Masking with 0x1F and then masking with 0x01 is redundant, so - * the subtraction has been omitted. - */ +#if 0 +static void radeon_TexCoord3f(GLfloat s, GLfloat t, GLfloat r) +{ + radeon_MultiTexCoord3fARB(GL_TEXTURE0, s, t, r); +} +#endif -static void radeon_MultiTexCoord1fARB( GLenum target, GLfloat s ) +static void radeon_TexCoord1fv(const GLfloat *v) { - GET_CURRENT_CONTEXT(ctx); - radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - GLfloat *dest = rmesa->vb.texcoordptr[target & 1]; - dest[0] = s; - dest[1] = 0; + radeon_MultiTexCoord1fARB(GL_TEXTURE0, v[0]); } -static void radeon_MultiTexCoord1fvARB( GLenum target, const GLfloat *v ) +static void radeon_TexCoord2fv(const GLfloat *v) { - GET_CURRENT_CONTEXT(ctx); - radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - GLfloat *dest = rmesa->vb.texcoordptr[target & 1]; - dest[0] = v[0]; - dest[1] = 0; + radeon_MultiTexCoord2fARB(GL_TEXTURE0, v[0], v[1]); } -static void radeon_MultiTexCoord2fARB( GLenum target, GLfloat s, GLfloat t ) +#if 0 +static void radeon_TexCoord3fv(const GLfloat *v) { - GET_CURRENT_CONTEXT(ctx); - radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - GLfloat *dest = rmesa->vb.texcoordptr[target & 1]; - dest[0] = s; - dest[1] = t; + radeon_MultiTexCoord3fARB(GL_TEXTURE0, v[0], v[1], v[2]); } +#endif -static void radeon_MultiTexCoord2fvARB( GLenum target, const GLfloat *v ) +static void radeon_MultiTexCoord1fvARB(GLenum target, const GLfloat *v) { - GET_CURRENT_CONTEXT(ctx); - radeonContextPtr rmesa = RADEON_CONTEXT(ctx); - GLfloat *dest = rmesa->vb.texcoordptr[target & 1]; - dest[0] = v[0]; - dest[1] = v[1]; + radeon_MultiTexCoord1fARB(target, v[0]); +} + +static void radeon_MultiTexCoord2fvARB(GLenum target, const GLfloat *v) +{ + radeon_MultiTexCoord2fARB(target, v[0], v[1]); +} + +#if 0 +static void radeon_MultiTexCoord3fvARB(GLenum target, const GLfloat *v) +{ + radeon_MultiTexCoord3fARB(target, v[0], v[1], v[2]); } +#endif + static struct dynfn *lookup( struct dynfn *l, int key ) { @@ -617,7 +671,8 @@ radeonContextPtr rmesa = RADEON_CONTEXT(ctx); \ int key = rmesa->vb.vertex_format & (MASK|ACTIVE); \ struct dynfn *dfn; \ - \ +if( RADEON_DEBUG & DEBUG_VFMT) fprintf( stderr, "%s: mask:%0x active:%0x\n", \ +__FUNCTION__ , MASK, ACTIVE); \ dfn = lookup( &rmesa->vb.dfn_cache.FN, key ); \ if (dfn == 0) \ dfn = rmesa->vb.codegen.FN( ctx, key ); \ @@ -746,7 +801,14 @@ #define ACTIVE_ST0 RADEON_CP_VC_FRMT_ST0 #define ACTIVE_ST1 RADEON_CP_VC_FRMT_ST1 -#define ACTIVE_ST_ALL (RADEON_CP_VC_FRMT_ST1|RADEON_CP_VC_FRMT_ST0) +#define ACTIVE_ST2 RADEON_CP_VC_FRMT_ST2 +#define ACTIVE_ST_ALL (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1|RADEON_CP_VC_FRMT_ST2) + +#define ACTIVE_STQ0 (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_Q0) +#define ACTIVE_STQ1 (RADEON_CP_VC_FRMT_ST1|RADEON_CP_VC_FRMT_Q1) +#define ACTIVE_STQ2 (RADEON_CP_VC_FRMT_ST2|RADEON_CP_VC_FRMT_Q2) +#define ACTIVE_STQ_ALL (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_Q0|RADEON_CP_VC_FRMT_ST1|RADEON_CP_VC_FRMT_Q1| \ + RADEON_CP_VC_FRMT_ST2|RADEON_CP_VC_FRMT_Q2) /* Each codegen function should be able to be fully specified by a * subsetted version of rmesa->vb.vertex_format. @@ -756,14 +818,22 @@ #define MASK_SPEC (MASK_COLOR|ACTIVE_COLOR) #define MASK_ST0 (MASK_SPEC|ACTIVE_SPEC) #define MASK_ST1 (MASK_ST0|ACTIVE_ST0) -#define MASK_ST_ALL (MASK_ST1|ACTIVE_ST1) -#define MASK_VERTEX (MASK_ST_ALL|ACTIVE_FPALPHA) +#define MASK_ST2 (MASK_ST1|ACTIVE_ST1) +#define MASK_ST_ALL (MASK_ST2|ACTIVE_ST2) + +#define MASK_STQ0 (MASK_ST0) +#define MASK_STQ1 (MASK_ST2|ACTIVE_STQ1) +#define MASK_STQ2 (MASK_ST_ALL|ACTIVE_STQ2) +#define MASK_STQ_ALL (MASK_ST_ALL|ACTIVE_STQ_ALL) + +#define MASK_VERTEX (MASK_STQ_ALL|ACTIVE_FPALPHA) typedef void (*p4f)( GLfloat, GLfloat, GLfloat, GLfloat ); typedef void (*p3f)( GLfloat, GLfloat, GLfloat ); typedef void (*p2f)( GLfloat, GLfloat ); typedef void (*p1f)( GLfloat ); +typedef void (*pe3f)( GLenum, GLfloat, GLfloat, GLfloat ); typedef void (*pe2f)( GLenum, GLfloat, GLfloat ); typedef void (*pe1f)( GLenum, GLfloat ); typedef void (*p4ub)( GLubyte, GLubyte, GLubyte, GLubyte ); @@ -810,6 +880,12 @@ CHOOSE_SECONDARY_COLOR(SecondaryColor3fvEXT, pfv, MASK_SPEC, ACTIVE_SPEC, (const GLfloat *v), (v)) +#if 0 +CHOOSE(TexCoord3f, p3f, MASK_STQ0, ACTIVE_STQ0, + (GLfloat a,GLfloat b,GLfloat c), (a,b,c)) +CHOOSE(TexCoord3fv, pfv, MASK_STQ0, ACTIVE_STQ0, + (const GLfloat *v), (v)) +#endif CHOOSE(TexCoord2f, p2f, MASK_ST0, ACTIVE_ST0, (GLfloat a,GLfloat b), (a,b)) CHOOSE(TexCoord2fv, pfv, MASK_ST0, ACTIVE_ST0, @@ -819,6 +895,12 @@ CHOOSE(TexCoord1fv, pfv, MASK_ST0, ACTIVE_ST0, (const GLfloat *v), (v)) +#if 0 +CHOOSE(MultiTexCoord3fARB, pe3f, MASK_STQ_ALL, ACTIVE_STQ_ALL, + (GLenum u,GLfloat a,GLfloat b,GLfloat c), (u,a,b,c)) +CHOOSE(MultiTexCoord3fvARB, pefv, MASK_STQ_ALL, ACTIVE_STQ_ALL, + (GLenum u,const GLfloat *v), (u,v)) +#endif CHOOSE(MultiTexCoord2fARB, pe2f, MASK_ST_ALL, ACTIVE_ST_ALL, (GLenum u,GLfloat a,GLfloat b), (u,a,b)) CHOOSE(MultiTexCoord2fvARB, pefv, MASK_ST_ALL, ACTIVE_ST_ALL, @@ -853,12 +935,20 @@ vfmt->MultiTexCoord1fvARB = choose_MultiTexCoord1fvARB; vfmt->MultiTexCoord2fARB = choose_MultiTexCoord2fARB; vfmt->MultiTexCoord2fvARB = choose_MultiTexCoord2fvARB; +#if 0 + vfmt->MultiTexCoord3fARB = choose_MultiTexCoord3fARB; + vfmt->MultiTexCoord3fvARB = choose_MultiTexCoord3fvARB; +#endif vfmt->Normal3f = choose_Normal3f; vfmt->Normal3fv = choose_Normal3fv; vfmt->TexCoord1f = choose_TexCoord1f; vfmt->TexCoord1fv = choose_TexCoord1fv; vfmt->TexCoord2f = choose_TexCoord2f; vfmt->TexCoord2fv = choose_TexCoord2fv; +#if 0 + vfmt->TexCoord3f = choose_TexCoord3f; + vfmt->TexCoord3fv = choose_TexCoord3fv; +#endif vfmt->Vertex2f = choose_Vertex2f; vfmt->Vertex2fv = choose_Vertex2fv; vfmt->Vertex3f = choose_Vertex3f; @@ -889,10 +979,25 @@ gen->Color4ubv = codegen_noop; gen->Normal3f = codegen_noop; gen->Normal3fv = codegen_noop; + +#if 0 + gen->TexCoord3f = codegen_noop; + gen->TexCoord3fv = codegen_noop; +#endif gen->TexCoord2f = codegen_noop; gen->TexCoord2fv = codegen_noop; + gen->TexCoord1f = codegen_noop; + gen->TexCoord1fv = codegen_noop; + +#if 0 + gen->MultiTexCoord3fARB = codegen_noop; + gen->MultiTexCoord3fvARB = codegen_noop; +#endif gen->MultiTexCoord2fARB = codegen_noop; gen->MultiTexCoord2fvARB = codegen_noop; + gen->MultiTexCoord1fARB = codegen_noop; + gen->MultiTexCoord1fvARB = codegen_noop; + gen->Vertex2f = codegen_noop; gen->Vertex2fv = codegen_noop; gen->Color3ub = codegen_noop; @@ -905,10 +1010,6 @@ gen->SecondaryColor3fvEXT = codegen_noop; gen->SecondaryColor3ubEXT = codegen_noop; gen->SecondaryColor3ubvEXT = codegen_noop; - gen->TexCoord1f = codegen_noop; - gen->TexCoord1fv = codegen_noop; - gen->MultiTexCoord1fARB = codegen_noop; - gen->MultiTexCoord1fvARB = codegen_noop; if (useCodegen) { #if defined(USE_X86_ASM) Index: Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt_sse.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt_sse.c,v retrieving revision 1.5 diff -u -r1.5 radeon_vtxfmt_sse.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt_sse.c 16 Feb 2005 15:02:25 -0000 1.5 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt_sse.c 3 Sep 2005 18:55:04 -0000 @@ -154,6 +154,7 @@ } } +#if 0 /* from r200: Temporarily disabled as it is broken w/the new cubemap code. - idr */ static struct dynfn *radeon_makeSSETexCoord2fv( GLcontext *ctx, int key ) { radeonContextPtr rmesa = RADEON_CONTEXT(ctx); @@ -178,7 +179,7 @@ if (RADEON_DEBUG & DEBUG_CODEGEN) fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key ); - if ((key & (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) == + if ((key & (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1|RADEON_CP_VC_FRMT_ST2)) == (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) { DFN ( _sse_MultiTexCoord2fv, rmesa->vb.dfn_cache.MultiTexCoord2fvARB ); FIXUP(dfn->code, 18, 0xdeadbeef, (int)rmesa->vb.texcoordptr[0]); @@ -197,7 +198,7 @@ if (RADEON_DEBUG & DEBUG_CODEGEN) fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key ); - if ((key & (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) == + if ((key & (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1|RADEON_CP_VC_FRMT_ST2)) == (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) { DFN ( _sse_MultiTexCoord2f, rmesa->vb.dfn_cache.MultiTexCoord2fARB ); FIXUP(dfn->code, 16, 0xdeadbeef, (int)rmesa->vb.texcoordptr[0]); @@ -207,6 +208,7 @@ } return dfn; } +#endif void radeonInitSSECodegen( struct dfn_generators *gen ) { @@ -215,10 +217,12 @@ gen->Normal3f = (void *) radeon_makeSSENormal3f; gen->Color3fv = (void *) radeon_makeSSEColor3fv; gen->Color3f = (void *) radeon_makeSSEColor3f; +#if 0 /* from r200: Temporarily disabled as it is broken w/the new cubemap code. - idr */ gen->TexCoord2fv = (void *) radeon_makeSSETexCoord2fv; gen->TexCoord2f = (void *) radeon_makeSSETexCoord2f; gen->MultiTexCoord2fvARB = (void *) radeon_makeSSEMultiTexCoord2fv; gen->MultiTexCoord2fARB = (void *) radeon_makeSSEMultiTexCoord2f; +#endif } } Index: Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt_x86.c =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt_x86.c,v retrieving revision 1.4 diff -u -r1.4 radeon_vtxfmt_x86.c --- Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt_x86.c 16 Feb 2005 15:02:25 -0000 1.4 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_vtxfmt_x86.c 3 Sep 2005 18:55:04 -0000 @@ -335,6 +335,7 @@ +#if 0 /* from r200: Temporarily disabled as it is broken w/the new cubemap code. - idr */ struct dynfn *radeon_makeX86TexCoord2fv( GLcontext *ctx, int key ) { radeonContextPtr rmesa = RADEON_CONTEXT(ctx); @@ -359,7 +360,7 @@ if (RADEON_DEBUG & DEBUG_CODEGEN) fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key ); - if ((key & (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) == + if ((key & (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1|RADEON_CP_VC_FRMT_ST2)) == (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) { DFN ( _x86_MultiTexCoord2fv, rmesa->vb.dfn_cache.MultiTexCoord2fvARB ); FIXUP(dfn->code, 21, 0xdeadbeef, (int)rmesa->vb.texcoordptr[0]); @@ -380,7 +381,7 @@ if (RADEON_DEBUG & DEBUG_CODEGEN) fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key ); - if ((key & (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) == + if ((key & (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1|RADEON_CP_VC_FRMT_ST2)) == (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) { DFN ( _x86_MultiTexCoord2f, rmesa->vb.dfn_cache.MultiTexCoord2fARB ); FIXUP(dfn->code, 20, 0xdeadbeef, (int)rmesa->vb.texcoordptr[0]); @@ -395,6 +396,7 @@ } return dfn; } +#endif void radeonInitX86Codegen( struct dfn_generators *gen ) @@ -405,10 +407,12 @@ gen->Color4ubv = radeon_makeX86Color4ubv; /* PKCOLOR only */ gen->Normal3f = radeon_makeX86Normal3f; gen->Normal3fv = radeon_makeX86Normal3fv; +#if 0 /* from r200: Temporarily disabled as it is broken w/the new cubemap code. - idr */ gen->TexCoord2f = radeon_makeX86TexCoord2f; gen->TexCoord2fv = radeon_makeX86TexCoord2fv; gen->MultiTexCoord2fARB = radeon_makeX86MultiTexCoord2fARB; gen->MultiTexCoord2fvARB = radeon_makeX86MultiTexCoord2fvARB; +#endif gen->Color3f = radeon_makeX86Color3f; gen->Color3fv = radeon_makeX86Color3fv; Index: Mesa/src/mesa/drivers/dri/radeon/radeon_vtxtmp_x86.S =================================================================== RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/radeon/radeon_vtxtmp_x86.S,v retrieving revision 1.2 diff -u -r1.2 radeon_vtxtmp_x86.S --- Mesa/src/mesa/drivers/dri/radeon/radeon_vtxtmp_x86.S 26 Apr 2004 10:10:23 -0000 1.2 +++ Mesa/src/mesa/drivers/dri/radeon/radeon_vtxtmp_x86.S 3 Sep 2005 18:55:04 -0000 @@ -338,7 +338,7 @@ GLOBL( _x86_MultiTexCoord2fv ) movl 4(%esp), %eax movl 8(%esp), %ecx - and $1, %eax + and $3, %eax movl (%ecx), %edx shl $3, %eax movl 4(%ecx), %ecx @@ -354,7 +354,7 @@ GLOBL( _x86_MultiTexCoord2fv_2 ) movl 4(%esp,1), %eax movl 8(%esp,1), %ecx - and $0x1, %eax + and $0x3, %eax movl 0(,%eax,4), %edx movl (%ecx), %eax movl %eax, (%edx) @@ -370,7 +370,7 @@ movl 4(%esp), %eax movl 8(%esp), %edx movl 12(%esp), %ecx - and $1, %eax + and $3, %eax shl $3, %eax movl %edx, 0xdeadbeef(%eax) movl %ecx, 0xdeadbeef(%eax) @@ -384,7 +384,7 @@ movl 4(%esp), %eax movl 8(%esp), %edx movl 12(%esp,1), %ecx - and $1,%eax + and $3,%eax movl 0(,%eax,4), %eax movl %edx, (%eax) movl %ecx, 4(%eax) @@ -450,7 +450,7 @@ GLOBL( _sse_MultiTexCoord2fv ) movl 4(%esp), %eax movl 8(%esp), %ecx - and $1, %eax + and $3, %eax movlps (%ecx), %xmm0 movlps %xmm0, 0xdeadbeef(,%eax,8) ret @@ -462,7 +462,7 @@ GLOBL( _sse_MultiTexCoord2fv_2 ) movl 4(%esp), %eax movl 8(%esp), %ecx - and $0x1, %eax + and $0x3, %eax movl 0(,%eax,4), %edx movlps (%ecx), %xmm0 movlps %xmm0, (%edx) @@ -474,7 +474,7 @@ */ GLOBL( _sse_MultiTexCoord2f ) movl 4(%esp), %eax - and $1, %eax + and $3, %eax movlps 8(%esp), %xmm0 movlps %xmm0, 0xdeadbeef(,%eax,8) ret @@ -486,7 +486,7 @@ GLOBL( _sse_MultiTexCoord2f_2 ) movl 4(%esp), %eax movlps 8(%esp), %xmm0 - and $1,%eax + and $3,%eax movl 0(,%eax,4), %eax movlps %xmm0, (%eax) ret