cvs diff: Diffing . Index: nv_driver.c =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v retrieving revision 1.16 diff -u -r1.16 nv_driver.c --- nv_driver.c 11 Jul 2005 02:29:57 -0000 1.16 +++ nv_driver.c 17 Sep 2005 01:27:30 -0000 @@ -29,7 +29,7 @@ /* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.135 2005/07/09 00:53:00 mvojkovi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.137 2005/09/14 02:28:03 mvojkovi Exp $ */ #include "nv_include.h" @@ -87,6 +87,8 @@ 0 }; +/* Known cards as of 2005/08/31 */ + static SymTabRec NVKnownChipsets[] = { { 0x12D20018, "RIVA 128" }, @@ -205,7 +207,7 @@ #else { 0x10DE0329, "0x0329" }, #endif - { 0x10DE032A, "Quadro NVS 280 PCI" }, + { 0x10DE032A, "Quadro NVS 55/280 PCI" }, { 0x10DE032B, "Quadro FX 500/600 PCI" }, { 0x10DE032C, "GeForce FX Go53xx Series" }, { 0x10DE032D, "GeForce FX Go5100" }, @@ -238,12 +240,14 @@ { 0x10DE0043, "0x0043" }, { 0x10DE0045, "GeForce 6800 GT" }, { 0x10DE0046, "GeForce 6800 GT" }, + { 0x10DE0048, "GeForce 6800 XT" }, { 0x10DE0049, "0x0049" }, { 0x10DE004E, "Quadro FX 4000" }, { 0x10DE00C0, "0x00C0" }, { 0x10DE00C1, "GeForce 6800" }, { 0x10DE00C2, "GeForce 6800 LE" }, + { 0x10DE00C3, "GeForce 6800 XT" }, { 0x10DE00C8, "GeForce Go 6800" }, { 0x10DE00C9, "GeForce Go 6800 Ultra" }, { 0x10DE00CC, "Quadro FX Go1400" }, @@ -266,16 +270,16 @@ { 0x10DE014E, "Quadro FX 540" }, { 0x10DE014F, "GeForce 6200" }, - { 0x10DE0160, "0x0160" }, + { 0x10DE0160, "GeForce 6500" }, { 0x10DE0161, "GeForce 6200 TurboCache(TM)" }, { 0x10DE0162, "GeForce 6200SE TurboCache(TM)" }, - { 0x10DE0163, "0x0163" }, + { 0x10DE0163, "GeForce 6200 LE" }, { 0x10DE0164, "GeForce Go 6200" }, { 0x10DE0165, "Quadro NVS 285" }, { 0x10DE0166, "GeForce Go 6400" }, { 0x10DE0167, "GeForce Go 6200" }, { 0x10DE0168, "GeForce Go 6400" }, - { 0x10DE0169, "0x0169" }, + { 0x10DE0169, "GeForce 6250" }, { 0x10DE016B, "0x016B" }, { 0x10DE016C, "0x016C" }, { 0x10DE016D, "0x016D" }, @@ -293,7 +297,7 @@ { 0x10DE0090, "0x0090" }, { 0x10DE0091, "GeForce 7800 GTX" }, - { 0x10DE0092, "0x0092" }, + { 0x10DE0092, "GeForce 7800 GT" }, { 0x10DE0093, "0x0093" }, { 0x10DE0094, "0x0094" }, { 0x10DE0098, "0x0098" }, @@ -699,6 +703,8 @@ case 0x0210: case 0x0220: case 0x0230: + case 0x0290: + case 0x0390: NVChipsets[numUsed].token = pciid; NVChipsets[numUsed].name = "Unknown NVIDIA chip"; NVPciChipsets[numUsed].numChipset = pciid; @@ -1389,6 +1395,8 @@ case 0x0210: case 0x0220: case 0x0230: + case 0x0290: + case 0x0390: pNv->Architecture = NV_ARCH_40; break; default: @@ -1425,9 +1433,13 @@ } } - pNv->FbUsableSize = pNv->FbMapSize - (128 * 1024); + if(pNv->Architecture >= NV_ARCH_40) + pNv->FbUsableSize = pNv->FbMapSize - (560 * 1024); + else + pNv->FbUsableSize = pNv->FbMapSize - (128 * 1024); pNv->ScratchBufferSize = (pNv->Architecture < NV_ARCH_10) ? 8192 : 16384; pNv->ScratchBufferStart = pNv->FbUsableSize - pNv->ScratchBufferSize; + pNv->CursorStart = pNv->FbUsableSize + (32 * 1024); /* * Setup the ClockRanges, which describe what clock ranges are available, Index: nv_hw.c =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c,v retrieving revision 1.7 diff -u -r1.7 nv_hw.c --- nv_hw.c 11 Jul 2005 02:29:58 -0000 1.7 +++ nv_hw.c 17 Sep 2005 01:27:30 -0000 @@ -36,7 +36,7 @@ |* those rights set forth herein. *| |* *| \***************************************************************************/ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c,v 1.15 2005/02/03 23:16:50 mvojkovi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c,v 1.16 2005/09/14 02:28:03 mvojkovi Exp $ */ #ifdef HAVE_CONFIG_H #include "config.h" @@ -932,16 +932,28 @@ if(pNv->Architecture == NV_ARCH_04) { pNv->PFB[0x0200/4] = state->config; - } else if ((pNv->Chipset & 0xfff0) == 0x0090) { - for(i = 0; i < 15; i++) { - pNv->PFB[(0x0600 + (i * 0x10))/4] = 0; - pNv->PFB[(0x0604 + (i * 0x10))/4] = pNv->FbMapSize - 1; - } - } else { + } else + if((pNv->Architecture < NV_ARCH_40) || + ((pNv->Chipset & 0xfff0) == 0x0040)) + { for(i = 0; i < 8; i++) { pNv->PFB[(0x0240 + (i * 0x10))/4] = 0; pNv->PFB[(0x0244 + (i * 0x10))/4] = pNv->FbMapSize - 1; } + } else { + int regions = 12; + + if(((pNv->Chipset & 0xfff0) == 0x0090) || + ((pNv->Chipset & 0xfff0) == 0x01D0) || + ((pNv->Chipset & 0xfff0) == 0x0290)) + { + regions = 15; + } + + for(i = 0; i < regions; i++) { + pNv->PFB[(0x0600 + (i * 0x10))/4] = 0; + pNv->PFB[(0x0604 + (i * 0x10))/4] = pNv->FbMapSize - 1; + } } if(pNv->Architecture >= NV_ARCH_40) { @@ -1176,6 +1188,7 @@ pNv->PFB[0x033C/4] &= 0xffff7fff; break; case 0x00C0: + case 0x0120: pNv->PGRAPH[0x0828/4] = 0x007596ff; pNv->PGRAPH[0x082C/4] = 0x00000108; break; @@ -1200,6 +1213,7 @@ pNv->PRAMDAC[0x0608/4] |= 0x00100000; break; case 0x0090: + case 0x0290: pNv->PRAMDAC[0x0608/4] |= 0x00100000; pNv->PGRAPH[0x0828/4] = 0x07830610; pNv->PGRAPH[0x082C/4] = 0x0000016A; @@ -1247,12 +1261,22 @@ } } - if((pNv->Chipset & 0xfff0) == 0x0090) { - for(i = 0; i < 60; i++) - pNv->PGRAPH[(0x0D00/4) + i] = pNv->PFB[(0x0600/4) + i]; - } else { + if((pNv->Architecture < NV_ARCH_40) || + ((pNv->Chipset & 0xfff0) == 0x0040)) + { for(i = 0; i < 32; i++) pNv->PGRAPH[(0x0900/4) + i] = pNv->PFB[(0x0240/4) + i]; + } else { + if(((pNv->Chipset & 0xfff0) == 0x0090) || + ((pNv->Chipset & 0xfff0) == 0x01D0) || + ((pNv->Chipset & 0xfff0) == 0x0290)) + { + for(i = 0; i < 60; i++) + pNv->PGRAPH[(0x0D00/4) + i] = pNv->PFB[(0x0600/4) + i]; + } else { + for(i = 0; i < 48; i++) + pNv->PGRAPH[(0x0900/4) + i] = pNv->PFB[(0x0600/4) + i]; + } } if(pNv->Architecture >= NV_ARCH_40) { @@ -1267,7 +1291,10 @@ pNv->PGRAPH[0x0864/4] = pNv->FbMapSize - 1; pNv->PGRAPH[0x0868/4] = pNv->FbMapSize - 1; } else { - if((pNv->Chipset & 0xfff0) == 0x0090) { + if(((pNv->Chipset & 0xfff0) == 0x0090) || + ((pNv->Chipset & 0xfff0) == 0x01D0) || + ((pNv->Chipset & 0xfff0) == 0x0290)) + { pNv->PGRAPH[0x0DF0/4] = pNv->PFB[0x0200/4]; pNv->PGRAPH[0x0DF4/4] = pNv->PFB[0x0204/4]; } else { Index: nv_setup.c =================================================================== RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c,v retrieving revision 1.8 diff -u -r1.8 nv_setup.c --- nv_setup.c 5 Aug 2005 03:52:28 -0000 1.8 +++ nv_setup.c 17 Sep 2005 01:27:30 -0000 @@ -37,7 +37,7 @@ |* *| \***************************************************************************/ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c,v 1.47 2005/08/03 17:39:31 mvojkovi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_setup.c,v 1.48 2005/09/14 02:28:03 mvojkovi Exp $ */ #ifdef HAVE_CONFIG_H #include "config.h" @@ -317,7 +317,6 @@ pNv->CrystalFreqKHz = 27000; } - pNv->CursorStart = (pNv->RamAmountKBytes - 96) * 1024; pNv->CURSOR = NULL; /* can't set this here */ pNv->MinVClockFreqKHz = 12000; pNv->MaxVClockFreqKHz = pNv->twoStagePLL ? 400000 : 350000;