From 5ed1b3e4f53dfc0dfdaa6137cadabc14c05340dc Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Fri, 26 Feb 2010 17:19:39 +0000 Subject: [PATCH] agp/intel: Force a delay on i830/i845 to flush memory Papers over: http://bugs.freedesktop.org/show_bug.cgi?id=26345 Bug 26345 - [i845G] x11perf freeze The essence of the bug is that the GPU begins executing the batch buffer prior to it being flushed to main memory - despite the fact that we have multiple memory barriers before we write to and advance the ringbuffer. The only means so far of ensuring that the batch buffer is consistent is to wait for a sufficiently long time... Signed-off-by: Chris Wilson --- drivers/char/agp/intel-agp.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c index e5ffefe..5b8a570 100644 --- a/drivers/char/agp/intel-agp.c +++ b/drivers/char/agp/intel-agp.c @@ -8,6 +8,7 @@ #include #include #include +#include #include "agp.h" /* @@ -843,6 +844,11 @@ static void intel_i830_chipset_flush(struct agp_bridge_data *bridge) if (on_each_cpu(do_wbinvd, NULL, 1) != 0) printk(KERN_ERR "Timed out waiting for cache flush.\n"); } + + /* XXX not even memory barriers are sufficient to flush memory before the + * GPU tries to execute. + */ + msleep(10); } /* The intel i830 automatically initializes the agp aperture during POST. -- 1.7.0