CHDECMISC: 0x0000002d (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep present) C0DRB0: 0x00100008 (0x0008) C0DRB1: 0x00100010 (0x0010) C0DRB2: 0x00100010 (0x0010) C0DRB3: 0x02020010 (0x0010) C1DRB0: 0x00000000 (0x0000) C1DRB1: 0x00000000 (0x0000) C1DRB2: 0x00000000 (0x0000) C1DRB3: 0x00000000 (0x0000) C0DRA01: 0x00000202 (0x0202) C0DRA23: 0x00000000 (0x0000) C1DRA01: 0x00000000 (0x0000) C1DRA23: 0x00000000 (0x0000) PGETBL_CTL: 0x3f780001 VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) DPLL_TEST: 0x00010001 () CACHE_MODE_0: 0x00006800 D_STATE: 0x00000000 DSPCLK_GATE_D: 0x00040000 (clock gates disabled: DSSUNIT) RENCLK_GATE_D1: 0x70810000 RENCLK_GATE_D2: 0x00000000 SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected) SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected) SDVOUDI: 0x00000000 DSPARB: 0x00001d9c DSPFW1: 0x09880808 DSPFW2: 0x00000808 DSPFW3: 0x00000000 ADPA: 0x80000000 (enabled, pipe A, -hsync, -vsync) LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel) DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync) DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync) DVOA_SRCDIM: 0x00000000 DVOB_SRCDIM: 0x00000000 DVOC_SRCDIM: 0x00000000 PP_CONTROL: 0x00000000 (power target: off) PP_STATUS: 0x00000000 (off, not ready, sequencing idle) PP_ON_DELAYS: 0x00000000 PP_OFF_DELAYS: 0x00000000 PP_DIVISOR: 0x00000000 PFIT_CONTROL: 0x00000000 PFIT_PGM_RATIOS: 0x00000000 PORT_HOTPLUG_EN: 0x00000220 PORT_HOTPLUG_STAT: 0x00000300 DSPACNTR: 0xd8000000 (enabled, pipe A) DSPASTRIDE: 0x00000d00 (3328 bytes) DSPAPOS: 0x00000000 (0, 0) DSPASIZE: 0x00000000 (1, 1) DSPABASE: 0x00000000 DSPASURF: 0x07171000 DSPATILEOFF: 0x00000000 PIPEACONF: 0xc0000000 (enabled, active) PIPEASRC: 0x033f026f (832, 624) PIPEASTAT: 0x00000307 (status: VSYNC_INT_STATUS DLINE_COMPARE_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) PIPEA_GMCH_DATA_M: 0x00000000 PIPEA_GMCH_DATA_N: 0x00000000 PIPEA_DP_LINK_M: 0x00000000 PIPEA_DP_LINK_N: 0x00000000 CURSOR_A_BASE: 0x014f0000 CURSOR_A_CONTROL: 0x04000027 CURSOR_A_POSITION: 0x014201ce FPA0: 0x00031407 (n = 3, m1 = 20, m2 = 7) FPA1: 0x00031407 (n = 3, m1 = 20, m2 = 7) DPLL_A: 0x80000000 (enabled, non-dvo, VGA, default clock, unknown mode, p1 = 0, p2 = 0) DPLL_A_MD: 0x00000000 HTOTAL_A: 0x047f033f (832 active, 1152 total) HBLANK_A: 0x047f033f (832 start, 1152 end) HSYNC_A: 0x039f035f (864 start, 928 end) VTOTAL_A: 0x029a026f (624 active, 667 total) VBLANK_A: 0x029a026f (624 start, 667 end) VSYNC_A: 0x02730270 (625 start, 628 end) BCLRPAT_A: 0x00000000 VSYNCSHIFT_A: 0x00000000 DSPBCNTR: 0x01000000 (disabled, pipe B) DSPBSTRIDE: 0x00000000 (0 bytes) DSPBPOS: 0x00000000 (0, 0) DSPBSIZE: 0x00000000 (1, 1) DSPBBASE: 0x00000000 DSPBSURF: 0x00000000 DSPBTILEOFF: 0x00000000 PIPEBCONF: 0x00000000 (disabled, inactive) PIPEBSRC: 0x027f01df (640, 480) PIPEBSTAT: 0x00000000 (status:) PIPEB_GMCH_DATA_M: 0x00000000 PIPEB_GMCH_DATA_N: 0x00000000 PIPEB_DP_LINK_M: 0x00000000 PIPEB_DP_LINK_N: 0x00000000 CURSOR_B_BASE: 0x00000000 CURSOR_B_CONTROL: 0x00000000 CURSOR_B_POSITION: 0x00000000 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8) FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) DPLL_B: 0x04800c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) DPLL_B_MD: 0x00000303 HTOTAL_B: 0x031f027f (640 active, 800 total) HBLANK_B: 0x03170287 (648 start, 792 end) HSYNC_B: 0x02ef028f (656 start, 752 end) VTOTAL_B: 0x020c01df (480 active, 525 total) VBLANK_B: 0x020401e7 (488 start, 517 end) VSYNC_B: 0x01eb01e9 (490 start, 492 end) BCLRPAT_B: 0x00000000 VSYNCSHIFT_B: 0x00000000 VCLK_DIVISOR_VGA0: 0x00031108 VCLK_DIVISOR_VGA1: 0x00031406 VCLK_POST_DIV: 0x00020002 VGACNTRL: 0x80000000 (disabled) TV_CTL: 0x00000000 TV_DAC: 0x00000000 TV_CSC_Y: 0x00000000 TV_CSC_Y2: 0x00000000 TV_CSC_U: 0x00000000 TV_CSC_U2: 0x00000000 TV_CSC_V: 0x00000000 TV_CSC_V2: 0x00000000 TV_CLR_KNOBS: 0x00000000 TV_CLR_LEVEL: 0x00000000 TV_H_CTL_1: 0x00000000 TV_H_CTL_2: 0x00000000 TV_H_CTL_3: 0x00000000 TV_V_CTL_1: 0x00000000 TV_V_CTL_2: 0x00000000 TV_V_CTL_3: 0x00000000 TV_V_CTL_4: 0x00000000 TV_V_CTL_5: 0x00000000 TV_V_CTL_6: 0x00000000 TV_V_CTL_7: 0x00000000 TV_SC_CTL_1: 0x00000000 TV_SC_CTL_2: 0x00000000 TV_SC_CTL_3: 0x00000000 TV_WIN_POS: 0x00000000 TV_WIN_SIZE: 0x00000000 TV_FILTER_CTL_1: 0x00000000 TV_FILTER_CTL_2: 0x00000000 TV_FILTER_CTL_3: 0x00000000 TV_CC_CONTROL: 0x00000000 TV_CC_DATA: 0x00000000 TV_H_LUMA_0: 0x00000000 TV_H_LUMA_59: 0x00000000 TV_H_CHROMA_0: 0x00000000 TV_H_CHROMA_59: 0x00000000 FBC_CFB_BASE: 0xffffffff FBC_LL_BASE: 0xffffffff FBC_CONTROL: 0xffffffff FBC_COMMAND: 0xffffffff FBC_STATUS: 0xffffffff FBC_CONTROL2: 0xffffffff FBC_FENCE_OFF: 0xffffffff FBC_MOD_NUM: 0xffffffff MI_MODE: 0x00000200 MI_ARB_STATE: 0x00000044 MI_RDRET_STATE: 0x00000000 ECOSKPD: 0x00000307 DP_B: 0x00000000 DPB_AUX_CH_CTL: 0x00000000 DPB_AUX_CH_DATA1: 0x00000000 DPB_AUX_CH_DATA2: 0x00000000 DPB_AUX_CH_DATA3: 0x00000000 DPB_AUX_CH_DATA4: 0x00000000 DPB_AUX_CH_DATA5: 0x00000000 DP_C: 0x00000000 DPC_AUX_CH_CTL: 0x00000000 DPC_AUX_CH_DATA1: 0x00000000 DPC_AUX_CH_DATA2: 0x00000000 DPC_AUX_CH_DATA3: 0x00000000 DPC_AUX_CH_DATA4: 0x00000000 DPC_AUX_CH_DATA5: 0x00000000 DP_D: 0x00000000 DPD_AUX_CH_CTL: 0x00000000 DPD_AUX_CH_DATA1: 0x00000000 DPD_AUX_CH_DATA2: 0x00000000 DPD_AUX_CH_DATA3: 0x00000000 DPD_AUX_CH_DATA4: 0x00000000 DPD_AUX_CH_DATA5: 0x00000000 AUD_CONFIG: 0x00000000 AUD_HDMIW_STATUS: 0x00000000 AUD_CONV_CHCNT: 0x00000000 VIDEO_DIP_CTL: 0x00000000 AUD_PINW_CNTR: 0x00000000 AUD_CNTL_ST: 0x00000000 AUD_PIN_CAP: 0x00000000 AUD_PINW_CAP: 0x00000000 AUD_PINW_UNSOLRESP: 0x00000000 AUD_OUT_DIG_CNVT: 0x00000000 AUD_OUT_CWCAP: 0x00000000 AUD_GRP_CAP: 0x00000000 FENCE START 0: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 0: 0x00000000 ( 0x00000000 end) FENCE START 1: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 1: 0x00000000 ( 0x00000000 end) FENCE START 2: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 2: 0x00000000 ( 0x00000000 end) FENCE START 3: 0x0641400d ( enabled, X tile walk, 384 pitch, 0x06414000 start) FENCE END 3: 0x06417000 ( 0x06417000 end) FENCE START 4: 0x0684801d ( enabled, X tile walk, 896 pitch, 0x06848000 start) FENCE END 4: 0x0684f000 ( 0x0684f000 end) FENCE START 5: 0x0685001d ( enabled, X tile walk, 896 pitch, 0x06850000 start) FENCE END 5: 0x06857000 ( 0x06857000 end) FENCE START 6: 0x0685801d ( enabled, X tile walk, 896 pitch, 0x06858000 start) FENCE END 6: 0x0685f000 ( 0x0685f000 end) FENCE START 7: 0x0684001d ( enabled, X tile walk, 896 pitch, 0x06840000 start) FENCE END 7: 0x06847000 ( 0x06847000 end) FENCE START 8: 0x0686001d ( enabled, X tile walk, 896 pitch, 0x06860000 start) FENCE END 8: 0x06867000 ( 0x06867000 end) FENCE START 9: 0x0686801d ( enabled, X tile walk, 896 pitch, 0x06868000 start) FENCE END 9: 0x0686f000 ( 0x0686f000 end) FENCE START 10: 0x0687001d ( enabled, X tile walk, 896 pitch, 0x06870000 start) FENCE END 10: 0x06877000 ( 0x06877000 end) FENCE START 11: 0x0687801d ( enabled, X tile walk, 896 pitch, 0x06878000 start) FENCE END 11: 0x0687f000 ( 0x0687f000 end) FENCE START 12: 0x05a2000d ( enabled, X tile walk, 384 pitch, 0x05a20000 start) FENCE END 12: 0x05a23000 ( 0x05a23000 end) FENCE START 13: 0x0c70400d ( enabled, X tile walk, 384 pitch, 0x0c704000 start) FENCE END 13: 0x0c707000 ( 0x0c707000 end) FENCE START 14: 0x0641000d ( enabled, X tile walk, 384 pitch, 0x06410000 start) FENCE END 14: 0x06413000 ( 0x06413000 end) FENCE START 15: 0x0bcc900d ( enabled, X tile walk, 384 pitch, 0x0bcc9000 start) FENCE END 15: 0x0bcd8000 ( 0x0bcd8000 end) INST_PM: 0x00000000 p1 out of range SDVO phase shift 0 out of range -- probobly not an issue. pipe A dot 228480 n 3 m1 20 m2 7 p1 1 p2 10 pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10