From 7e03e1e6f9aa578f1285cf73e44f35c682af417e Mon Sep 17 00:00:00 2001 From: Zhao Yakui Date: Tue, 30 Mar 2010 11:08:33 +0800 Subject: [PATCH] drm/i915: Update the self-refresh watermark correctly on 965 platform Signed-off-by: Zhao Yakui --- drivers/gpu/drm/i915/intel_display.c | 20 ++++++++++---------- 1 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index b27202d..6420e42 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2665,7 +2665,7 @@ static void i965_update_wm(struct drm_device *dev, int planea_clock, int planeb_clock, int sr_hdisplay, int pixel_size) { struct drm_i915_private *dev_priv = dev->dev_private; - unsigned long line_time_us; + unsigned long line_time_ns; int sr_clock, sr_entries, srwm = 1; /* Calc sr entries for one plane configs */ @@ -2674,17 +2674,15 @@ static void i965_update_wm(struct drm_device *dev, int planea_clock, static const int sr_latency_ns = 12000; sr_clock = planea_clock ? planea_clock : planeb_clock; - line_time_us = ((sr_hdisplay * 1000) / sr_clock); + line_time_ns = (sr_hdisplay * 1000) / (sr_clock / 1000); /* Use ns/us then divide to preserve precision */ - sr_entries = (((sr_latency_ns / line_time_us) + 1) * - pixel_size * sr_hdisplay) / 1000; - sr_entries = roundup(sr_entries / I915_FIFO_LINE_SIZE, 1); - DRM_DEBUG("self-refresh entries: %d\n", sr_entries); - srwm = I945_FIFO_SIZE - sr_entries; - if (srwm < 0) - srwm = 1; - srwm &= 0x3f; + sr_entries = ((sr_latency_ns / line_time_ns) + 1000) / 1000 * + pixel_size * sr_hdisplay; + sr_entries = DIV_ROUND_UP(sr_entries, I915_FIFO_LINE_SIZE); + DRM_DEBUG_KMS("self-refresh entries: %d\n", sr_entries); + srwm = 512 - sr_entries; + I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN); } else { /* Turn off self refresh if both pipes are enabled */ @@ -2699,6 +2697,8 @@ static void i965_update_wm(struct drm_device *dev, int planea_clock, I915_WRITE(DSPFW1, (srwm << DSPFW_SR_SHIFT) | (8 << 16) | (8 << 8) | (8 << 0)); I915_WRITE(DSPFW2, (8 << 8) | (8 << 0)); + /* update the cursor self-refresh watermark */ + I915_WRITE(DSPFW3, (16 << 24)); } static void i9xx_update_wm(struct drm_device *dev, int planea_clock, -- 1.5.4.5