Using KMS, 2.6.34 xf86-video-intel-2.11.0 After clean boot before starting xorg: DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11) CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) C0DRB0: 0x000f0002 (0x0002) C0DRB1: 0x0000000f (0x000f) C0DRB2: 0x00000000 (0x0000) C0DRB3: 0x00c00000 (0x0000) C1DRB0: 0x17cbe000 (0xe000) C1DRB1: 0x000017cb (0x17cb) C1DRB2: 0x00000000 (0x0000) C1DRB3: 0x00000000 (0x0000) C0DRA01: 0x000300c0 (0x00c0) C0DRA23: 0x000c0003 (0x0003) C1DRA01: 0x00000000 (0x0000) C1DRA23: 0x00000000 (0x0000) PGETBL_CTL: 0xbff80001 VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) DPLL_TEST: 0x00010001 () CACHE_MODE_0: 0x00006800 D_STATE: 0x00000000 DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) RENCLK_GATE_D1: 0x20000000 RENCLK_GATE_D2: 0x00000000 SDVOB: 0x800000dc (enabled, pipe A, stall disabled, detected) SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected) SDVOUDI: 0x00000000 DSPARB: 0x00001d9c DSPFW1: 0x00880808 DSPFW2: 0x00000808 DSPFW3: 0x00000000 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync) LVDS: 0xc2300300 (enabled, pipe B, 18 bit, 1 channel) DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOB: 0x800000dc (enabled, pipe A, no stall, +hsync, +vsync) DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync) DVOA_SRCDIM: 0x00000000 DVOB_SRCDIM: 0x00000000 DVOC_SRCDIM: 0x00000000 PP_CONTROL: 0x00000003 (power target: on) PP_STATUS: 0xc0000008 (on, ready, sequencing idle) PP_ON_DELAYS: 0x025807d0 PP_OFF_DELAYS: 0x01f407d0 PP_DIVISOR: 0x00410905 PFIT_CONTROL: 0x00000000 PFIT_PGM_RATIOS: 0x0d551000 PORT_HOTPLUG_EN: 0x04000220 PORT_HOTPLUG_STAT: 0x00000000 DSPACNTR: 0xd8000000 (enabled, pipe A) DSPASTRIDE: 0x00001e00 (7680 bytes) DSPAPOS: 0x00000000 (0, 0) DSPASIZE: 0x00000000 (1, 1) DSPABASE: 0x00000000 DSPASURF: 0x007f0000 DSPATILEOFF: 0x00000000 PIPEACONF: 0xc0000000 (enabled, active) PIPEASRC: 0x077f0437 (1920, 1080) PIPEASTAT: 0x00000207 (status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) PIPEA_GMCH_DATA_M: 0x00000000 PIPEA_GMCH_DATA_N: 0x00000000 PIPEA_DP_LINK_M: 0x00000000 PIPEA_DP_LINK_N: 0x00000000 CURSOR_A_BASE: 0x00000000 CURSOR_A_CONTROL: 0x00000000 CURSOR_A_POSITION: 0x00000000 FPA0: 0x00040f06 (n = 4, m1 = 15, m2 = 6) FPA1: 0x00040f06 (n = 4, m1 = 15, m2 = 6) DPLL_A: 0xd4010c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 1, p2 = 10) DPLL_A_MD: 0x00000000 HTOTAL_A: 0x0897077f (1920 active, 2200 total) HBLANK_A: 0x0897077f (1920 start, 2200 end) HSYNC_A: 0x080307d7 (2008 start, 2052 end) VTOTAL_A: 0x04640437 (1080 active, 1125 total) VBLANK_A: 0x04640437 (1080 start, 1125 end) VSYNC_A: 0x0440043b (1084 start, 1089 end) BCLRPAT_A: 0x00000000 VSYNCSHIFT_A: 0x00000000 DSPBCNTR: 0xd9000000 (enabled, pipe B) DSPBSTRIDE: 0x00001e00 (7680 bytes) DSPBPOS: 0x00000000 (0, 0) DSPBSIZE: 0x00000000 (1, 1) DSPBBASE: 0x00000000 DSPBSURF: 0x007f0000 DSPBTILEOFF: 0x00000000 PIPEBCONF: 0xc0000000 (enabled, active) PIPEBSRC: 0x04ff031f (1280, 800) PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS) PIPEB_GMCH_DATA_M: 0x00000000 PIPEB_GMCH_DATA_N: 0x00000000 PIPEB_DP_LINK_M: 0x00000000 PIPEB_DP_LINK_N: 0x00000000 CURSOR_B_BASE: 0x00000000 CURSOR_B_CONTROL: 0x00000000 CURSOR_B_POSITION: 0x00000000 FPB0: 0x00010b06 (n = 1, m1 = 11, m2 = 6) FPB1: 0x00010b06 (n = 1, m1 = 11, m2 = 6) DPLL_B: 0x98020c00 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14) DPLL_B_MD: 0x00000000 HTOTAL_B: 0x068f04ff (1280 active, 1680 total) HBLANK_B: 0x068f04ff (1280 start, 1680 end) HSYNC_B: 0x05c70547 (1352 start, 1480 end) VTOTAL_B: 0x033e031f (800 active, 831 total) VBLANK_B: 0x033e031f (800 start, 831 end) VSYNC_B: 0x03280322 (803 start, 809 end) BCLRPAT_B: 0x00000000 VSYNCSHIFT_B: 0x00000000 VCLK_DIVISOR_VGA0: 0x00031108 VCLK_DIVISOR_VGA1: 0x00031406 VCLK_POST_DIV: 0x00020002 VGACNTRL: 0x80000000 (disabled) TV_CTL: 0x00000000 TV_DAC: 0x70000000 TV_CSC_Y: 0x00000000 TV_CSC_Y2: 0x00000000 TV_CSC_U: 0x00000000 TV_CSC_U2: 0x00000000 TV_CSC_V: 0x00000000 TV_CSC_V2: 0x00000000 TV_CLR_KNOBS: 0x00000000 TV_CLR_LEVEL: 0x00000000 TV_H_CTL_1: 0x00000000 TV_H_CTL_2: 0x00000000 TV_H_CTL_3: 0x00000000 TV_V_CTL_1: 0x00000000 TV_V_CTL_2: 0x00000000 TV_V_CTL_3: 0x00000000 TV_V_CTL_4: 0x00000000 TV_V_CTL_5: 0x00000000 TV_V_CTL_6: 0x00000000 TV_V_CTL_7: 0x00000000 TV_SC_CTL_1: 0x00000000 TV_SC_CTL_2: 0x00000000 TV_SC_CTL_3: 0x00000000 TV_WIN_POS: 0x00000000 TV_WIN_SIZE: 0x00000000 TV_FILTER_CTL_1: 0x00000000 TV_FILTER_CTL_2: 0x00000000 TV_FILTER_CTL_3: 0x00000000 TV_CC_CONTROL: 0x00000000 TV_CC_DATA: 0x00000000 TV_H_LUMA_0: 0x00000000 TV_H_LUMA_59: 0x00000000 TV_H_CHROMA_0: 0x00000000 TV_H_CHROMA_59: 0x00000000 FBC_CFB_BASE: 0xbf800000 FBC_LL_BASE: 0xbf000000 FBC_CONTROL: 0x00000000 FBC_COMMAND: 0x00000000 FBC_STATUS: 0x20000000 FBC_CONTROL2: 0x00000000 FBC_FENCE_OFF: 0x00000000 FBC_MOD_NUM: 0x00000000 MI_MODE: 0x00000240 MI_ARB_STATE: 0x00000044 MI_RDRET_STATE: 0x00000000 ECOSKPD: 0x00000307 DP_B: 0x00000000 DPB_AUX_CH_CTL: 0x00000000 DPB_AUX_CH_DATA1: 0x00000000 DPB_AUX_CH_DATA2: 0x00000000 DPB_AUX_CH_DATA3: 0x00000000 DPB_AUX_CH_DATA4: 0x00000000 DPB_AUX_CH_DATA5: 0x00000000 DP_C: 0x00000000 DPC_AUX_CH_CTL: 0x00000000 DPC_AUX_CH_DATA1: 0x00000000 DPC_AUX_CH_DATA2: 0x00000000 DPC_AUX_CH_DATA3: 0x00000000 DPC_AUX_CH_DATA4: 0x00000000 DPC_AUX_CH_DATA5: 0x00000000 DP_D: 0x00000000 DPD_AUX_CH_CTL: 0x00000000 DPD_AUX_CH_DATA1: 0x00000000 DPD_AUX_CH_DATA2: 0x00000000 DPD_AUX_CH_DATA3: 0x00000000 DPD_AUX_CH_DATA4: 0x00000000 DPD_AUX_CH_DATA5: 0x00000000 AUD_CONFIG: 0x00000000 AUD_HDMIW_STATUS: 0x00000000 AUD_CONV_CHCNT: 0x00000000 VIDEO_DIP_CTL: 0x00000600 AUD_PINW_CNTR: 0x00000140 AUD_CNTL_ST: 0x00001800 AUD_PIN_CAP: 0x00000094 AUD_PINW_CAP: 0x004013b5 AUD_PINW_UNSOLRESP: 0x00000000 AUD_OUT_DIG_CNVT: 0x00000001 AUD_OUT_CWCAP: 0x00000219 AUD_GRP_CAP: 0x00000004 FENCE START 0: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 0: 0x00000000 ( 0x00000000 end) FENCE START 1: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 1: 0x00000000 ( 0x00000000 end) FENCE START 2: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 2: 0x00000000 ( 0x00000000 end) FENCE START 3: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 3: 0x00000000 ( 0x00000000 end) FENCE START 4: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 4: 0x00000000 ( 0x00000000 end) FENCE START 5: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 5: 0x00000000 ( 0x00000000 end) FENCE START 6: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 6: 0x00000000 ( 0x00000000 end) FENCE START 7: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 7: 0x00000000 ( 0x00000000 end) FENCE START 8: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 8: 0x00000000 ( 0x00000000 end) FENCE START 9: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 9: 0x00000000 ( 0x00000000 end) FENCE START 10: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 10: 0x00000000 ( 0x00000000 end) FENCE START 11: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 11: 0x00000000 ( 0x00000000 end) FENCE START 12: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 12: 0x00000000 ( 0x00000000 end) FENCE START 13: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 13: 0x00000000 ( 0x00000000 end) FENCE START 14: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 14: 0x00000000 ( 0x00000000 end) FENCE START 15: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 15: 0x00000000 ( 0x00000000 end) INST_PM: 0x00000000 pipe A dot 148800 n 4 m1 15 m2 6 p1 1 p2 10 pipe B dot 83428 n 1 m1 11 m2 6 p1 2 p2 14 After xorg start, before playing video: DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11) CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) C0DRB0: 0x000f0002 (0x0002) C0DRB1: 0x0000000f (0x000f) C0DRB2: 0x00000000 (0x0000) C0DRB3: 0x00c00000 (0x0000) C1DRB0: 0x17cbe000 (0xe000) C1DRB1: 0x000017cb (0x17cb) C1DRB2: 0x00000000 (0x0000) C1DRB3: 0x00000000 (0x0000) C0DRA01: 0x000300c0 (0x00c0) C0DRA23: 0x000c0003 (0x0003) C1DRA01: 0x00000000 (0x0000) C1DRA23: 0x00000000 (0x0000) PGETBL_CTL: 0xbff80001 VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) DPLL_TEST: 0x00010001 () CACHE_MODE_0: 0x00006800 D_STATE: 0x00000000 DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) RENCLK_GATE_D1: 0x20000000 RENCLK_GATE_D2: 0x00000000 SDVOB: 0x800000dc (enabled, pipe A, stall disabled, detected) SDVOC: 0x00000018 (disabled, pipe A, stall disabled, not detected) SDVOUDI: 0x00000000 DSPARB: 0x00001d9c DSPFW1: 0x00880808 DSPFW2: 0x00000808 DSPFW3: 0x00000000 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync) LVDS: 0xc2300300 (enabled, pipe B, 18 bit, 1 channel) DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOB: 0x800000dc (enabled, pipe A, no stall, +hsync, +vsync) DVOC: 0x00000018 (disabled, pipe A, no stall, +hsync, +vsync) DVOA_SRCDIM: 0x00000000 DVOB_SRCDIM: 0x00000000 DVOC_SRCDIM: 0x00000000 PP_CONTROL: 0x00000003 (power target: on) PP_STATUS: 0xc0000008 (on, ready, sequencing idle) PP_ON_DELAYS: 0x025807d0 PP_OFF_DELAYS: 0x01f407d0 PP_DIVISOR: 0x00410905 PFIT_CONTROL: 0x00000000 PFIT_PGM_RATIOS: 0x00000000 PORT_HOTPLUG_EN: 0x04000220 PORT_HOTPLUG_STAT: 0x00000000 DSPACNTR: 0xd8000400 (enabled, pipe A) DSPASTRIDE: 0x00001e00 (7680 bytes) DSPAPOS: 0x00000000 (0, 0) DSPASIZE: 0x00000000 (1, 1) DSPABASE: 0x00000000 DSPASURF: 0x00fd9000 DSPATILEOFF: 0x00000000 PIPEACONF: 0xc0000000 (enabled, active) PIPEASRC: 0x077f0437 (1920, 1080) PIPEASTAT: 0x00000307 (status: VSYNC_INT_STATUS DLINE_COMPARE_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) PIPEA_GMCH_DATA_M: 0x00000000 PIPEA_GMCH_DATA_N: 0x00000000 PIPEA_DP_LINK_M: 0x00000000 PIPEA_DP_LINK_N: 0x00000000 CURSOR_A_BASE: 0x00000000 CURSOR_A_CONTROL: 0x00000000 CURSOR_A_POSITION: 0x018003ae FPA0: 0x00040f06 (n = 4, m1 = 15, m2 = 6) FPA1: 0x00040f06 (n = 4, m1 = 15, m2 = 6) DPLL_A: 0xd4010c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 1, p2 = 10) DPLL_A_MD: 0x00000000 HTOTAL_A: 0x0897077f (1920 active, 2200 total) HBLANK_A: 0x0897077f (1920 start, 2200 end) HSYNC_A: 0x080307d7 (2008 start, 2052 end) VTOTAL_A: 0x04640437 (1080 active, 1125 total) VBLANK_A: 0x04640437 (1080 start, 1125 end) VSYNC_A: 0x0440043b (1084 start, 1089 end) BCLRPAT_A: 0x00000000 VSYNCSHIFT_A: 0x00000000 DSPBCNTR: 0xd9000000 (enabled, pipe B) DSPBSTRIDE: 0x00001e00 (7680 bytes) DSPBPOS: 0x00000000 (0, 0) DSPBSIZE: 0x00000000 (1, 1) DSPBBASE: 0x00000000 DSPBSURF: 0x007f0000 DSPBTILEOFF: 0x00000000 PIPEBCONF: 0xc0000000 (enabled, active) PIPEBSRC: 0x04ff031f (1280, 800) PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS) PIPEB_GMCH_DATA_M: 0x00000000 PIPEB_GMCH_DATA_N: 0x00000000 PIPEB_DP_LINK_M: 0x00000000 PIPEB_DP_LINK_N: 0x00000000 CURSOR_B_BASE: 0x00000000 CURSOR_B_CONTROL: 0x00000000 CURSOR_B_POSITION: 0x00000000 FPB0: 0x00010b06 (n = 1, m1 = 11, m2 = 6) FPB1: 0x00010b06 (n = 1, m1 = 11, m2 = 6) DPLL_B: 0x98020c00 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14) DPLL_B_MD: 0x00000000 HTOTAL_B: 0x068f04ff (1280 active, 1680 total) HBLANK_B: 0x068f04ff (1280 start, 1680 end) HSYNC_B: 0x05c70547 (1352 start, 1480 end) VTOTAL_B: 0x033e031f (800 active, 831 total) VBLANK_B: 0x033e031f (800 start, 831 end) VSYNC_B: 0x03280322 (803 start, 809 end) BCLRPAT_B: 0x00000000 VSYNCSHIFT_B: 0x00000000 VCLK_DIVISOR_VGA0: 0x00031108 VCLK_DIVISOR_VGA1: 0x00031406 VCLK_POST_DIV: 0x00020002 VGACNTRL: 0x80000000 (disabled) TV_CTL: 0x00000000 TV_DAC: 0x70000000 TV_CSC_Y: 0x00000000 TV_CSC_Y2: 0x00000000 TV_CSC_U: 0x00000000 TV_CSC_U2: 0x00000000 TV_CSC_V: 0x00000000 TV_CSC_V2: 0x00000000 TV_CLR_KNOBS: 0x00000000 TV_CLR_LEVEL: 0x00000000 TV_H_CTL_1: 0x00000000 TV_H_CTL_2: 0x00000000 TV_H_CTL_3: 0x00000000 TV_V_CTL_1: 0x00000000 TV_V_CTL_2: 0x00000000 TV_V_CTL_3: 0x00000000 TV_V_CTL_4: 0x00000000 TV_V_CTL_5: 0x00000000 TV_V_CTL_6: 0x00000000 TV_V_CTL_7: 0x00000000 TV_SC_CTL_1: 0x00000000 TV_SC_CTL_2: 0x00000000 TV_SC_CTL_3: 0x00000000 TV_WIN_POS: 0x00000000 TV_WIN_SIZE: 0x00000000 TV_FILTER_CTL_1: 0x00000000 TV_FILTER_CTL_2: 0x00000000 TV_FILTER_CTL_3: 0x00000000 TV_CC_CONTROL: 0x00000000 TV_CC_DATA: 0x00000000 TV_H_LUMA_0: 0x00000000 TV_H_LUMA_59: 0x00000000 TV_H_CHROMA_0: 0x00000000 TV_H_CHROMA_59: 0x00000000 FBC_CFB_BASE: 0xbf800000 FBC_LL_BASE: 0xbf000000 FBC_CONTROL: 0x00000000 FBC_COMMAND: 0x00000000 FBC_STATUS: 0x20000000 FBC_CONTROL2: 0x00000000 FBC_FENCE_OFF: 0x00000000 FBC_MOD_NUM: 0x00000000 MI_MODE: 0x00000240 MI_ARB_STATE: 0x00000044 MI_RDRET_STATE: 0x00000000 ECOSKPD: 0x00000307 DP_B: 0x00000000 DPB_AUX_CH_CTL: 0x00000000 DPB_AUX_CH_DATA1: 0x00000000 DPB_AUX_CH_DATA2: 0x00000000 DPB_AUX_CH_DATA3: 0x00000000 DPB_AUX_CH_DATA4: 0x00000000 DPB_AUX_CH_DATA5: 0x00000000 DP_C: 0x00000000 DPC_AUX_CH_CTL: 0x00000000 DPC_AUX_CH_DATA1: 0x00000000 DPC_AUX_CH_DATA2: 0x00000000 DPC_AUX_CH_DATA3: 0x00000000 DPC_AUX_CH_DATA4: 0x00000000 DPC_AUX_CH_DATA5: 0x00000000 DP_D: 0x00000000 DPD_AUX_CH_CTL: 0x00000000 DPD_AUX_CH_DATA1: 0x00000000 DPD_AUX_CH_DATA2: 0x00000000 DPD_AUX_CH_DATA3: 0x00000000 DPD_AUX_CH_DATA4: 0x00000000 DPD_AUX_CH_DATA5: 0x00000000 AUD_CONFIG: 0x00000000 AUD_HDMIW_STATUS: 0x00000000 AUD_CONV_CHCNT: 0x00000000 VIDEO_DIP_CTL: 0x00000600 AUD_PINW_CNTR: 0x00000140 AUD_CNTL_ST: 0x00001800 AUD_PIN_CAP: 0x00000094 AUD_PINW_CAP: 0x004013b5 AUD_PINW_UNSOLRESP: 0x00000000 AUD_OUT_DIG_CNVT: 0x00000001 AUD_OUT_CWCAP: 0x00000219 AUD_GRP_CAP: 0x00000004 FENCE START 0: 0x00fd90ed ( enabled, X tile walk, 7552 pitch, 0x00fd9000 start) FENCE END 0: 0x017d8000 ( 0x017d8000 end) FENCE START 1: 0x0d97100d ( enabled, X tile walk, 384 pitch, 0x0d971000 start) FENCE END 1: 0x0d978000 ( 0x0d978000 end) FENCE START 2: 0x018ae01d ( enabled, X tile walk, 896 pitch, 0x018ae000 start) FENCE END 2: 0x018bd000 ( 0x018bd000 end) FENCE START 3: 0x0d96100d ( enabled, X tile walk, 384 pitch, 0x0d961000 start) FENCE END 3: 0x0d968000 ( 0x0d968000 end) FENCE START 4: 0x0a24400d ( enabled, X tile walk, 384 pitch, 0x0a244000 start) FENCE END 4: 0x0a24b000 ( 0x0a24b000 end) FENCE START 5: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 5: 0x00000000 ( 0x00000000 end) FENCE START 6: 0x018a400d ( enabled, X tile walk, 384 pitch, 0x018a4000 start) FENCE END 6: 0x018ab000 ( 0x018ab000 end) FENCE START 7: 0x0c93b00d ( enabled, X tile walk, 384 pitch, 0x0c93b000 start) FENCE END 7: 0x0c93e000 ( 0x0c93e000 end) FENCE START 8: 0x018c600d ( enabled, X tile walk, 384 pitch, 0x018c6000 start) FENCE END 8: 0x018d5000 ( 0x018d5000 end) FENCE START 9: 0x017f501d ( enabled, X tile walk, 896 pitch, 0x017f5000 start) FENCE END 9: 0x01804000 ( 0x01804000 end) FENCE START 10: 0x03f9e01d ( enabled, X tile walk, 896 pitch, 0x03f9e000 start) FENCE END 10: 0x03fad000 ( 0x03fad000 end) FENCE START 11: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 11: 0x00000000 ( 0x00000000 end) FENCE START 12: 0x0442f00d ( enabled, X tile walk, 384 pitch, 0x0442f000 start) FENCE END 12: 0x04436000 ( 0x04436000 end) FENCE START 13: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 13: 0x00000000 ( 0x00000000 end) FENCE START 14: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 14: 0x00000000 ( 0x00000000 end) FENCE START 15: 0x0d97901d ( enabled, X tile walk, 896 pitch, 0x0d979000 start) FENCE END 15: 0x0d998000 ( 0x0d998000 end) INST_PM: 0x00000000 pipe A dot 148800 n 4 m1 15 m2 6 p1 1 p2 10 pipe B dot 83428 n 1 m1 11 m2 6 p1 2 p2 14 While playing video (green screen): DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11) CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) C0DRB0: 0x000f0002 (0x0002) C0DRB1: 0x0000000f (0x000f) C0DRB2: 0x00000000 (0x0000) C0DRB3: 0x00c00000 (0x0000) C1DRB0: 0x17cbe000 (0xe000) C1DRB1: 0x000017cb (0x17cb) C1DRB2: 0x00000000 (0x0000) C1DRB3: 0x00000000 (0x0000) C0DRA01: 0x000300c0 (0x00c0) C0DRA23: 0x000c0003 (0x0003) C1DRA01: 0x00000000 (0x0000) C1DRA23: 0x00000000 (0x0000) PGETBL_CTL: 0xbff80001 VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) DPLL_TEST: 0x00010001 () CACHE_MODE_0: 0x00006800 D_STATE: 0x00000000 DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) RENCLK_GATE_D1: 0x20000000 RENCLK_GATE_D2: 0x00000000 SDVOB: 0x800000dc (enabled, pipe A, stall disabled, detected) SDVOC: 0x00000018 (disabled, pipe A, stall disabled, not detected) SDVOUDI: 0x00000000 DSPARB: 0x00001d9c DSPFW1: 0x00880808 DSPFW2: 0x00000808 DSPFW3: 0x00000000 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync) LVDS: 0xc2300300 (enabled, pipe B, 18 bit, 1 channel) DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOB: 0x800000dc (enabled, pipe A, no stall, +hsync, +vsync) DVOC: 0x00000018 (disabled, pipe A, no stall, +hsync, +vsync) DVOA_SRCDIM: 0x00000000 DVOB_SRCDIM: 0x00000000 DVOC_SRCDIM: 0x00000000 PP_CONTROL: 0x00000003 (power target: on) PP_STATUS: 0xc0000008 (on, ready, sequencing idle) PP_ON_DELAYS: 0x025807d0 PP_OFF_DELAYS: 0x01f407d0 PP_DIVISOR: 0x00410905 PFIT_CONTROL: 0x00000000 PFIT_PGM_RATIOS: 0x00000000 PORT_HOTPLUG_EN: 0x04000220 PORT_HOTPLUG_STAT: 0x00000000 DSPACNTR: 0xd8000400 (enabled, pipe A) DSPASTRIDE: 0x00001e00 (7680 bytes) DSPAPOS: 0x00000000 (0, 0) DSPASIZE: 0x00000000 (1, 1) DSPABASE: 0x00000000 DSPASURF: 0x00fd9000 DSPATILEOFF: 0x00000000 PIPEACONF: 0xc0000000 (enabled, active) PIPEASRC: 0x077f0437 (1920, 1080) PIPEASTAT: 0x00000307 (status: VSYNC_INT_STATUS DLINE_COMPARE_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) PIPEA_GMCH_DATA_M: 0x00000000 PIPEA_GMCH_DATA_N: 0x00000000 PIPEA_DP_LINK_M: 0x00000000 PIPEA_DP_LINK_N: 0x00000000 CURSOR_A_BASE: 0x00000000 CURSOR_A_CONTROL: 0x00000000 CURSOR_A_POSITION: 0x018003ae FPA0: 0x00040f06 (n = 4, m1 = 15, m2 = 6) FPA1: 0x00040f06 (n = 4, m1 = 15, m2 = 6) DPLL_A: 0xd4010c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 1, p2 = 10) DPLL_A_MD: 0x00000000 HTOTAL_A: 0x0897077f (1920 active, 2200 total) HBLANK_A: 0x0897077f (1920 start, 2200 end) HSYNC_A: 0x080307d7 (2008 start, 2052 end) VTOTAL_A: 0x04640437 (1080 active, 1125 total) VBLANK_A: 0x04640437 (1080 start, 1125 end) VSYNC_A: 0x0440043b (1084 start, 1089 end) BCLRPAT_A: 0x00000000 VSYNCSHIFT_A: 0x00000000 DSPBCNTR: 0xd9000000 (enabled, pipe B) DSPBSTRIDE: 0x00001e00 (7680 bytes) DSPBPOS: 0x00000000 (0, 0) DSPBSIZE: 0x00000000 (1, 1) DSPBBASE: 0x00000000 DSPBSURF: 0x007f0000 DSPBTILEOFF: 0x00000000 PIPEBCONF: 0xc0000000 (enabled, active) PIPEBSRC: 0x04ff031f (1280, 800) PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS) PIPEB_GMCH_DATA_M: 0x00000000 PIPEB_GMCH_DATA_N: 0x00000000 PIPEB_DP_LINK_M: 0x00000000 PIPEB_DP_LINK_N: 0x00000000 CURSOR_B_BASE: 0x00000000 CURSOR_B_CONTROL: 0x00000000 CURSOR_B_POSITION: 0x00000000 FPB0: 0x00010b06 (n = 1, m1 = 11, m2 = 6) FPB1: 0x00010b06 (n = 1, m1 = 11, m2 = 6) DPLL_B: 0x98020c00 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14) DPLL_B_MD: 0x00000000 HTOTAL_B: 0x068f04ff (1280 active, 1680 total) HBLANK_B: 0x068f04ff (1280 start, 1680 end) HSYNC_B: 0x05c70547 (1352 start, 1480 end) VTOTAL_B: 0x033e031f (800 active, 831 total) VBLANK_B: 0x033e031f (800 start, 831 end) VSYNC_B: 0x03280322 (803 start, 809 end) BCLRPAT_B: 0x00000000 VSYNCSHIFT_B: 0x00000000 VCLK_DIVISOR_VGA0: 0x00031108 VCLK_DIVISOR_VGA1: 0x00031406 VCLK_POST_DIV: 0x00020002 VGACNTRL: 0x80000000 (disabled) TV_CTL: 0x00000000 TV_DAC: 0x70000000 TV_CSC_Y: 0x00000000 TV_CSC_Y2: 0x00000000 TV_CSC_U: 0x00000000 TV_CSC_U2: 0x00000000 TV_CSC_V: 0x00000000 TV_CSC_V2: 0x00000000 TV_CLR_KNOBS: 0x00000000 TV_CLR_LEVEL: 0x00000000 TV_H_CTL_1: 0x00000000 TV_H_CTL_2: 0x00000000 TV_H_CTL_3: 0x00000000 TV_V_CTL_1: 0x00000000 TV_V_CTL_2: 0x00000000 TV_V_CTL_3: 0x00000000 TV_V_CTL_4: 0x00000000 TV_V_CTL_5: 0x00000000 TV_V_CTL_6: 0x00000000 TV_V_CTL_7: 0x00000000 TV_SC_CTL_1: 0x00000000 TV_SC_CTL_2: 0x00000000 TV_SC_CTL_3: 0x00000000 TV_WIN_POS: 0x00000000 TV_WIN_SIZE: 0x00000000 TV_FILTER_CTL_1: 0x00000000 TV_FILTER_CTL_2: 0x00000000 TV_FILTER_CTL_3: 0x00000000 TV_CC_CONTROL: 0x00000000 TV_CC_DATA: 0x00000000 TV_H_LUMA_0: 0x00000000 TV_H_LUMA_59: 0x00000000 TV_H_CHROMA_0: 0x00000000 TV_H_CHROMA_59: 0x00000000 FBC_CFB_BASE: 0xbf800000 FBC_LL_BASE: 0xbf000000 FBC_CONTROL: 0x00000000 FBC_COMMAND: 0x00000000 FBC_STATUS: 0x20000000 FBC_CONTROL2: 0x00000000 FBC_FENCE_OFF: 0x00000000 FBC_MOD_NUM: 0x00000000 MI_MODE: 0x00000240 MI_ARB_STATE: 0x00000044 MI_RDRET_STATE: 0x00000000 ECOSKPD: 0x00000307 DP_B: 0x00000000 DPB_AUX_CH_CTL: 0x00000000 DPB_AUX_CH_DATA1: 0x00000000 DPB_AUX_CH_DATA2: 0x00000000 DPB_AUX_CH_DATA3: 0x00000000 DPB_AUX_CH_DATA4: 0x00000000 DPB_AUX_CH_DATA5: 0x00000000 DP_C: 0x00000000 DPC_AUX_CH_CTL: 0x00000000 DPC_AUX_CH_DATA1: 0x00000000 DPC_AUX_CH_DATA2: 0x00000000 DPC_AUX_CH_DATA3: 0x00000000 DPC_AUX_CH_DATA4: 0x00000000 DPC_AUX_CH_DATA5: 0x00000000 DP_D: 0x00000000 DPD_AUX_CH_CTL: 0x00000000 DPD_AUX_CH_DATA1: 0x00000000 DPD_AUX_CH_DATA2: 0x00000000 DPD_AUX_CH_DATA3: 0x00000000 DPD_AUX_CH_DATA4: 0x00000000 DPD_AUX_CH_DATA5: 0x00000000 AUD_CONFIG: 0x00000000 AUD_HDMIW_STATUS: 0x00000000 AUD_CONV_CHCNT: 0x00000000 VIDEO_DIP_CTL: 0x00000600 AUD_PINW_CNTR: 0x00000140 AUD_CNTL_ST: 0x00001800 AUD_PIN_CAP: 0x00000094 AUD_PINW_CAP: 0x004013b5 AUD_PINW_UNSOLRESP: 0x00000000 AUD_OUT_DIG_CNVT: 0x00000001 AUD_OUT_CWCAP: 0x00000219 AUD_GRP_CAP: 0x00000004 FENCE START 0: 0x00fd90ed ( enabled, X tile walk, 7552 pitch, 0x00fd9000 start) FENCE END 0: 0x017d8000 ( 0x017d8000 end) FENCE START 1: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 1: 0x00000000 ( 0x00000000 end) FENCE START 2: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 2: 0x00000000 ( 0x00000000 end) FENCE START 3: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 3: 0x00000000 ( 0x00000000 end) FENCE START 4: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 4: 0x00000000 ( 0x00000000 end) FENCE START 5: 0x0237201d ( enabled, X tile walk, 896 pitch, 0x02372000 start) FENCE END 5: 0x02379000 ( 0x02379000 end) FENCE START 6: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 6: 0x00000000 ( 0x00000000 end) FENCE START 7: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 7: 0x00000000 ( 0x00000000 end) FENCE START 8: 0x0223801d ( enabled, X tile walk, 896 pitch, 0x02238000 start) FENCE END 8: 0x02247000 ( 0x02247000 end) FENCE START 9: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 9: 0x00000000 ( 0x00000000 end) FENCE START 10: 0x0258d01d ( enabled, X tile walk, 896 pitch, 0x0258d000 start) FENCE END 10: 0x0258e000 ( 0x0258e000 end) FENCE START 11: 0x01ab701d ( enabled, X tile walk, 896 pitch, 0x01ab7000 start) FENCE END 11: 0x01ab8000 ( 0x01ab8000 end) FENCE START 12: 0x0258f01d ( enabled, X tile walk, 896 pitch, 0x0258f000 start) FENCE END 12: 0x0259e000 ( 0x0259e000 end) FENCE START 13: 0x0222801d ( enabled, X tile walk, 896 pitch, 0x02228000 start) FENCE END 13: 0x02237000 ( 0x02237000 end) FENCE START 14: 0x01b7400d ( enabled, X tile walk, 384 pitch, 0x01b74000 start) FENCE END 14: 0x01b7b000 ( 0x01b7b000 end) FENCE START 15: 0x01efe00d ( enabled, X tile walk, 384 pitch, 0x01efe000 start) FENCE END 15: 0x01f0d000 ( 0x01f0d000 end) INST_PM: 0x00000000 pipe A dot 148800 n 4 m1 15 m2 6 p1 1 p2 10 pipe B dot 83428 n 1 m1 11 m2 6 p1 2 p2 14 After restarting video player(video looks normal): DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11) CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) C0DRB0: 0x000f0002 (0x0002) C0DRB1: 0x0000000f (0x000f) C0DRB2: 0x00000000 (0x0000) C0DRB3: 0x00c00000 (0x0000) C1DRB0: 0x17cbe000 (0xe000) C1DRB1: 0x000017cb (0x17cb) C1DRB2: 0x00000000 (0x0000) C1DRB3: 0x00000000 (0x0000) C0DRA01: 0x000300c0 (0x00c0) C0DRA23: 0x000c0003 (0x0003) C1DRA01: 0x00000000 (0x0000) C1DRA23: 0x00000000 (0x0000) PGETBL_CTL: 0xbff80001 VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) DPLL_TEST: 0x00010001 () CACHE_MODE_0: 0x00006800 D_STATE: 0x00000000 DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) RENCLK_GATE_D1: 0x20000000 RENCLK_GATE_D2: 0x00000000 SDVOB: 0x800000dc (enabled, pipe A, stall disabled, detected) SDVOC: 0x00000018 (disabled, pipe A, stall disabled, not detected) SDVOUDI: 0x00000000 DSPARB: 0x00001d9c DSPFW1: 0x00880808 DSPFW2: 0x00000808 DSPFW3: 0x00000000 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync) LVDS: 0xc2300300 (enabled, pipe B, 18 bit, 1 channel) DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOB: 0x800000dc (enabled, pipe A, no stall, +hsync, +vsync) DVOC: 0x00000018 (disabled, pipe A, no stall, +hsync, +vsync) DVOA_SRCDIM: 0x00000000 DVOB_SRCDIM: 0x00000000 DVOC_SRCDIM: 0x00000000 PP_CONTROL: 0x00000003 (power target: on) PP_STATUS: 0xc0000008 (on, ready, sequencing idle) PP_ON_DELAYS: 0x025807d0 PP_OFF_DELAYS: 0x01f407d0 PP_DIVISOR: 0x00410905 PFIT_CONTROL: 0x00000000 PFIT_PGM_RATIOS: 0x00000000 PORT_HOTPLUG_EN: 0x04000220 PORT_HOTPLUG_STAT: 0x00000000 DSPACNTR: 0xd8000400 (enabled, pipe A) DSPASTRIDE: 0x00001e00 (7680 bytes) DSPAPOS: 0x00000000 (0, 0) DSPASIZE: 0x00000000 (1, 1) DSPABASE: 0x00000000 DSPASURF: 0x00fd9000 DSPATILEOFF: 0x00000000 PIPEACONF: 0xc0000000 (enabled, active) PIPEASRC: 0x077f0437 (1920, 1080) PIPEASTAT: 0x00000307 (status: VSYNC_INT_STATUS DLINE_COMPARE_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) PIPEA_GMCH_DATA_M: 0x00000000 PIPEA_GMCH_DATA_N: 0x00000000 PIPEA_DP_LINK_M: 0x00000000 PIPEA_DP_LINK_N: 0x00000000 CURSOR_A_BASE: 0x00000000 CURSOR_A_CONTROL: 0x00000000 CURSOR_A_POSITION: 0x029903bf FPA0: 0x00040f06 (n = 4, m1 = 15, m2 = 6) FPA1: 0x00040f06 (n = 4, m1 = 15, m2 = 6) DPLL_A: 0xd4010c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 1, p2 = 10) DPLL_A_MD: 0x00000000 HTOTAL_A: 0x0897077f (1920 active, 2200 total) HBLANK_A: 0x0897077f (1920 start, 2200 end) HSYNC_A: 0x080307d7 (2008 start, 2052 end) VTOTAL_A: 0x04640437 (1080 active, 1125 total) VBLANK_A: 0x04640437 (1080 start, 1125 end) VSYNC_A: 0x0440043b (1084 start, 1089 end) BCLRPAT_A: 0x00000000 VSYNCSHIFT_A: 0x00000000 DSPBCNTR: 0xd9000000 (enabled, pipe B) DSPBSTRIDE: 0x00001e00 (7680 bytes) DSPBPOS: 0x00000000 (0, 0) DSPBSIZE: 0x00000000 (1, 1) DSPBBASE: 0x00000000 DSPBSURF: 0x007f0000 DSPBTILEOFF: 0x00000000 PIPEBCONF: 0xc0000000 (enabled, active) PIPEBSRC: 0x04ff031f (1280, 800) PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS) PIPEB_GMCH_DATA_M: 0x00000000 PIPEB_GMCH_DATA_N: 0x00000000 PIPEB_DP_LINK_M: 0x00000000 PIPEB_DP_LINK_N: 0x00000000 CURSOR_B_BASE: 0x00000000 CURSOR_B_CONTROL: 0x00000000 CURSOR_B_POSITION: 0x00000000 FPB0: 0x00010b06 (n = 1, m1 = 11, m2 = 6) FPB1: 0x00010b06 (n = 1, m1 = 11, m2 = 6) DPLL_B: 0x98020c00 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14) DPLL_B_MD: 0x00000000 HTOTAL_B: 0x068f04ff (1280 active, 1680 total) HBLANK_B: 0x068f04ff (1280 start, 1680 end) HSYNC_B: 0x05c70547 (1352 start, 1480 end) VTOTAL_B: 0x033e031f (800 active, 831 total) VBLANK_B: 0x033e031f (800 start, 831 end) VSYNC_B: 0x03280322 (803 start, 809 end) BCLRPAT_B: 0x00000000 VSYNCSHIFT_B: 0x00000000 VCLK_DIVISOR_VGA0: 0x00031108 VCLK_DIVISOR_VGA1: 0x00031406 VCLK_POST_DIV: 0x00020002 VGACNTRL: 0x80000000 (disabled) TV_CTL: 0x00000000 TV_DAC: 0x70000000 TV_CSC_Y: 0x00000000 TV_CSC_Y2: 0x00000000 TV_CSC_U: 0x00000000 TV_CSC_U2: 0x00000000 TV_CSC_V: 0x00000000 TV_CSC_V2: 0x00000000 TV_CLR_KNOBS: 0x00000000 TV_CLR_LEVEL: 0x00000000 TV_H_CTL_1: 0x00000000 TV_H_CTL_2: 0x00000000 TV_H_CTL_3: 0x00000000 TV_V_CTL_1: 0x00000000 TV_V_CTL_2: 0x00000000 TV_V_CTL_3: 0x00000000 TV_V_CTL_4: 0x00000000 TV_V_CTL_5: 0x00000000 TV_V_CTL_6: 0x00000000 TV_V_CTL_7: 0x00000000 TV_SC_CTL_1: 0x00000000 TV_SC_CTL_2: 0x00000000 TV_SC_CTL_3: 0x00000000 TV_WIN_POS: 0x00000000 TV_WIN_SIZE: 0x00000000 TV_FILTER_CTL_1: 0x00000000 TV_FILTER_CTL_2: 0x00000000 TV_FILTER_CTL_3: 0x00000000 TV_CC_CONTROL: 0x00000000 TV_CC_DATA: 0x00000000 TV_H_LUMA_0: 0x00000000 TV_H_LUMA_59: 0x00000000 TV_H_CHROMA_0: 0x00000000 TV_H_CHROMA_59: 0x00000000 FBC_CFB_BASE: 0xbf800000 FBC_LL_BASE: 0xbf000000 FBC_CONTROL: 0x00000000 FBC_COMMAND: 0x00000000 FBC_STATUS: 0x20000000 FBC_CONTROL2: 0x00000000 FBC_FENCE_OFF: 0x00000000 FBC_MOD_NUM: 0x00000000 MI_MODE: 0x00000240 MI_ARB_STATE: 0x00000044 MI_RDRET_STATE: 0x00000000 ECOSKPD: 0x00000307 DP_B: 0x00000000 DPB_AUX_CH_CTL: 0x00000000 DPB_AUX_CH_DATA1: 0x00000000 DPB_AUX_CH_DATA2: 0x00000000 DPB_AUX_CH_DATA3: 0x00000000 DPB_AUX_CH_DATA4: 0x00000000 DPB_AUX_CH_DATA5: 0x00000000 DP_C: 0x00000000 DPC_AUX_CH_CTL: 0x00000000 DPC_AUX_CH_DATA1: 0x00000000 DPC_AUX_CH_DATA2: 0x00000000 DPC_AUX_CH_DATA3: 0x00000000 DPC_AUX_CH_DATA4: 0x00000000 DPC_AUX_CH_DATA5: 0x00000000 DP_D: 0x00000000 DPD_AUX_CH_CTL: 0x00000000 DPD_AUX_CH_DATA1: 0x00000000 DPD_AUX_CH_DATA2: 0x00000000 DPD_AUX_CH_DATA3: 0x00000000 DPD_AUX_CH_DATA4: 0x00000000 DPD_AUX_CH_DATA5: 0x00000000 AUD_CONFIG: 0x00000000 AUD_HDMIW_STATUS: 0x00000000 AUD_CONV_CHCNT: 0x00000000 VIDEO_DIP_CTL: 0x00000600 AUD_PINW_CNTR: 0x00000140 AUD_CNTL_ST: 0x00001800 AUD_PIN_CAP: 0x00000094 AUD_PINW_CAP: 0x004013b5 AUD_PINW_UNSOLRESP: 0x00000000 AUD_OUT_DIG_CNVT: 0x00000001 AUD_OUT_CWCAP: 0x00000219 AUD_GRP_CAP: 0x00000004 FENCE START 0: 0x00fd90ed ( enabled, X tile walk, 7552 pitch, 0x00fd9000 start) FENCE END 0: 0x017d8000 ( 0x017d8000 end) FENCE START 1: 0x09f2702d ( enabled, X tile walk, 1408 pitch, 0x09f27000 start) FENCE END 1: 0x09f36000 ( 0x09f36000 end) FENCE START 2: 0x0492902d ( enabled, X tile walk, 1408 pitch, 0x04929000 start) FENCE END 2: 0x04938000 ( 0x04938000 end) FENCE START 3: 0x0f09400d ( enabled, X tile walk, 384 pitch, 0x0f094000 start) FENCE END 3: 0x0f09b000 ( 0x0f09b000 end) FENCE START 4: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 4: 0x00000000 ( 0x00000000 end) FENCE START 5: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 5: 0x00000000 ( 0x00000000 end) FENCE START 6: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 6: 0x00000000 ( 0x00000000 end) FENCE START 7: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 7: 0x00000000 ( 0x00000000 end) FENCE START 8: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 8: 0x00000000 ( 0x00000000 end) FENCE START 9: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 9: 0x00000000 ( 0x00000000 end) FENCE START 10: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 10: 0x00000000 ( 0x00000000 end) FENCE START 11: 0x01ab701d ( enabled, X tile walk, 896 pitch, 0x01ab7000 start) FENCE END 11: 0x01ab8000 ( 0x01ab8000 end) FENCE START 12: 0x0258f01d ( enabled, X tile walk, 896 pitch, 0x0258f000 start) FENCE END 12: 0x0259e000 ( 0x0259e000 end) FENCE START 13: 0x0222801d ( enabled, X tile walk, 896 pitch, 0x02228000 start) FENCE END 13: 0x02237000 ( 0x02237000 end) FENCE START 14: 0x01b7400d ( enabled, X tile walk, 384 pitch, 0x01b74000 start) FENCE END 14: 0x01b7b000 ( 0x01b7b000 end) FENCE START 15: 0x01efe00d ( enabled, X tile walk, 384 pitch, 0x01efe000 start) FENCE END 15: 0x01f0d000 ( 0x01f0d000 end) INST_PM: 0x00000000 pipe A dot 148800 n 4 m1 15 m2 6 p1 1 p2 10 pipe B dot 83428 n 1 m1 11 m2 6 p1 2 p2 14 After hang DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11) CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) C0DRB0: 0x000f0002 (0x0002) C0DRB1: 0x0000000f (0x000f) C0DRB2: 0x00000000 (0x0000) C0DRB3: 0x00c00000 (0x0000) C1DRB0: 0x17cbe000 (0xe000) C1DRB1: 0x000017cb (0x17cb) C1DRB2: 0x00000000 (0x0000) C1DRB3: 0x00000000 (0x0000) C0DRA01: 0x000300c0 (0x00c0) C0DRA23: 0x000c0003 (0x0003) C1DRA01: 0x00000000 (0x0000) C1DRA23: 0x00000000 (0x0000) PGETBL_CTL: 0xbff80001 VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) DPLL_TEST: 0x00010001 () CACHE_MODE_0: 0x00006820 D_STATE: 0x00000000 DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) RENCLK_GATE_D1: 0x20000000 RENCLK_GATE_D2: 0x00000000 SDVOB: 0x800000dc (enabled, pipe A, stall disabled, detected) SDVOC: 0x00000018 (disabled, pipe A, stall disabled, not detected) SDVOUDI: 0x00000000 DSPARB: 0x00001d9c DSPFW1: 0x00880808 DSPFW2: 0x00000808 DSPFW3: 0x00000000 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync) LVDS: 0xc2300300 (enabled, pipe B, 18 bit, 1 channel) DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOB: 0x800000dc (enabled, pipe A, no stall, +hsync, +vsync) DVOC: 0x00000018 (disabled, pipe A, no stall, +hsync, +vsync) DVOA_SRCDIM: 0x00000000 DVOB_SRCDIM: 0x00000000 DVOC_SRCDIM: 0x00000000 PP_CONTROL: 0x00000003 (power target: on) PP_STATUS: 0xc0000008 (on, ready, sequencing idle) PP_ON_DELAYS: 0x025807d0 PP_OFF_DELAYS: 0x01f407d0 PP_DIVISOR: 0x00410905 PFIT_CONTROL: 0x00000000 PFIT_PGM_RATIOS: 0x00000000 PORT_HOTPLUG_EN: 0x04000200 PORT_HOTPLUG_STAT: 0x00000000 DSPACNTR: 0xd8000400 (enabled, pipe A) DSPASTRIDE: 0x00001e00 (7680 bytes) DSPAPOS: 0x00000000 (0, 0) DSPASIZE: 0x00000000 (1, 1) DSPABASE: 0x00000000 DSPASURF: 0x00fd9000 DSPATILEOFF: 0x00000000 PIPEACONF: 0xc0000000 (enabled, active) PIPEASRC: 0x077f0437 (1920, 1080) PIPEASTAT: 0x00000307 (status: VSYNC_INT_STATUS DLINE_COMPARE_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) PIPEA_GMCH_DATA_M: 0x00000000 PIPEA_GMCH_DATA_N: 0x00000000 PIPEA_DP_LINK_M: 0x00000000 PIPEA_DP_LINK_N: 0x00000000 CURSOR_A_BASE: 0x00000000 CURSOR_A_CONTROL: 0x00000000 CURSOR_A_POSITION: 0x024804f1 FPA0: 0x00040f06 (n = 4, m1 = 15, m2 = 6) FPA1: 0x00040f06 (n = 4, m1 = 15, m2 = 6) DPLL_A: 0xd4010c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 1, p2 = 10) DPLL_A_MD: 0x00000000 HTOTAL_A: 0x0897077f (1920 active, 2200 total) HBLANK_A: 0x0897077f (1920 start, 2200 end) HSYNC_A: 0x080307d7 (2008 start, 2052 end) VTOTAL_A: 0x04640437 (1080 active, 1125 total) VBLANK_A: 0x04640437 (1080 start, 1125 end) VSYNC_A: 0x0440043b (1084 start, 1089 end) BCLRPAT_A: 0x00000000 VSYNCSHIFT_A: 0x00000000 DSPBCNTR: 0xd9000000 (enabled, pipe B) DSPBSTRIDE: 0x00001e00 (7680 bytes) DSPBPOS: 0x00000000 (0, 0) DSPBSIZE: 0x00000000 (1, 1) DSPBBASE: 0x00000000 DSPBSURF: 0x007f0000 DSPBTILEOFF: 0x00000000 PIPEBCONF: 0xc0000000 (enabled, active) PIPEBSRC: 0x04ff031f (1280, 800) PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS) PIPEB_GMCH_DATA_M: 0x00000000 PIPEB_GMCH_DATA_N: 0x00000000 PIPEB_DP_LINK_M: 0x00000000 PIPEB_DP_LINK_N: 0x00000000 CURSOR_B_BASE: 0x00000000 CURSOR_B_CONTROL: 0x00000000 CURSOR_B_POSITION: 0x00000000 FPB0: 0x00010b06 (n = 1, m1 = 11, m2 = 6) FPB1: 0x00010b06 (n = 1, m1 = 11, m2 = 6) DPLL_B: 0x98020c00 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14) DPLL_B_MD: 0x00000000 HTOTAL_B: 0x068f04ff (1280 active, 1680 total) HBLANK_B: 0x068f04ff (1280 start, 1680 end) HSYNC_B: 0x05c70547 (1352 start, 1480 end) VTOTAL_B: 0x033e031f (800 active, 831 total) VBLANK_B: 0x033e031f (800 start, 831 end) VSYNC_B: 0x03280322 (803 start, 809 end) BCLRPAT_B: 0x00000000 VSYNCSHIFT_B: 0x00000000 VCLK_DIVISOR_VGA0: 0x00031108 VCLK_DIVISOR_VGA1: 0x00031406 VCLK_POST_DIV: 0x00020002 VGACNTRL: 0x80000000 (disabled) TV_CTL: 0x00000000 TV_DAC: 0x70000000 TV_CSC_Y: 0x00000000 TV_CSC_Y2: 0x00000000 TV_CSC_U: 0x00000000 TV_CSC_U2: 0x00000000 TV_CSC_V: 0x00000000 TV_CSC_V2: 0x00000000 TV_CLR_KNOBS: 0x00000000 TV_CLR_LEVEL: 0x00000000 TV_H_CTL_1: 0x00000000 TV_H_CTL_2: 0x00000000 TV_H_CTL_3: 0x00000000 TV_V_CTL_1: 0x00000000 TV_V_CTL_2: 0x00000000 TV_V_CTL_3: 0x00000000 TV_V_CTL_4: 0x00000000 TV_V_CTL_5: 0x00000000 TV_V_CTL_6: 0x00000000 TV_V_CTL_7: 0x00000000 TV_SC_CTL_1: 0x00000000 TV_SC_CTL_2: 0x00000000 TV_SC_CTL_3: 0x00000000 TV_WIN_POS: 0x00000000 TV_WIN_SIZE: 0x00000000 TV_FILTER_CTL_1: 0x00000000 TV_FILTER_CTL_2: 0x00000000 TV_FILTER_CTL_3: 0x00000000 TV_CC_CONTROL: 0x00000000 TV_CC_DATA: 0x00000000 TV_H_LUMA_0: 0x00000000 TV_H_LUMA_59: 0x00000000 TV_H_CHROMA_0: 0x00000000 TV_H_CHROMA_59: 0x00000000 FBC_CFB_BASE: 0xbf800000 FBC_LL_BASE: 0xbf000000 FBC_CONTROL: 0x00000000 FBC_COMMAND: 0x00000000 FBC_STATUS: 0x20000000 FBC_CONTROL2: 0x00000000 FBC_FENCE_OFF: 0x00000000 FBC_MOD_NUM: 0x00000000 MI_MODE: 0x00000200 MI_ARB_STATE: 0x00000040 MI_RDRET_STATE: 0x00000000 ECOSKPD: 0x00000307 DP_B: 0x00000000 DPB_AUX_CH_CTL: 0x00000000 DPB_AUX_CH_DATA1: 0x00000000 DPB_AUX_CH_DATA2: 0x00000000 DPB_AUX_CH_DATA3: 0x00000000 DPB_AUX_CH_DATA4: 0x00000000 DPB_AUX_CH_DATA5: 0x00000000 DP_C: 0x00000000 DPC_AUX_CH_CTL: 0x00000000 DPC_AUX_CH_DATA1: 0x00000000 DPC_AUX_CH_DATA2: 0x00000000 DPC_AUX_CH_DATA3: 0x00000000 DPC_AUX_CH_DATA4: 0x00000000 DPC_AUX_CH_DATA5: 0x00000000 DP_D: 0x00000000 DPD_AUX_CH_CTL: 0x00000000 DPD_AUX_CH_DATA1: 0x00000000 DPD_AUX_CH_DATA2: 0x00000000 DPD_AUX_CH_DATA3: 0x00000000 DPD_AUX_CH_DATA4: 0x00000000 DPD_AUX_CH_DATA5: 0x00000000 AUD_CONFIG: 0x00000000 AUD_HDMIW_STATUS: 0x00000000 AUD_CONV_CHCNT: 0x00000000 VIDEO_DIP_CTL: 0x00000600 AUD_PINW_CNTR: 0x00000140 AUD_CNTL_ST: 0x00001800 AUD_PIN_CAP: 0x00000094 AUD_PINW_CAP: 0x004013b5 AUD_PINW_UNSOLRESP: 0x00000000 AUD_OUT_DIG_CNVT: 0x00000001 AUD_OUT_CWCAP: 0x00000219 AUD_GRP_CAP: 0x00000004 FENCE START 0: 0x00fd90ed ( enabled, X tile walk, 7552 pitch, 0x00fd9000 start) FENCE END 0: 0x017d8000 ( 0x017d8000 end) FENCE START 1: 0x08abc01d ( enabled, X tile walk, 896 pitch, 0x08abc000 start) FENCE END 1: 0x08acb000 ( 0x08acb000 end) FENCE START 2: 0x0271201d ( enabled, X tile walk, 896 pitch, 0x02712000 start) FENCE END 2: 0x02721000 ( 0x02721000 end) FENCE START 3: 0x0966b00d ( enabled, X tile walk, 384 pitch, 0x0966b000 start) FENCE END 3: 0x096aa000 ( 0x096aa000 end) FENCE START 4: 0x026d101d ( enabled, X tile walk, 896 pitch, 0x026d1000 start) FENCE END 4: 0x026e0000 ( 0x026e0000 end) FENCE START 5: 0x07a8c00d ( enabled, X tile walk, 384 pitch, 0x07a8c000 start) FENCE END 5: 0x07a93000 ( 0x07a93000 end) FENCE START 6: 0x0bdc804d ( enabled, X tile walk, 2432 pitch, 0x0bdc8000 start) FENCE END 6: 0x0be07000 ( 0x0be07000 end) FENCE START 7: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 7: 0x00000000 ( 0x00000000 end) FENCE START 8: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 8: 0x00000000 ( 0x00000000 end) FENCE START 9: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 9: 0x00000000 ( 0x00000000 end) FENCE START 10: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 10: 0x00000000 ( 0x00000000 end) FENCE START 11: 0x0f12000d ( enabled, X tile walk, 384 pitch, 0x0f120000 start) FENCE END 11: 0x0f127000 ( 0x0f127000 end) FENCE START 12: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 12: 0x00000000 ( 0x00000000 end) FENCE START 13: 0x027ca00d ( enabled, X tile walk, 384 pitch, 0x027ca000 start) FENCE END 13: 0x027d1000 ( 0x027d1000 end) FENCE START 14: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 14: 0x00000000 ( 0x00000000 end) FENCE START 15: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 15: 0x00000000 ( 0x00000000 end) INST_PM: 0x00000000 pipe A dot 148800 n 4 m1 15 m2 6 p1 1 p2 10 pipe B dot 83428 n 1 m1 11 m2 6 p1 2 p2 14 Using UMS, 2.6.34 xf86-video-intel-2.9.1 After clean boot before starting xorg: DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11) CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) C0DRB0: 0x000f0002 (0x0002) C0DRB1: 0x0000000f (0x000f) C0DRB2: 0x00000000 (0x0000) C0DRB3: 0x00c00000 (0x0000) C1DRB0: 0x17cbe000 (0xe000) C1DRB1: 0x000017cb (0x17cb) C1DRB2: 0x00000000 (0x0000) C1DRB3: 0x00000000 (0x0000) C0DRA01: 0x000300c0 (0x00c0) C0DRA23: 0x000c0003 (0x0003) C1DRA01: 0x00000000 (0x0000) C1DRA23: 0x00000000 (0x0000) PGETBL_CTL: 0xbff80001 VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) DPLL_TEST: 0x00010001 () CACHE_MODE_0: 0x00006800 D_STATE: 0x00000000 DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT) RENCLK_GATE_D1: 0x00000000 RENCLK_GATE_D2: 0x00000000 SDVOB: 0x8000009c (enabled, pipe A, stall disabled, detected) SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected) SDVOUDI: 0x00000000 DSPARB: 0x00001d9c DSPFW1: 0x3f8f0f0f DSPFW2: 0x00000f0f DSPFW3: 0x00000000 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync) LVDS: 0x42300300 (disabled, pipe B, 18 bit, 1 channel) DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOB: 0x8000009c (enabled, pipe A, no stall, +hsync, +vsync) DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync) DVOA_SRCDIM: 0x00000000 DVOB_SRCDIM: 0x00000000 DVOC_SRCDIM: 0x00000000 PP_CONTROL: 0x00000002 (power target: off) PP_STATUS: 0x00000000 (off, not ready, sequencing idle) PP_ON_DELAYS: 0x025807d0 PP_OFF_DELAYS: 0x01f407d0 PP_DIVISOR: 0x00410905 PFIT_CONTROL: 0x80000000 PFIT_PGM_RATIOS: 0x0d551000 PORT_HOTPLUG_EN: 0x00000020 PORT_HOTPLUG_STAT: 0x00000000 DSPACNTR: 0x48000000 (disabled, pipe A) DSPASTRIDE: 0x00000400 (1024 bytes) DSPAPOS: 0x00000000 (0, 0) DSPASIZE: 0x00000000 (1, 1) DSPABASE: 0x00000000 DSPASURF: 0x00000000 DSPATILEOFF: 0x00000000 PIPEACONF: 0xc0000000 (enabled, active) PIPEASRC: 0x027f018f (640, 400) PIPEASTAT: 0x00000207 (status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) PIPEA_GMCH_DATA_M: 0x00000000 PIPEA_GMCH_DATA_N: 0x00000000 PIPEA_DP_LINK_M: 0x00000000 PIPEA_DP_LINK_N: 0x00000000 CURSOR_A_BASE: 0x00000000 CURSOR_A_CONTROL: 0x00000000 CURSOR_A_POSITION: 0x00000000 FPA0: 0x00021509 (n = 2, m1 = 21, m2 = 9) FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) DPLL_A: 0xd4041a00 (enabled, dvo, default clock, DAC/serial mode, p1 = 3, p2 = 10) DPLL_A_MD: 0x00000303 HTOTAL_A: 0x031f027f (640 active, 800 total) HBLANK_A: 0x031f027f (640 start, 800 end) HSYNC_A: 0x02ef028f (656 start, 752 end) VTOTAL_A: 0x020c01df (480 active, 525 total) VBLANK_A: 0x020c01df (480 start, 525 end) VSYNC_A: 0x01eb01e9 (490 start, 492 end) BCLRPAT_A: 0x00000000 VSYNCSHIFT_A: 0x00000000 DSPBCNTR: 0x01000000 (disabled, pipe B) DSPBSTRIDE: 0x00000000 (0 bytes) DSPBPOS: 0x00000000 (0, 0) DSPBSIZE: 0x00000000 (1, 1) DSPBBASE: 0x00000000 DSPBSURF: 0x00000000 DSPBTILEOFF: 0x00000000 PIPEBCONF: 0x00000000 (disabled, inactive) PIPEBSRC: 0x027f01df (640, 480) PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS) PIPEB_GMCH_DATA_M: 0x00000000 PIPEB_GMCH_DATA_N: 0x00000000 PIPEB_DP_LINK_M: 0x00000000 PIPEB_DP_LINK_N: 0x00000000 CURSOR_B_BASE: 0x00000000 CURSOR_B_CONTROL: 0x00000000 CURSOR_B_POSITION: 0x00000000 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8) FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) DPLL_B: 0x04800c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) DPLL_B_MD: 0x00000303 HTOTAL_B: 0x031f027f (640 active, 800 total) HBLANK_B: 0x03170287 (648 start, 792 end) HSYNC_B: 0x02ef028f (656 start, 752 end) VTOTAL_B: 0x020c01df (480 active, 525 total) VBLANK_B: 0x020401e7 (488 start, 517 end) VSYNC_B: 0x01eb01e9 (490 start, 492 end) BCLRPAT_B: 0x00000000 VSYNCSHIFT_B: 0x00000000 VCLK_DIVISOR_VGA0: 0x00031108 VCLK_DIVISOR_VGA1: 0x00031406 VCLK_POST_DIV: 0x00020002 VGACNTRL: 0x0224008e (enabled) TV_CTL: 0x00000000 TV_DAC: 0x70000000 TV_CSC_Y: 0x00000000 TV_CSC_Y2: 0x00000000 TV_CSC_U: 0x00000000 TV_CSC_U2: 0x00000000 TV_CSC_V: 0x00000000 TV_CSC_V2: 0x00000000 TV_CLR_KNOBS: 0x00000000 TV_CLR_LEVEL: 0x00000000 TV_H_CTL_1: 0x00000000 TV_H_CTL_2: 0x00000000 TV_H_CTL_3: 0x00000000 TV_V_CTL_1: 0x00000000 TV_V_CTL_2: 0x00000000 TV_V_CTL_3: 0x00000000 TV_V_CTL_4: 0x00000000 TV_V_CTL_5: 0x00000000 TV_V_CTL_6: 0x00000000 TV_V_CTL_7: 0x00000000 TV_SC_CTL_1: 0x00000000 TV_SC_CTL_2: 0x00000000 TV_SC_CTL_3: 0x00000000 TV_WIN_POS: 0x00000000 TV_WIN_SIZE: 0x00000000 TV_FILTER_CTL_1: 0x00000000 TV_FILTER_CTL_2: 0x00000000 TV_FILTER_CTL_3: 0x00000000 TV_CC_CONTROL: 0x00000000 TV_CC_DATA: 0x00000000 TV_H_LUMA_0: 0x00000000 TV_H_LUMA_59: 0x00000000 TV_H_CHROMA_0: 0x00000000 TV_H_CHROMA_59: 0x00000000 FBC_CFB_BASE: 0x00000000 FBC_LL_BASE: 0x00000000 FBC_CONTROL: 0x00000000 FBC_COMMAND: 0x00000000 FBC_STATUS: 0x20000000 FBC_CONTROL2: 0x00000000 FBC_FENCE_OFF: 0x00000000 FBC_MOD_NUM: 0x00000000 MI_MODE: 0x00000200 MI_ARB_STATE: 0x00000044 MI_RDRET_STATE: 0x00000000 ECOSKPD: 0x00000307 DP_B: 0x00000000 DPB_AUX_CH_CTL: 0x00000000 DPB_AUX_CH_DATA1: 0x00000000 DPB_AUX_CH_DATA2: 0x00000000 DPB_AUX_CH_DATA3: 0x00000000 DPB_AUX_CH_DATA4: 0x00000000 DPB_AUX_CH_DATA5: 0x00000000 DP_C: 0x00000000 DPC_AUX_CH_CTL: 0x00000000 DPC_AUX_CH_DATA1: 0x00000000 DPC_AUX_CH_DATA2: 0x00000000 DPC_AUX_CH_DATA3: 0x00000000 DPC_AUX_CH_DATA4: 0x00000000 DPC_AUX_CH_DATA5: 0x00000000 DP_D: 0x00000000 DPD_AUX_CH_CTL: 0x00000000 DPD_AUX_CH_DATA1: 0x00000000 DPD_AUX_CH_DATA2: 0x00000000 DPD_AUX_CH_DATA3: 0x00000000 DPD_AUX_CH_DATA4: 0x00000000 DPD_AUX_CH_DATA5: 0x00000000 AUD_CONFIG: 0x00000000 AUD_HDMIW_STATUS: 0x00000000 AUD_CONV_CHCNT: 0x00000000 VIDEO_DIP_CTL: 0x00000600 AUD_PINW_CNTR: 0x00000140 AUD_CNTL_ST: 0x00001800 AUD_PIN_CAP: 0x00000094 AUD_PINW_CAP: 0x004013b5 AUD_PINW_UNSOLRESP: 0x00000000 AUD_OUT_DIG_CNVT: 0x00000001 AUD_OUT_CWCAP: 0x00000219 AUD_GRP_CAP: 0x00000004 FENCE START 0: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 0: 0x00000000 ( 0x00000000 end) FENCE START 1: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 1: 0x00000000 ( 0x00000000 end) FENCE START 2: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 2: 0x00000000 ( 0x00000000 end) FENCE START 3: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 3: 0x00000000 ( 0x00000000 end) FENCE START 4: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 4: 0x00000000 ( 0x00000000 end) FENCE START 5: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 5: 0x00000000 ( 0x00000000 end) FENCE START 6: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 6: 0x00000000 ( 0x00000000 end) FENCE START 7: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 7: 0x00000000 ( 0x00000000 end) FENCE START 8: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 8: 0x00000000 ( 0x00000000 end) FENCE START 9: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 9: 0x00000000 ( 0x00000000 end) FENCE START 10: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 10: 0x00000000 ( 0x00000000 end) FENCE START 11: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 11: 0x00000000 ( 0x00000000 end) FENCE START 12: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 12: 0x00000000 ( 0x00000000 end) FENCE START 13: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 13: 0x00000000 ( 0x00000000 end) FENCE START 14: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 14: 0x00000000 ( 0x00000000 end) FENCE START 15: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 15: 0x00000000 ( 0x00000000 end) INST_PM: 0x00000000 SDVO phase shift 13 out of range -- probobly not an issue. pipe A dot 100800 n 2 m1 21 m2 9 p1 3 p2 10 pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10 After Xorg start, before playing video: DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11) CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) C0DRB0: 0x000f0002 (0x0002) C0DRB1: 0x0000000f (0x000f) C0DRB2: 0x00000000 (0x0000) C0DRB3: 0x00c00000 (0x0000) C1DRB0: 0x17cbe000 (0xe000) C1DRB1: 0x000017cb (0x17cb) C1DRB2: 0x00000000 (0x0000) C1DRB3: 0x00000000 (0x0000) C0DRA01: 0x000300c0 (0x00c0) C0DRA23: 0x000c0003 (0x0003) C1DRA01: 0x00000000 (0x0000) C1DRA23: 0x00000000 (0x0000) PGETBL_CTL: 0xbff80001 VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) DPLL_TEST: 0x00010001 () CACHE_MODE_0: 0x00006800 D_STATE: 0x00000000 DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) RENCLK_GATE_D1: 0x20000000 RENCLK_GATE_D2: 0x00000000 SDVOB: 0x800000dc (enabled, pipe A, stall disabled, detected) SDVOC: 0x00000018 (disabled, pipe A, stall disabled, not detected) SDVOUDI: 0x00000000 DSPARB: 0x00003fff DSPFW1: 0x3f8f0f0f DSPFW2: 0x00000f0f DSPFW3: 0x00000000 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync) LVDS: 0x42300300 (disabled, pipe B, 18 bit, 1 channel) DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOB: 0x800000dc (enabled, pipe A, no stall, +hsync, +vsync) DVOC: 0x00000018 (disabled, pipe A, no stall, +hsync, +vsync) DVOA_SRCDIM: 0x00000000 DVOB_SRCDIM: 0x00000000 DVOC_SRCDIM: 0x00000000 PP_CONTROL: 0x00000002 (power target: off) PP_STATUS: 0x00000000 (off, not ready, sequencing idle) PP_ON_DELAYS: 0x025807d0 PP_OFF_DELAYS: 0x01f407d0 PP_DIVISOR: 0x00410905 PFIT_CONTROL: 0x00000000 PFIT_PGM_RATIOS: 0x0d551000 PORT_HOTPLUG_EN: 0x00000020 PORT_HOTPLUG_STAT: 0x00000000 DSPACNTR: 0xd8000400 (enabled, pipe A) DSPASTRIDE: 0x00001e00 (7680 bytes) DSPAPOS: 0x00000000 (0, 0) DSPASIZE: 0x00000000 (1, 1) DSPABASE: 0x00000000 DSPASURF: 0x0079f000 DSPATILEOFF: 0x00000000 PIPEACONF: 0xc0000000 (enabled, active) PIPEASRC: 0x077f0437 (1920, 1080) PIPEASTAT: 0x00000307 (status: VSYNC_INT_STATUS DLINE_COMPARE_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) PIPEA_GMCH_DATA_M: 0x00000000 PIPEA_GMCH_DATA_N: 0x00000000 PIPEA_DP_LINK_M: 0x00000000 PIPEA_DP_LINK_N: 0x00000000 CURSOR_A_BASE: 0x00fa0000 CURSOR_A_CONTROL: 0x00000000 CURSOR_A_POSITION: 0x020f0438 FPA0: 0x00040f06 (n = 4, m1 = 15, m2 = 6) FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) DPLL_A: 0xd4010c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 1, p2 = 10) DPLL_A_MD: 0x00000000 HTOTAL_A: 0x0897077f (1920 active, 2200 total) HBLANK_A: 0x0897077f (1920 start, 2200 end) HSYNC_A: 0x080307d7 (2008 start, 2052 end) VTOTAL_A: 0x04640437 (1080 active, 1125 total) VBLANK_A: 0x04640437 (1080 start, 1125 end) VSYNC_A: 0x0440043b (1084 start, 1089 end) BCLRPAT_A: 0x00000000 VSYNCSHIFT_A: 0x00000000 DSPBCNTR: 0x01000000 (disabled, pipe B) DSPBSTRIDE: 0x00000000 (0 bytes) DSPBPOS: 0x00000000 (0, 0) DSPBSIZE: 0x00000000 (1, 1) DSPBBASE: 0x00000000 DSPBSURF: 0x00000000 DSPBTILEOFF: 0x00000000 PIPEBCONF: 0x00000000 (disabled, inactive) PIPEBSRC: 0x027f01df (640, 480) PIPEBSTAT: 0x00400000 (status: LBLC_EVENT_ENABLE) PIPEB_GMCH_DATA_M: 0x00000000 PIPEB_GMCH_DATA_N: 0x00000000 PIPEB_DP_LINK_M: 0x00000000 PIPEB_DP_LINK_N: 0x00000000 CURSOR_B_BASE: 0x00fa9000 CURSOR_B_CONTROL: 0x10000000 CURSOR_B_POSITION: 0x00000000 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8) FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) DPLL_B: 0x04800c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) DPLL_B_MD: 0x00000303 HTOTAL_B: 0x031f027f (640 active, 800 total) HBLANK_B: 0x03170287 (648 start, 792 end) HSYNC_B: 0x02ef028f (656 start, 752 end) VTOTAL_B: 0x020c01df (480 active, 525 total) VBLANK_B: 0x020401e7 (488 start, 517 end) VSYNC_B: 0x01eb01e9 (490 start, 492 end) BCLRPAT_B: 0x00000000 VSYNCSHIFT_B: 0x00000000 VCLK_DIVISOR_VGA0: 0x00031108 VCLK_DIVISOR_VGA1: 0x00031406 VCLK_POST_DIV: 0x00020002 VGACNTRL: 0x80000000 (disabled) TV_CTL: 0x00000000 TV_DAC: 0x70000000 TV_CSC_Y: 0x00000000 TV_CSC_Y2: 0x00000000 TV_CSC_U: 0x00000000 TV_CSC_U2: 0x00000000 TV_CSC_V: 0x00000000 TV_CSC_V2: 0x00000000 TV_CLR_KNOBS: 0x00000000 TV_CLR_LEVEL: 0x00000000 TV_H_CTL_1: 0x00000000 TV_H_CTL_2: 0x00000000 TV_H_CTL_3: 0x00000000 TV_V_CTL_1: 0x00000000 TV_V_CTL_2: 0x00000000 TV_V_CTL_3: 0x00000000 TV_V_CTL_4: 0x00000000 TV_V_CTL_5: 0x00000000 TV_V_CTL_6: 0x00000000 TV_V_CTL_7: 0x00000000 TV_SC_CTL_1: 0x00000000 TV_SC_CTL_2: 0x00000000 TV_SC_CTL_3: 0x00000000 TV_WIN_POS: 0x00000000 TV_WIN_SIZE: 0x00000000 TV_FILTER_CTL_1: 0x00000000 TV_FILTER_CTL_2: 0x00000000 TV_FILTER_CTL_3: 0x00000000 TV_CC_CONTROL: 0x00000000 TV_CC_DATA: 0x00000000 TV_H_LUMA_0: 0x00000000 TV_H_LUMA_59: 0x00000000 TV_H_CHROMA_0: 0x00000000 TV_H_CHROMA_59: 0x00000000 FBC_CFB_BASE: 0x00000000 FBC_LL_BASE: 0x00000000 FBC_CONTROL: 0x00000000 FBC_COMMAND: 0x00000000 FBC_STATUS: 0x20000000 FBC_CONTROL2: 0x00000000 FBC_FENCE_OFF: 0x00000000 FBC_MOD_NUM: 0x00000000 MI_MODE: 0x00000240 MI_ARB_STATE: 0x00000044 MI_RDRET_STATE: 0x00000000 ECOSKPD: 0x00000307 DP_B: 0x00000000 DPB_AUX_CH_CTL: 0x00000000 DPB_AUX_CH_DATA1: 0x00000000 DPB_AUX_CH_DATA2: 0x00000000 DPB_AUX_CH_DATA3: 0x00000000 DPB_AUX_CH_DATA4: 0x00000000 DPB_AUX_CH_DATA5: 0x00000000 DP_C: 0x00000000 DPC_AUX_CH_CTL: 0x00000000 DPC_AUX_CH_DATA1: 0x00000000 DPC_AUX_CH_DATA2: 0x00000000 DPC_AUX_CH_DATA3: 0x00000000 DPC_AUX_CH_DATA4: 0x00000000 DPC_AUX_CH_DATA5: 0x00000000 DP_D: 0x00000000 DPD_AUX_CH_CTL: 0x00000000 DPD_AUX_CH_DATA1: 0x00000000 DPD_AUX_CH_DATA2: 0x00000000 DPD_AUX_CH_DATA3: 0x00000000 DPD_AUX_CH_DATA4: 0x00000000 DPD_AUX_CH_DATA5: 0x00000000 AUD_CONFIG: 0x00000000 AUD_HDMIW_STATUS: 0x00000000 AUD_CONV_CHCNT: 0x00000000 VIDEO_DIP_CTL: 0x00000600 AUD_PINW_CNTR: 0x00000140 AUD_CNTL_ST: 0x00001800 AUD_PIN_CAP: 0x00000094 AUD_PINW_CAP: 0x004013b5 AUD_PINW_UNSOLRESP: 0x00000000 AUD_OUT_DIG_CNVT: 0x00000001 AUD_OUT_CWCAP: 0x00000219 AUD_GRP_CAP: 0x00000004 FENCE START 0: 0x0285200d ( enabled, X tile walk, 384 pitch, 0x02852000 start) FENCE END 0: 0x02853000 ( 0x02853000 end) FENCE START 1: 0x0285400d ( enabled, X tile walk, 384 pitch, 0x02854000 start) FENCE END 1: 0x02855000 ( 0x02855000 end) FENCE START 2: 0x0285600d ( enabled, X tile walk, 384 pitch, 0x02856000 start) FENCE END 2: 0x02857000 ( 0x02857000 end) FENCE START 3: 0x0285800d ( enabled, X tile walk, 384 pitch, 0x02858000 start) FENCE END 3: 0x02858000 ( 0x02858000 end) FENCE START 4: 0x0285900d ( enabled, X tile walk, 384 pitch, 0x02859000 start) FENCE END 4: 0x02859000 ( 0x02859000 end) FENCE START 5: 0x0285a00d ( enabled, X tile walk, 384 pitch, 0x0285a000 start) FENCE END 5: 0x0285a000 ( 0x0285a000 end) FENCE START 6: 0x0285b00d ( enabled, X tile walk, 384 pitch, 0x0285b000 start) FENCE END 6: 0x0285c000 ( 0x0285c000 end) FENCE START 7: 0x0288c00d ( enabled, X tile walk, 384 pitch, 0x0288c000 start) FENCE END 7: 0x0288d000 ( 0x0288d000 end) FENCE START 8: 0x00fd700d ( enabled, X tile walk, 384 pitch, 0x00fd7000 start) FENCE END 8: 0x00fd8000 ( 0x00fd8000 end) FENCE START 9: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 9: 0x00000000 ( 0x00000000 end) FENCE START 10: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 10: 0x00000000 ( 0x00000000 end) FENCE START 11: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 11: 0x00000000 ( 0x00000000 end) FENCE START 12: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 12: 0x00000000 ( 0x00000000 end) FENCE START 13: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 13: 0x00000000 ( 0x00000000 end) FENCE START 14: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 14: 0x00000000 ( 0x00000000 end) FENCE START 15: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 15: 0x00000000 ( 0x00000000 end) INST_PM: 0x00000000 pipe A dot 148800 n 4 m1 15 m2 6 p1 1 p2 10 pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10 While playing video (looks normal): DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11) CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) C0DRB0: 0x000f0002 (0x0002) C0DRB1: 0x0000000f (0x000f) C0DRB2: 0x00000000 (0x0000) C0DRB3: 0x00c00000 (0x0000) C1DRB0: 0x17cbe000 (0xe000) C1DRB1: 0x000017cb (0x17cb) C1DRB2: 0x00000000 (0x0000) C1DRB3: 0x00000000 (0x0000) C0DRA01: 0x000300c0 (0x00c0) C0DRA23: 0x000c0003 (0x0003) C1DRA01: 0x00000000 (0x0000) C1DRA23: 0x00000000 (0x0000) PGETBL_CTL: 0xbff80001 VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) DPLL_TEST: 0x00010001 () CACHE_MODE_0: 0x00006800 D_STATE: 0x00000000 DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) RENCLK_GATE_D1: 0x20000000 RENCLK_GATE_D2: 0x00000000 SDVOB: 0x800000dc (enabled, pipe A, stall disabled, detected) SDVOC: 0x00000018 (disabled, pipe A, stall disabled, not detected) SDVOUDI: 0x00000000 DSPARB: 0x00003fff DSPFW1: 0x3f8f0f0f DSPFW2: 0x00000f0f DSPFW3: 0x00000000 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync) LVDS: 0x42300300 (disabled, pipe B, 18 bit, 1 channel) DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOB: 0x800000dc (enabled, pipe A, no stall, +hsync, +vsync) DVOC: 0x00000018 (disabled, pipe A, no stall, +hsync, +vsync) DVOA_SRCDIM: 0x00000000 DVOB_SRCDIM: 0x00000000 DVOC_SRCDIM: 0x00000000 PP_CONTROL: 0x00000002 (power target: off) PP_STATUS: 0x00000000 (off, not ready, sequencing idle) PP_ON_DELAYS: 0x025807d0 PP_OFF_DELAYS: 0x01f407d0 PP_DIVISOR: 0x00410905 PFIT_CONTROL: 0x00000000 PFIT_PGM_RATIOS: 0x0d551000 PORT_HOTPLUG_EN: 0x00000020 PORT_HOTPLUG_STAT: 0x00000000 DSPACNTR: 0xd8000400 (enabled, pipe A) DSPASTRIDE: 0x00001e00 (7680 bytes) DSPAPOS: 0x00000000 (0, 0) DSPASIZE: 0x00000000 (1, 1) DSPABASE: 0x00000000 DSPASURF: 0x0079f000 DSPATILEOFF: 0x00000000 PIPEACONF: 0xc0000000 (enabled, active) PIPEASRC: 0x077f0437 (1920, 1080) PIPEASTAT: 0x00000307 (status: VSYNC_INT_STATUS DLINE_COMPARE_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) PIPEA_GMCH_DATA_M: 0x00000000 PIPEA_GMCH_DATA_N: 0x00000000 PIPEA_DP_LINK_M: 0x00000000 PIPEA_DP_LINK_N: 0x00000000 CURSOR_A_BASE: 0x00fa0000 CURSOR_A_CONTROL: 0x00000000 CURSOR_A_POSITION: 0x02db03e6 FPA0: 0x00040f06 (n = 4, m1 = 15, m2 = 6) FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) DPLL_A: 0xd4010c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 1, p2 = 10) DPLL_A_MD: 0x00000000 HTOTAL_A: 0x0897077f (1920 active, 2200 total) HBLANK_A: 0x0897077f (1920 start, 2200 end) HSYNC_A: 0x080307d7 (2008 start, 2052 end) VTOTAL_A: 0x04640437 (1080 active, 1125 total) VBLANK_A: 0x04640437 (1080 start, 1125 end) VSYNC_A: 0x0440043b (1084 start, 1089 end) BCLRPAT_A: 0x00000000 VSYNCSHIFT_A: 0x00000000 DSPBCNTR: 0x01000000 (disabled, pipe B) DSPBSTRIDE: 0x00000000 (0 bytes) DSPBPOS: 0x00000000 (0, 0) DSPBSIZE: 0x00000000 (1, 1) DSPBBASE: 0x00000000 DSPBSURF: 0x00000000 DSPBTILEOFF: 0x00000000 PIPEBCONF: 0x00000000 (disabled, inactive) PIPEBSRC: 0x027f01df (640, 480) PIPEBSTAT: 0x00400000 (status: LBLC_EVENT_ENABLE) PIPEB_GMCH_DATA_M: 0x00000000 PIPEB_GMCH_DATA_N: 0x00000000 PIPEB_DP_LINK_M: 0x00000000 PIPEB_DP_LINK_N: 0x00000000 CURSOR_B_BASE: 0x00fa9000 CURSOR_B_CONTROL: 0x10000000 CURSOR_B_POSITION: 0x00000000 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8) FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) DPLL_B: 0x04800c00 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) DPLL_B_MD: 0x00000303 HTOTAL_B: 0x031f027f (640 active, 800 total) HBLANK_B: 0x03170287 (648 start, 792 end) HSYNC_B: 0x02ef028f (656 start, 752 end) VTOTAL_B: 0x020c01df (480 active, 525 total) VBLANK_B: 0x020401e7 (488 start, 517 end) VSYNC_B: 0x01eb01e9 (490 start, 492 end) BCLRPAT_B: 0x00000000 VSYNCSHIFT_B: 0x00000000 VCLK_DIVISOR_VGA0: 0x00031108 VCLK_DIVISOR_VGA1: 0x00031406 VCLK_POST_DIV: 0x00020002 VGACNTRL: 0x80000000 (disabled) TV_CTL: 0x00000000 TV_DAC: 0x70000000 TV_CSC_Y: 0x00000000 TV_CSC_Y2: 0x00000000 TV_CSC_U: 0x00000000 TV_CSC_U2: 0x00000000 TV_CSC_V: 0x00000000 TV_CSC_V2: 0x00000000 TV_CLR_KNOBS: 0x00000000 TV_CLR_LEVEL: 0x00000000 TV_H_CTL_1: 0x00000000 TV_H_CTL_2: 0x00000000 TV_H_CTL_3: 0x00000000 TV_V_CTL_1: 0x00000000 TV_V_CTL_2: 0x00000000 TV_V_CTL_3: 0x00000000 TV_V_CTL_4: 0x00000000 TV_V_CTL_5: 0x00000000 TV_V_CTL_6: 0x00000000 TV_V_CTL_7: 0x00000000 TV_SC_CTL_1: 0x00000000 TV_SC_CTL_2: 0x00000000 TV_SC_CTL_3: 0x00000000 TV_WIN_POS: 0x00000000 TV_WIN_SIZE: 0x00000000 TV_FILTER_CTL_1: 0x00000000 TV_FILTER_CTL_2: 0x00000000 TV_FILTER_CTL_3: 0x00000000 TV_CC_CONTROL: 0x00000000 TV_CC_DATA: 0x00000000 TV_H_LUMA_0: 0x00000000 TV_H_LUMA_59: 0x00000000 TV_H_CHROMA_0: 0x00000000 TV_H_CHROMA_59: 0x00000000 FBC_CFB_BASE: 0x00000000 FBC_LL_BASE: 0x00000000 FBC_CONTROL: 0x00000000 FBC_COMMAND: 0x00000000 FBC_STATUS: 0x20000000 FBC_CONTROL2: 0x00000000 FBC_FENCE_OFF: 0x00000000 FBC_MOD_NUM: 0x00000000 MI_MODE: 0x00000240 MI_ARB_STATE: 0x00000044 MI_RDRET_STATE: 0x00000000 ECOSKPD: 0x00000307 DP_B: 0x00000000 DPB_AUX_CH_CTL: 0x00000000 DPB_AUX_CH_DATA1: 0x00000000 DPB_AUX_CH_DATA2: 0x00000000 DPB_AUX_CH_DATA3: 0x00000000 DPB_AUX_CH_DATA4: 0x00000000 DPB_AUX_CH_DATA5: 0x00000000 DP_C: 0x00000000 DPC_AUX_CH_CTL: 0x00000000 DPC_AUX_CH_DATA1: 0x00000000 DPC_AUX_CH_DATA2: 0x00000000 DPC_AUX_CH_DATA3: 0x00000000 DPC_AUX_CH_DATA4: 0x00000000 DPC_AUX_CH_DATA5: 0x00000000 DP_D: 0x00000000 DPD_AUX_CH_CTL: 0x00000000 DPD_AUX_CH_DATA1: 0x00000000 DPD_AUX_CH_DATA2: 0x00000000 DPD_AUX_CH_DATA3: 0x00000000 DPD_AUX_CH_DATA4: 0x00000000 DPD_AUX_CH_DATA5: 0x00000000 AUD_CONFIG: 0x00000000 AUD_HDMIW_STATUS: 0x00000000 AUD_CONV_CHCNT: 0x00000000 VIDEO_DIP_CTL: 0x00000600 AUD_PINW_CNTR: 0x00000140 AUD_CNTL_ST: 0x00001800 AUD_PIN_CAP: 0x00000094 AUD_PINW_CAP: 0x004013b5 AUD_PINW_UNSOLRESP: 0x00000000 AUD_OUT_DIG_CNVT: 0x00000001 AUD_OUT_CWCAP: 0x00000219 AUD_GRP_CAP: 0x00000004 FENCE START 0: 0x0285200d ( enabled, X tile walk, 384 pitch, 0x02852000 start) FENCE END 0: 0x02853000 ( 0x02853000 end) FENCE START 1: 0x0285400d ( enabled, X tile walk, 384 pitch, 0x02854000 start) FENCE END 1: 0x02855000 ( 0x02855000 end) FENCE START 2: 0x0285600d ( enabled, X tile walk, 384 pitch, 0x02856000 start) FENCE END 2: 0x02857000 ( 0x02857000 end) FENCE START 3: 0x0285800d ( enabled, X tile walk, 384 pitch, 0x02858000 start) FENCE END 3: 0x02858000 ( 0x02858000 end) FENCE START 4: 0x0285900d ( enabled, X tile walk, 384 pitch, 0x02859000 start) FENCE END 4: 0x02859000 ( 0x02859000 end) FENCE START 5: 0x0285a00d ( enabled, X tile walk, 384 pitch, 0x0285a000 start) FENCE END 5: 0x0285a000 ( 0x0285a000 end) FENCE START 6: 0x0285b00d ( enabled, X tile walk, 384 pitch, 0x0285b000 start) FENCE END 6: 0x0285c000 ( 0x0285c000 end) FENCE START 7: 0x0288c00d ( enabled, X tile walk, 384 pitch, 0x0288c000 start) FENCE END 7: 0x0288d000 ( 0x0288d000 end) FENCE START 8: 0x00fd700d ( enabled, X tile walk, 384 pitch, 0x00fd7000 start) FENCE END 8: 0x00fd8000 ( 0x00fd8000 end) FENCE START 9: 0x0079f0ed ( enabled, X tile walk, 7552 pitch, 0x0079f000 start) FENCE END 9: 0x00f9e000 ( 0x00f9e000 end) FENCE START 10: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 10: 0x00000000 ( 0x00000000 end) FENCE START 11: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 11: 0x00000000 ( 0x00000000 end) FENCE START 12: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 12: 0x00000000 ( 0x00000000 end) FENCE START 13: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 13: 0x00000000 ( 0x00000000 end) FENCE START 14: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 14: 0x00000000 ( 0x00000000 end) FENCE START 15: 0x00000000 (disabled, X tile walk, 0 pitch, 0x00000000 start) FENCE END 15: 0x00000000 ( 0x00000000 end) INST_PM: 0x00000000 pipe A dot 148800 n 4 m1 15 m2 6 p1 1 p2 10 pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10