diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b4f0282..2827475 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -246,6 +246,7 @@ intel_dp_aux_ch(struct intel_encoder *intel_encoder,
 			aux_clock_divider = 200; /* SNB eDP input clock at 400Mhz */
 		else
 			aux_clock_divider = 225; /* eDP input clock at 450Mhz */
+		I915_WRITE(PCH_PP_CONTROL, I915_READ(PCH_PP_CONTROL) | (1<<3));
 	} else if (HAS_PCH_SPLIT(dev))
 		aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */
 	else
@@ -749,6 +750,9 @@ static void ironlake_edp_backlight_on (struct drm_device *dev)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 pp;
 
+	I915_WRITE(PCH_PP_CONTROL, I915_READ(PCH_PP_CONTROL) | (0xabcd << 16) | POWER_TARGET_ON);
+	udelay(1000);
+
 	DRM_DEBUG_KMS("\n");
 	pp = I915_READ(PCH_PP_CONTROL);
 	pp |= EDP_BLC_ENABLE;
@@ -764,6 +768,9 @@ static void ironlake_edp_backlight_off (struct drm_device *dev)
 	pp = I915_READ(PCH_PP_CONTROL);
 	pp &= ~EDP_BLC_ENABLE;
 	I915_WRITE(PCH_PP_CONTROL, pp);
+
+	I915_WRITE(PCH_PP_CONTROL, I915_READ(PCH_PP_CONTROL) & ~POWER_TARGET_ON);
+	udelay(1000);
 }
 
 static void