diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b4f0282..9574c40 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -804,8 +804,10 @@ intel_dp_get_link_status(struct intel_encoder *intel_encoder,
 	ret = intel_dp_aux_native_read(intel_encoder,
 				       DP_LANE0_1_STATUS,
 				       link_status, DP_LINK_STATUS_SIZE);
-	if (ret != DP_LINK_STATUS_SIZE)
+	if (ret != DP_LINK_STATUS_SIZE) {
+		DRM_ERROR("failed to read link status\n");
 		return false;
+	}
 	return true;
 }
 
@@ -984,8 +986,10 @@ intel_clock_recovery_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count
 
 	for (lane = 0; lane < lane_count; lane++) {
 		lane_status = intel_get_lane_status(link_status, lane);
-		if ((lane_status & DP_LANE_CR_DONE) == 0)
+		if ((lane_status & DP_LANE_CR_DONE) == 0) {
+			DRM_ERROR("failed to get lane status\n");
 			return false;
+		}
 	}
 	return true;
 }
@@ -1036,8 +1040,10 @@ intel_dp_set_link_train(struct intel_encoder *intel_encoder,
 
 	ret = intel_dp_aux_native_write(intel_encoder,
 					DP_TRAINING_LANE0_SET, train_set, 4);
-	if (ret != 4)
+	if (ret != 4) {
+		DRM_ERROR("failed to perform AUX native write\n");
 		return false;
+	}
 
 	return true;
 }