diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index c19ed8c..d9e75c5 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -177,15 +177,26 @@ nv50_evo_channel_new(struct drm_device *dev, struct nouveau_channel **pchan)
 	return 0;
 }
 
+static inline u32 _nv_rd32(struct drm_device *dev, u32 reg)
+{
+	u32 val = nv_rd32(dev, reg);
+	NV_INFO(dev, "rd32 0x%08x 0x%08x\n", reg, val);
+	return val;
+}
+
+static inline void _nv_wr32(struct drm_device *dev, u32 reg, u32 val)
+{
+	NV_INFO(dev, "wr32 0x%08x 0x%08x\n", reg, val);
+	nv_wr32(dev, reg, val);
+}
+
 int
 nv50_display_init(struct drm_device *dev)
 {
 	struct drm_nouveau_private *dev_priv = dev->dev_private;
-	struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
 	struct nouveau_channel *evo = dev_priv->evo;
 	struct drm_connector *connector;
-	uint32_t val, ram_amount, hpd_en[2];
-	uint64_t start;
+	uint32_t val, hpd_en[2];
 	int ret, i;
 
 	NV_DEBUG_KMS(dev, "\n");
@@ -228,61 +239,6 @@ nv50_display_init(struct drm_device *dev)
 		nv_wr32(dev, NV50_PDISPLAY_DAC_CLK_CTRL1(i), 0x00000001);
 	}
 
-	/* This used to be in crtc unblank, but seems out of place there. */
-	nv_wr32(dev, NV50_PDISPLAY_UNK_380, 0);
-	/* RAM is clamped to 256 MiB. */
-	ram_amount = dev_priv->vram_size;
-	NV_DEBUG_KMS(dev, "ram_amount %d\n", ram_amount);
-	if (ram_amount > 256*1024*1024)
-		ram_amount = 256*1024*1024;
-	nv_wr32(dev, NV50_PDISPLAY_RAM_AMOUNT, ram_amount - 1);
-	nv_wr32(dev, NV50_PDISPLAY_UNK_388, 0x150000);
-	nv_wr32(dev, NV50_PDISPLAY_UNK_38C, 0);
-
-	/* The precise purpose is unknown, i suspect it has something to do
-	 * with text mode.
-	 */
-	if (nv_rd32(dev, NV50_PDISPLAY_INTR_1) & 0x100) {
-		nv_wr32(dev, NV50_PDISPLAY_INTR_1, 0x100);
-		nv_wr32(dev, 0x006194e8, nv_rd32(dev, 0x006194e8) & ~1);
-		if (!nv_wait(0x006194e8, 2, 0)) {
-			NV_ERROR(dev, "timeout: (0x6194e8 & 2) != 0\n");
-			NV_ERROR(dev, "0x6194e8 = 0x%08x\n",
-						nv_rd32(dev, 0x6194e8));
-			return -EBUSY;
-		}
-	}
-
-	/* taken from nv bug #12637, attempts to un-wedge the hw if it's
-	 * stuck in some unspecified state
-	 */
-	start = ptimer->read(dev);
-	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), 0x2b00);
-	while ((val = nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0))) & 0x1e0000) {
-		if ((val & 0x9f0000) == 0x20000)
-			nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0),
-							val | 0x800000);
-
-		if ((val & 0x3f0000) == 0x30000)
-			nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0),
-							val | 0x200000);
-
-		if (ptimer->read(dev) - start > 1000000000ULL) {
-			NV_ERROR(dev, "timeout: (0x610200 & 0x1e0000) != 0\n");
-			NV_ERROR(dev, "0x610200 = 0x%08x\n", val);
-			return -EBUSY;
-		}
-	}
-
-	nv_wr32(dev, NV50_PDISPLAY_CTRL_STATE, NV50_PDISPLAY_CTRL_STATE_ENABLE);
-	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), 0x1000b03);
-	if (!nv_wait(NV50_PDISPLAY_CHANNEL_STAT(0), 0x40000000, 0x40000000)) {
-		NV_ERROR(dev, "timeout: (0x610200 & 0x40000000) == 0x40000000\n");
-		NV_ERROR(dev, "0x610200 = 0x%08x\n",
-			  nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0)));
-		return -EBUSY;
-	}
-
 	for (i = 0; i < 2; i++) {
 		nv_wr32(dev, NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i), 0x2000);
 		if (!nv_wait(NV50_PDISPLAY_CURSOR_CURSOR_CTRL2(i),
@@ -308,25 +264,54 @@ nv50_display_init(struct drm_device *dev)
 
 	nv_wr32(dev, NV50_PDISPLAY_OBJECTS, (evo->ramin->instance >> 8) | 9);
 
+	/* The precise purpose is unknown, i suspect it has something to do
+	 * with text mode.
+	 */
+	if (nv_rd32(dev, NV50_PDISPLAY_INTR_1) & 0x100) {
+		nv_wr32(dev, NV50_PDISPLAY_INTR_1, 0x100);
+		nv_wr32(dev, 0x006194e8, nv_rd32(dev, 0x006194e8) & ~1);
+		if (!nv_wait(0x006194e8, 2, 0)) {
+			NV_ERROR(dev, "timeout: (0x6194e8 & 2) != 0\n");
+			NV_ERROR(dev, "0x6194e8 = 0x%08x\n",
+						nv_rd32(dev, 0x6194e8));
+			return -EBUSY;
+		}
+	}
+
+	/* taken from nv bug #12637, attempts to un-wedge the hw if it's
+	 * stuck in some unspecified state
+	 */
+	val = _nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0));
+	if ((val & 0x009f0000) == 0x00020000)
+		_nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), val | 0x00800000);
+	val = _nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0));
+	if ((val & 0x003f0000) == 0x00030000)
+		_nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), val | 0x00600000);
+	(void)_nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0));
+
 	/* initialise fifo */
-	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_DMA_CB(0),
+	_nv_wr32(dev, NV50_PDISPLAY_CHANNEL_DMA_CB(0),
 		((evo->pushbuf_bo->bo.mem.mm_node->start << PAGE_SHIFT) >> 8) |
 		NV50_PDISPLAY_CHANNEL_DMA_CB_LOCATION_VRAM |
 		NV50_PDISPLAY_CHANNEL_DMA_CB_VALID);
-	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_UNK2(0), 0x00010000);
-	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_UNK3(0), 0x00000002);
-	if (!nv_wait(0x610200, 0x80000000, 0x00000000)) {
-		NV_ERROR(dev, "timeout: (0x610200 & 0x80000000) == 0\n");
-		NV_ERROR(dev, "0x610200 = 0x%08x\n", nv_rd32(dev, 0x610200));
+	_nv_wr32(dev, NV50_PDISPLAY_CHANNEL_UNK2(0), 0x00010000);
+	_nv_wr32(dev, NV50_PDISPLAY_CHANNEL_UNK3(0), 0x00000002);
+	(void)_nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0));
+
+	val = _nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0));
+	_nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), val |
+		     NV50_PDISPLAY_CHANNEL_STAT_DMA_ENABLED);
+	(void)_nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0));
+	_nv_wr32(dev, NV50_PDISPLAY_USER_PUT(0), 0);
+	(void)_nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0));
+	_nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), 0x01000013);
+	(void)_nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0));
+	if (!nv_wait(NV50_PDISPLAY_CHANNEL_STAT(0), 0x80000000, 0x00000000)) {
+		NV_ERROR(dev, "evo channel reporting busy: 0x%08x\n",
+			 nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0)));
 		return -EBUSY;
 	}
-	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0),
-		(nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0)) & ~0x00000003) |
-		 NV50_PDISPLAY_CHANNEL_STAT_DMA_ENABLED);
-	nv_wr32(dev, NV50_PDISPLAY_USER_PUT(0), 0);
-	nv_wr32(dev, NV50_PDISPLAY_CHANNEL_STAT(0), 0x01000003 |
-		NV50_PDISPLAY_CHANNEL_STAT_DMA_ENABLED);
-	nv_wr32(dev, 0x610300, nv_rd32(dev, 0x610300) & ~1);
+	(void)_nv_rd32(dev, NV50_PDISPLAY_CHANNEL_STAT(0));
 
 	evo->dma.max = (4096/4) - 2;
 	evo->dma.put = 0;