diff --git a/drivers/gpu/drm/nouveau/nv04_dac.c b/drivers/gpu/drm/nouveau/nv04_dac.c
index ea36270..a7e15d4 100644
--- a/drivers/gpu/drm/nouveau/nv04_dac.c
+++ b/drivers/gpu/drm/nouveau/nv04_dac.c
@@ -292,6 +292,9 @@ uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
 
 	sample = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
 
+	NV_INFO(dev, "%s: output=%d sample=%08x\n", __func__,
+		dcb->index, sample);
+
 	temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL);
 	NVWriteRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL,
 		      temp & ~NV_PRAMDAC_TEST_CONTROL_TP_INS_EN_ASSERTED);
diff --git a/drivers/gpu/drm/nouveau/nv10_gpio.c b/drivers/gpu/drm/nouveau/nv10_gpio.c
index 007fc29..e2811da 100644
--- a/drivers/gpu/drm/nouveau/nv10_gpio.c
+++ b/drivers/gpu/drm/nouveau/nv10_gpio.c
@@ -68,6 +68,9 @@ nv10_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag)
 
 	value = NVReadCRTC(dev, 0, reg) >> shift;
 
+	NV_INFO(dev, "%s: line=%d state=%d\n", __func__,
+		ent->line, value & 1);
+
 	return (ent->invert ? 1 : 0) ^ (value & 1);
 }
 
@@ -83,6 +86,9 @@ nv10_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state)
 	if (!get_gpio_location(ent, &reg, &shift, &mask))
 		return -ENODEV;
 
+	NV_INFO(dev, "%s: line=%d state=%d\n", __func__,
+		ent->line, state);
+
 	value = ((ent->invert ? 1 : 0) ^ (state ? 1 : 0)) << shift;
 	mask = ~(mask << shift);