diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c
index 497df87..ac02b84 100644
--- a/drivers/gpu/drm/nouveau/nv04_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv04_crtc.c
@@ -134,7 +134,7 @@ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mod
 	state->pllsel &= PLLSEL_VPLL1_MASK | PLLSEL_VPLL2_MASK | PLLSEL_TV_MASK;
 
 	/* The blob uses this always, so let's do the same */
-	if (dev_priv->card_type == NV_40)
+	/* if (dev_priv->card_type == NV_40) */
 		state->pllsel |= NV_PRAMDAC_PLL_COEFF_SELECT_USE_VPLL2_TRUE;
 	/* again nv40 and some nv43 act more like nv3x as described above */
 	if (dev_priv->chipset < 0x41)
@@ -222,6 +222,17 @@ static bool
 nv_crtc_mode_fixup(struct drm_crtc *crtc, struct drm_display_mode *mode,
 		   struct drm_display_mode *adjusted_mode)
 {
+	adjusted_mode->crtc_hdisplay = 1024;
+	adjusted_mode->crtc_hsync_start = 1072;
+	adjusted_mode->crtc_hsync_end = 1168;
+	adjusted_mode->crtc_htotal = 1376;
+	adjusted_mode->crtc_vdisplay = 768;
+	adjusted_mode->crtc_vsync_start = 770;
+	adjusted_mode->crtc_vsync_end = 785;
+	adjusted_mode->crtc_vtotal = 810;
+	adjusted_mode->clock = 99203;
+	adjusted_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC;
+
 	return true;
 }
 
@@ -482,7 +493,7 @@ nv_crtc_mode_set_regs(struct drm_crtc *crtc, struct drm_display_mode * mode)
 
 	/* What is the meaning of this register? */
 	/* A few popular values are 0x18, 0x1c, 0x38, 0x3c */
-	regp->CRTC[NV_CIO_CRE_ENH_INDEX] = savep->CRTC[NV_CIO_CRE_ENH_INDEX] & ~(1<<5);
+	regp->CRTC[NV_CIO_CRE_ENH_INDEX] = savep->CRTC[NV_CIO_CRE_ENH_INDEX];
 
 	regp->crtc_eng_ctrl = 0;
 	/* Except for rare conditions I2C is enabled on the primary crtc */
@@ -545,8 +556,8 @@ nv_crtc_mode_set_regs(struct drm_crtc *crtc, struct drm_display_mode * mode)
 	if (dev_priv->card_type >= NV_30)
 		regp->CRTC[0x9f] = off_chip_digital ? 0x11 : 0x1;
 
-	regp->crtc_830 = mode->crtc_vdisplay - 3;
-	regp->crtc_834 = mode->crtc_vdisplay - 1;
+	regp->crtc_830 = 0;
+	regp->crtc_834 = 0;
 
 	if (dev_priv->card_type == NV_40)
 		/* This is what the blob does */
@@ -583,7 +594,7 @@ nv_crtc_mode_set_regs(struct drm_crtc *crtc, struct drm_display_mode * mode)
 		regp->ramdac_gen_ctrl |= NV_PRAMDAC_GENERAL_CONTROL_PIPE_LONG;
 
 	regp->ramdac_630 = 0; /* turn off green mode (tv test pattern?) */
-	regp->tv_setup = 0;
+	regp->tv_setup = 1;
 
 	nv_crtc_set_image_sharpening(crtc, nv_crtc->sharpness);