rm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 29
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 29
[drm:i9xx_update_wm], self-refresh entries: 28
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 29, C: 2, SR 99
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
[drm:i915_driver_irq_handler], pipe a underrun
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_crtc_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_crtc_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:intel_crtc_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:drm_mode_getconnector], connector id 5:
[drm:drm_helper_probe_single_connector_modes], VGA-1
[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
[drm:drm_mode_getconnector], connector id 5:
[drm:drm_helper_probe_single_connector_modes], VGA-1
[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
[drm:drm_mode_getconnector], connector id 7:
[drm:drm_helper_probe_single_connector_modes], LVDS-1
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:drm_helper_probe_single_connector_modes], Probed modes for LVDS-1
[drm:drm_mode_debug_printmodeline], Modeline 28:"1280x800" 60 71250 1280 1328 1360 1440 800 802 808 823 0x48 0xa
[drm:drm_mode_getconnector], connector id 7:
[drm:drm_mode_getconnector], connector id 13:
[drm:drm_helper_probe_single_connector_modes], SVIDEO-1
[drm:intel_update_watermarks], plane B (pipe 0) clock: 107520
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 33
[drm:intel_calculate_wm], FIFO watermark level: -4
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 1
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 1, C: 2, SR 1
[drm:i915_get_vblank_counter], trying to get vblank count for disabled pipe 0
[drm:intel_crtc_mode_set], Mode for pipe A:
[drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
[drm:i915_driver_irq_handler], pipe a underrun
[drm:intel_pipe_set_base], No FB bound
[drm:intel_update_watermarks], plane B (pipe 0) clock: 107520
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 33
[drm:intel_calculate_wm], FIFO watermark level: -4
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 1
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 1, C: 2, SR 1
[drm:i915_driver_irq_handler], pipe a underrun
[drm:intel_update_watermarks], plane B (pipe 0) clock: 107520
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 33
[drm:intel_calculate_wm], FIFO watermark level: -4
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 1
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 1, C: 2, SR 1
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:intel_tv_detect_type], No TV connection detected
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 29
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 29
[drm:i9xx_update_wm], self-refresh entries: 28
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 29, C: 2, SR 99
[drm:i915_driver_irq_handler], pipe a underrun
[drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
[drm:drm_mode_getconnector], connector id 13:
[drm:drm_helper_probe_single_connector_modes], SVIDEO-1
[drm:intel_update_watermarks], plane B (pipe 0) clock: 107520
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 33
[drm:intel_calculate_wm], FIFO watermark level: -4
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 1
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 1, C: 2, SR 1
[drm:i915_get_vblank_counter], trying to get vblank count for disabled pipe 0
[drm:intel_crtc_mode_set], Mode for pipe A:
[drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
[drm:i915_driver_irq_handler], pipe a underrun
[drm:intel_pipe_set_base], No FB bound
[drm:intel_update_watermarks], plane B (pipe 0) clock: 107520
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 33
[drm:intel_calculate_wm], FIFO watermark level: -4
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 1
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 1, C: 2, SR 1
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:intel_update_watermarks], plane B (pipe 0) clock: 107520
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 33
[drm:intel_calculate_wm], FIFO watermark level: -4
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 1
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 1, C: 2, SR 1
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:intel_tv_detect_type], No TV connection detected
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 29
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 29
[drm:i9xx_update_wm], self-refresh entries: 28
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 29, C: 2, SR 99
[drm:i915_driver_irq_handler], pipe a underrun
[drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_hangcheck_elapsed] *ERROR* Hangcheck timer elapsed... GPU hung
[drm:i915_do_wait_request] *ERROR* i915_do_wait_request returns -5 (awaiting 144398 at 144384)
[drm:i915_error_work_func], generating error event
[drm:i915_error_work_func], reboot required
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:i915_gem_phys_pwrite], obj_addr f6e58000, 16384
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_crtc_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_crtc_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_crtc_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_crtc_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_crtc_cursor_set], 
[drm:intel_crtc_cursor_set], cursor off
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e6000 3 fb: f75a1078 connectors: f748a770 num_connectors: 0 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 29
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 29
[drm:i9xx_update_wm], self-refresh entries: 28
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 29, C: 2, SR 99
[drm:i915_get_vblank_counter], trying to get vblank count for disabled pipe 0
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e7000 4 fb: f75a1078 connectors: f748a780 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
[drm:intel_pipe_set_base], Writing base 007E0000 00000000 0 0 5120
[drm:intel_update_fbc], 
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e7000 4 fb: f75a1078 connectors: f748a780 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e7000 4 fb: f75a1078 connectors: f748a780 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_crtc_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e7000 4 fb: f75a1078 connectors: f748a780 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
fbcondecor: console 0 using theme 'emerge-world'
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e7000 4 fb: f75a1078 connectors: f748a780 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
fbcondecor: switched decor state to 'on' on console 0
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e7000 4 fb: f75a1078 connectors: f748a780 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e7000 4 fb: f660df80 connectors: f0e2e080 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
[drm:intel_pipe_set_base], Writing base 04800000 00000000 0 0 8192
[drm:intel_update_fbc], 
[drm:drm_mode_getconnector], connector id 5:
[drm:drm_helper_probe_single_connector_modes], VGA-1
[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
[drm:drm_mode_getconnector], connector id 5:
[drm:drm_helper_probe_single_connector_modes], VGA-1
[drm:drm_helper_probe_single_connector_modes], VGA-1 is disconnected
[drm:drm_mode_getconnector], connector id 7:
[drm:drm_helper_probe_single_connector_modes], LVDS-1
[drm:drm_helper_probe_single_connector_modes], Probed modes for LVDS-1
[drm:drm_mode_debug_printmodeline], Modeline 28:"1280x800" 60 71250 1280 1328 1360 1440 800 802 808 823 0x48 0xa
[drm:drm_mode_getconnector], connector id 7:
[drm:drm_mode_getconnector], connector id 13:
[drm:drm_helper_probe_single_connector_modes], SVIDEO-1
[drm:intel_update_watermarks], plane B (pipe 0) clock: 107520
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 33
[drm:intel_calculate_wm], FIFO watermark level: -4
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 1
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 1, C: 2, SR 1
[drm:i915_get_vblank_counter], trying to get vblank count for disabled pipe 0
[drm:intel_crtc_mode_set], Mode for pipe A:
[drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:intel_pipe_set_base], No FB bound
[drm:intel_update_watermarks], plane B (pipe 0) clock: 107520
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 33
[drm:intel_calculate_wm], FIFO watermark level: -4
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 1
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 1, C: 2, SR 1
ata1.00: configured for UDMA/100
ata1: EH complete
[drm:intel_update_watermarks], plane B (pipe 0) clock: 107520
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 33
[drm:intel_calculate_wm], FIFO watermark level: -4
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 1
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 1, C: 2, SR 1
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:intel_tv_detect_type], No TV connection detected
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 29
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 29
[drm:i9xx_update_wm], self-refresh entries: 28
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 29, C: 2, SR 99
[drm:i915_driver_irq_handler], pipe a underrun
[drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
[drm:drm_mode_getconnector], connector id 13:
[drm:drm_helper_probe_single_connector_modes], SVIDEO-1
[drm:intel_update_watermarks], plane B (pipe 0) clock: 107520
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 33
[drm:intel_calculate_wm], FIFO watermark level: -4
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 1
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 1, C: 2, SR 1
[drm:i915_get_vblank_counter], trying to get vblank count for disabled pipe 0
[drm:i915_driver_irq_handler], pipe a underrun
[drm:intel_crtc_mode_set], Mode for pipe A:
[drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:intel_pipe_set_base], No FB bound
[drm:intel_update_watermarks], plane B (pipe 0) clock: 107520
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 33
[drm:intel_calculate_wm], FIFO watermark level: -4
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 1
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 1, C: 2, SR 1
[drm:i915_driver_irq_handler], pipe a underrun
[drm:intel_update_watermarks], plane B (pipe 0) clock: 107520
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 33
[drm:intel_calculate_wm], FIFO watermark level: -4
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 1
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 1, C: 2, SR 1
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:i915_driver_irq_handler], pipe a underrun
[drm:intel_tv_detect_type], No TV connection detected
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 29
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 29
[drm:i9xx_update_wm], self-refresh entries: 28
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 29, C: 2, SR 99
[drm:i915_driver_irq_handler], pipe a underrun
[drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_crtc_cursor_set], 
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:i915_driver_irq_handler], pipe a underrun
EXT4-fs (sda3): re-mounted. Opts: commit=0
EXT4-fs (sda5): re-mounted. Opts: usrquota,grpquota,commit=0
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_crtc_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_crtc_cursor_set], 
[drm:intel_crtc_cursor_set], cursor off
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e6000 3 fb: f75a1078 connectors: f748a770 num_connectors: 0 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
[drm:intel_update_watermarks], plane A (pipe 1) clock: 71250
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) A: 28
[drm:i9xx_get_fifo_size], FIFO size - (0x00001d9c) B: 31
[drm:intel_calculate_wm], FIFO entries required for mode: 22
[drm:intel_calculate_wm], FIFO watermark level: 4
[drm:intel_calculate_wm], FIFO entries required for mode: 0
[drm:intel_calculate_wm], FIFO watermark level: 29
[drm:i9xx_update_wm], FIFO watermarks - A: 4, B: 29
[drm:i9xx_update_wm], self-refresh entries: 28
[drm:i9xx_update_wm], Setting FIFO watermarks - A: 4, B: 29, C: 2, SR 99
[drm:i915_get_vblank_counter], trying to get vblank count for disabled pipe 0
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e7000 4 fb: f75a1078 connectors: f748a780 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
[drm:intel_pipe_set_base], Writing base 007E0000 00000000 0 0 5120
[drm:intel_update_fbc], 
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e7000 4 fb: f75a1078 connectors: f748a780 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e7000 4 fb: f75a1078 connectors: f748a780 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e7000 4 fb: f75a1078 connectors: f748a780 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
[drm:drm_crtc_helper_set_config], 
[drm:drm_crtc_helper_set_config], crtc: f75e7000 4 fb: f75a1078 connectors: f748a780 num_connectors: 1 (x, y) (0, 0)
[drm:drm_crtc_helper_set_config], setting connector 7 crtc to f75e7000
[drm:intel_mark_busy], disable memory self refresh on 945
[drm:intel_gpu_idle_timer], idle timer fired, downclocking
[drm:intel_idle_update], enable memory self refresh on 945