Initializing cgroup subsys cpuset Initializing cgroup subsys cpu Linux version 2.6.36-ARCH (tobias@T-POWA-LX) (gcc version 4.5.1 (GCC) ) #1 SMP PREEMPT Sun Oct 31 09:29:11 CET 2010 Command line: root=/dev/mapper/vg_soulou2-LogVol00 ro BIOS-provided physical RAM map: BIOS-e820: 0000000000000000 - 000000000009dc00 (usable) BIOS-e820: 000000000009dc00 - 00000000000a0000 (reserved) BIOS-e820: 00000000000e4000 - 0000000000100000 (reserved) BIOS-e820: 0000000000100000 - 000000008fec0000 (usable) BIOS-e820: 000000008fec0000 - 000000008fecf000 (ACPI data) BIOS-e820: 000000008fecf000 - 000000008fee5000 (ACPI NVS) BIOS-e820: 000000008fee5000 - 00000000a0000000 (reserved) BIOS-e820: 00000000e0000000 - 00000000f0000000 (reserved) BIOS-e820: 00000000fec00000 - 00000000fec10000 (reserved) BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved) BIOS-e820: 00000000fff80000 - 0000000100000000 (reserved) BIOS-e820: 0000000100000000 - 0000000160000000 (usable) NX (Execute Disable) protection: active DMI present. e820 update range: 0000000000000000 - 0000000000001000 (usable) ==> (reserved) e820 remove range: 00000000000a0000 - 0000000000100000 (usable) No AGP bridge found last_pfn = 0x160000 max_arch_pfn = 0x400000000 MTRR default type: uncachable MTRR fixed ranges enabled: 00000-9FFFF write-back A0000-BFFFF uncachable C0000-C7FFF write-protect C8000-DBFFF uncachable DC000-EFFFF write-through F0000-FFFFF write-back MTRR variable ranges enabled: 0 base 0A0000000 mask FE0000000 uncachable 1 base 0C0000000 mask FC0000000 uncachable 2 base 000000000 mask F00000000 write-back 3 base 100000000 mask FC0000000 write-back 4 base 140000000 mask FE0000000 write-back 5 base 09FF00000 mask FFFF00000 uncachable 6 disabled 7 disabled x86 PAT enabled: cpu 0, old 0x7040600070406, new 0x7010600070106 e820 update range: 000000009ff00000 - 0000000100000000 (usable) ==> (reserved) last_pfn = 0x8fec0 max_arch_pfn = 0x400000000 e820 update range: 0000000000001000 - 0000000000010000 (usable) ==> (reserved) Scanning 1 areas for low memory corruption modified physical RAM map: modified: 0000000000000000 - 0000000000010000 (reserved) modified: 0000000000010000 - 000000000009dc00 (usable) modified: 000000000009dc00 - 00000000000a0000 (reserved) modified: 00000000000e4000 - 0000000000100000 (reserved) modified: 0000000000100000 - 000000008fec0000 (usable) modified: 000000008fec0000 - 000000008fecf000 (ACPI data) modified: 000000008fecf000 - 000000008fee5000 (ACPI NVS) modified: 000000008fee5000 - 00000000a0000000 (reserved) modified: 00000000e0000000 - 00000000f0000000 (reserved) modified: 00000000fec00000 - 00000000fec10000 (reserved) modified: 00000000fee00000 - 00000000fee01000 (reserved) modified: 00000000fff80000 - 0000000100000000 (reserved) modified: 0000000100000000 - 0000000160000000 (usable) initial memory mapped : 0 - 20000000 found SMP MP-table at [ffff8800000f7b50] f7b50 init_memory_mapping: 0000000000000000-000000008fec0000 0000000000 - 008fe00000 page 2M 008fe00000 - 008fec0000 page 4k kernel direct mapping tables up to 8fec0000 @ 16000-1b000 init_memory_mapping: 0000000100000000-0000000160000000 0100000000 - 0160000000 page 2M kernel direct mapping tables up to 160000000 @ 19000-20000 RAMDISK: 37cf6000 - 37ff0000 ACPI: RSDP 00000000000f7b20 00024 (v02 PTLTD ) ACPI: XSDT 000000008fec3ac3 000A4 (v01 DELL QA09 06040000 LTP 00000000) ACPI: FACP 000000008fecec04 000F4 (v03 NVIDIA MCP79 06040000 PTL_ 000F4240) ACPI: DSDT 000000008fec5655 0953B (v01 NVIDIA MCP79 06040000 MSFT 03000001) ACPI: FACS 000000008fee4fc0 00040 ACPI: MCFG 000000008fececf8 0003C (v01 PTLTD MCFG 06040000 LTP 00000000) ACPI: HPET 000000008feced34 00038 (v01 PTLTD HPETTBL 06040000 LTP 00000001) ACPI: APIC 000000008feced6c 00072 (v01 PTLTD ? APIC 06040000 LTP 00000000) ACPI: BOOT 000000008fecedde 00028 (v01 PTLTD $SBFTBL$ 06040000 LTP 00000001) ACPI: SLIC 000000008fecee06 00176 (v01 DELL QA09 06040000 LTP 00000000) ACPI: OSFR 000000008fecef7c 00084 (v01 DELL DELL 06040000 ASL 00000061) ACPI: SSDT 000000008fec53f6 0025F (v01 PmRef Cpu0Tst 00003000 INTL 20050228) ACPI: SSDT 000000008fec5350 000A6 (v01 PmRef Cpu7Tst 00003000 INTL 20050228) ACPI: SSDT 000000008fec52aa 000A6 (v01 PmRef Cpu6Tst 00003000 INTL 20050228) ACPI: SSDT 000000008fec5204 000A6 (v01 PmRef Cpu5Tst 00003000 INTL 20050228) ACPI: SSDT 000000008fec515e 000A6 (v01 PmRef Cpu4Tst 00003000 INTL 20050228) ACPI: SSDT 000000008fec50b8 000A6 (v01 PmRef Cpu3Tst 00003000 INTL 20050228) ACPI: SSDT 000000008fec5012 000A6 (v01 PmRef Cpu2Tst 00003000 INTL 20050228) ACPI: SSDT 000000008fec4f6c 000A6 (v01 PmRef Cpu1Tst 00003000 INTL 20050228) ACPI: SSDT 000000008fec3b67 01405 (v01 PmRef CpuPm 00003000 INTL 20050228) ACPI: Local APIC address 0xfee00000 [ffffea0000000000-ffffea0004dfffff] PMD -> [ffff880002000000-ffff8800055fffff] on node 0 Zone PFN ranges: DMA 0x00000010 -> 0x00001000 DMA32 0x00001000 -> 0x00100000 Normal 0x00100000 -> 0x00160000 Movable zone start PFN for each node early_node_map[3] active PFN ranges 0: 0x00000010 -> 0x0000009d 0: 0x00000100 -> 0x0008fec0 0: 0x00100000 -> 0x00160000 On node 0 totalpages: 982605 DMA zone: 56 pages used for memmap DMA zone: 0 pages reserved DMA zone: 3925 pages, LIFO batch:0 DMA32 zone: 14280 pages used for memmap DMA32 zone: 571128 pages, LIFO batch:31 Normal zone: 5376 pages used for memmap Normal zone: 387840 pages, LIFO batch:31 ACPI: PM-Timer IO Port: 0x1008 ACPI: Local APIC address 0xfee00000 ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled) ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled) ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1]) ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1]) ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0]) IOAPIC[0]: apic_id 2, version 17, address 0xfec00000, GSI 0-23 ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 high edge) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) ACPI: IRQ0 used by override. ACPI: IRQ2 used by override. ACPI: IRQ9 used by override. Using ACPI (MADT) for SMP configuration information ACPI: HPET id: 0x10dea301 base: 0xfed00000 SMP: Allowing 2 CPUs, 0 hotplug CPUs nr_irqs_gsi: 40 early_res array is doubled to 64 at [1b2e0 - 1badf] PM: Registered nosave memory: 000000000009d000 - 000000000009e000 PM: Registered nosave memory: 000000000009e000 - 00000000000a0000 PM: Registered nosave memory: 00000000000a0000 - 00000000000e4000 PM: Registered nosave memory: 00000000000e4000 - 0000000000100000 PM: Registered nosave memory: 000000008fec0000 - 000000008fecf000 PM: Registered nosave memory: 000000008fecf000 - 000000008fee5000 PM: Registered nosave memory: 000000008fee5000 - 00000000a0000000 PM: Registered nosave memory: 00000000a0000000 - 00000000e0000000 PM: Registered nosave memory: 00000000e0000000 - 00000000f0000000 PM: Registered nosave memory: 00000000f0000000 - 00000000fec00000 PM: Registered nosave memory: 00000000fec00000 - 00000000fec10000 PM: Registered nosave memory: 00000000fec10000 - 00000000fee00000 PM: Registered nosave memory: 00000000fee00000 - 00000000fee01000 PM: Registered nosave memory: 00000000fee01000 - 00000000fff80000 PM: Registered nosave memory: 00000000fff80000 - 0000000100000000 Allocating PCI resources starting at a0000000 (gap: a0000000:40000000) Booting paravirtualized kernel on bare hardware setup_percpu: NR_CPUS:64 nr_cpumask_bits:64 nr_cpu_ids:2 nr_node_ids:1 PERCPU: Embedded 28 pages/cpu @ffff880001a00000 s86016 r8192 d20480 u1048576 pcpu-alloc: s86016 r8192 d20480 u1048576 alloc=1*2097152 pcpu-alloc: [0] 0 1 Built 1 zonelists in Zone order, mobility grouping on. Total pages: 962893 Kernel command line: root=/dev/mapper/vg_soulou2-LogVol00 ro PID hash table entries: 4096 (order: 3, 32768 bytes) Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes) Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes) early_res array is doubled to 128 at [1bae0 - 1cadf] xsave/xrstor: enabled xstate_bv 0x3, cntxt size 0x240 Checking aperture... No AGP bridge found Calgary: detecting Calgary via BIOS EBDA area Calgary: Unable to locate Rio Grande table in EBDA - bailing! Subtract (60 early reservations) #1 [0001000000 - 00017f99a8] TEXT DATA BSS #2 [0037cf6000 - 0037ff0000] RAMDISK #3 [00017fa000 - 00017fa16c] BRK #4 [00000f7b60 - 0000100000] BIOS reserved #5 [00000f7b50 - 00000f7b60] MP-table mpf #6 [000009dc00 - 000009e171] BIOS reserved #7 [000009e28d - 00000f7b50] BIOS reserved #8 [000009e171 - 000009e28d] MP-table mpc #9 [0000010000 - 0000012000] TRAMPOLINE #10 [0000012000 - 0000016000] ACPI WAKEUP #11 [0000016000 - 0000019000] PGTABLE #12 [0000019000 - 000001b000] PGTABLE #13 [00017fa180 - 00017fb180] BOOTMEM #14 [000001b000 - 000001b2d0] BOOTMEM #15 [0001ffc000 - 0001ffd000] BOOTMEM #16 [0001ffd000 - 0001ffe000] BOOTMEM #17 [0002000000 - 0005600000] MEMMAP 0 #18 [00017fb180 - 0001813180] BOOTMEM #19 [0001813180 - 000182b180] BOOTMEM #20 [000182b180 - 0001843180] BOOTMEM #21 [0001844000 - 0001845000] BOOTMEM #22 [00017f99c0 - 00017f9a01] BOOTMEM #23 [00017f9a40 - 00017f9a83] BOOTMEM #24 [00017f9ac0 - 00017f9d98] BOOTMEM #25 [00017f9dc0 - 00017f9e28] BOOTMEM #26 [00017f9e40 - 00017f9ea8] BOOTMEM #27 [00017f9ec0 - 00017f9f28] BOOTMEM #28 [00017f9f40 - 00017f9fa8] BOOTMEM #29 [0001843180 - 00018431e8] BOOTMEM #30 [0001843200 - 0001843268] BOOTMEM #31 [0001843280 - 00018432e8] BOOTMEM #32 [0001843300 - 0001843368] BOOTMEM #33 [0001843380 - 00018433e8] BOOTMEM #34 [0001843400 - 0001843468] BOOTMEM #35 [0001843480 - 00018434e8] BOOTMEM #36 [0001843500 - 0001843568] BOOTMEM #37 [00017f9fc0 - 00017f9fe0] BOOTMEM #38 [0001843580 - 00018435a0] BOOTMEM #39 [00018435c0 - 00018435e8] BOOTMEM #40 [0001843600 - 0001843628] BOOTMEM #41 [0001a00000 - 0001a1c000] BOOTMEM #42 [0001b00000 - 0001b1c000] BOOTMEM #43 [0001843640 - 0001843648] BOOTMEM #44 [0001843680 - 0001843688] BOOTMEM #45 [00018436c0 - 00018436c8] BOOTMEM #46 [0001843700 - 0001843710] BOOTMEM #47 [0001843740 - 0001843880] BOOTMEM #48 [0001843880 - 00018438e0] BOOTMEM #49 [0001843900 - 0001843960] BOOTMEM #50 [0001845000 - 000184d000] BOOTMEM #51 [0001b1c000 - 0001f1c000] BOOTMEM #52 [0005600000 - 0005800000] BOOTMEM #53 [0001843980 - 0001843988] BOOTMEM #54 [00018439c0 - 00018439c8] BOOTMEM #55 [0001843a00 - 0001843c40] BOOTMEM #56 [0005800000 - 0009800000] BOOTMEM #57 [000184d000 - 000186d000] BOOTMEM #58 [000186d000 - 00018ad000] BOOTMEM #59 [000001cb00 - 0000024b00] BOOTMEM Memory: 3791196k/5767168k available (3682k kernel code, 1836748k absent, 139224k reserved, 2083k data, 504k init) SLUB: Genslabs=13, HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1 Hierarchical RCU implementation. RCU-based detection of stalled CPUs is disabled. Verbose stalled-CPUs detection is disabled. NR_IRQS:2304 Extended CMOS year: 2000 spurious 8259A interrupt: IRQ7. Console: colour VGA+ 80x25 console [tty0] enabled allocated 39321600 bytes of page_cgroup please try 'cgroup_disable=memory' option if you don't want memory cgroups hpet clockevent registered Fast TSC calibration using PIT Detected 2666.240 MHz processor. Calibrating delay loop (skipped), value calculated using timer frequency.. 5334.66 BogoMIPS (lpj=8887466) pid_max: default: 32768 minimum: 301 Security Framework initialized TOMOYO Linux initialized AppArmor: AppArmor disabled by boot time parameter Mount-cache hash table entries: 256 Initializing cgroup subsys ns Initializing cgroup subsys cpuacct Initializing cgroup subsys memory Initializing cgroup subsys devices Initializing cgroup subsys freezer Initializing cgroup subsys net_cls Initializing cgroup subsys blkio CPU: Physical Processor ID: 0 CPU: Processor Core ID: 0 mce: CPU supports 6 MCE banks CPU0: Thermal monitoring handled by SMI using mwait in idle threads. Performance Events: PEBS fmt0+, Core2 events, Intel PMU driver. ... version: 2 ... bit width: 40 ... generic registers: 2 ... value mask: 000000ffffffffff ... max period: 000000007fffffff ... fixed-purpose events: 3 ... event mask: 0000000700000003 ACPI: Core revision 20100702 Setting APIC routing to flat ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1 CPU0: Intel(R) Core(TM)2 Duo CPU P9600 @ 2.66GHz stepping 0a NMI watchdog enabled, takes one hw-pmu counter. Booting Node 0, Processors #1 Ok. CPU1: Thermal monitoring handled by SMI NMI watchdog enabled, takes one hw-pmu counter. Brought up 2 CPUs Total of 2 processors activated (10668.25 BogoMIPS). devtmpfs: initialized NET: Registered protocol family 16 ACPI: bus type pci registered PCI: MMCONFIG for domain 0000 [bus 00-07] at [mem 0xe0000000-0xe07fffff] (base 0xe0000000) PCI: MMCONFIG at [mem 0xe0000000-0xe07fffff] reserved in E820 PCI: Using configuration type 1 for base access bio: create slab at 0 ACPI: EC: Look up EC in DSDT ACPI: SSDT 000000008fee10c8 00261 (v01 PmRef Cpu0Ist 00003000 INTL 20050228) ACPI: Dynamic OEM Table Load: ACPI: SSDT (null) 00261 (v01 PmRef Cpu0Ist 00003000 INTL 20050228) ACPI: SSDT 000000008fee16cc 0067D (v01 PmRef Cpu0Cst 00003001 INTL 20050228) ACPI: Dynamic OEM Table Load: ACPI: SSDT (null) 0067D (v01 PmRef Cpu0Cst 00003001 INTL 20050228) ACPI: SSDT 000000008fee0ed6 001F2 (v01 PmRef Cpu1Ist 00003000 INTL 20050228) ACPI: Dynamic OEM Table Load: ACPI: SSDT (null) 001F2 (v01 PmRef Cpu1Ist 00003000 INTL 20050228) ACPI: SSDT 000000008fee1647 00085 (v01 PmRef Cpu1Cst 00003000 INTL 20050228) ACPI: Dynamic OEM Table Load: ACPI: SSDT (null) 00085 (v01 PmRef Cpu1Cst 00003000 INTL 20050228) ACPI: Interpreter enabled ACPI: (supports S0 S3 S4 S5) ACPI: Using IOAPIC for interrupt routing ACPI: EC: GPE = 0x47, I/O: command/status = 0x66, data = 0x62 ACPI: No dock devices found. PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff]) pci_root PNP0A08:00: host bridge window [io 0x0000-0x0cf7] pci_root PNP0A08:00: host bridge window [io 0x0d00-0xffff] pci_root PNP0A08:00: host bridge window [mem 0x000a0000-0x000bffff] pci_root PNP0A08:00: host bridge window [mem 0x000c0000-0x000c3fff] pci_root PNP0A08:00: host bridge window [mem 0x000c4000-0x000c7fff] pci_root PNP0A08:00: host bridge window [mem 0x000c8000-0x000cbfff] pci_root PNP0A08:00: host bridge window [mem 0x000cc000-0x000cffff] pci_root PNP0A08:00: host bridge window [mem 0x000d0000-0x000d3fff] pci_root PNP0A08:00: host bridge window [mem 0x000d4000-0x000d7fff] pci_root PNP0A08:00: host bridge window [mem 0x000d8000-0x000dbfff] pci_root PNP0A08:00: host bridge window [mem 0x000dc000-0x000dffff] pci_root PNP0A08:00: host bridge window [mem 0x000e0000-0x000e3fff] pci_root PNP0A08:00: host bridge window [mem 0x000e4000-0x000e7fff] pci_root PNP0A08:00: host bridge window [mem 0x000e8000-0x000ebfff] pci_root PNP0A08:00: host bridge window [mem 0x000ec000-0x000effff] pci_root PNP0A08:00: host bridge window [mem 0x000f0000-0x000fffff] pci_root PNP0A08:00: host bridge window [mem 0xa0000000-0xfebfffff] pci 0000:00:03.0: reg 10: [io 0x1c00-0x1cff] pci 0000:00:03.2: reg 10: [io 0x3080-0x30bf] pci 0000:00:03.2: reg 20: [io 0x3040-0x307f] pci 0000:00:03.2: reg 24: [io 0x2000-0x203f] pci 0000:00:03.2: PME# supported from D3hot D3cold pci 0000:00:03.2: PME# disabled pci 0000:00:03.5: reg 10: [mem 0xf0600000-0xf067ffff] pci 0000:00:04.0: reg 10: [mem 0xf0886000-0xf0886fff] pci 0000:00:04.0: supports D1 D2 pci 0000:00:04.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:04.0: PME# disabled pci 0000:00:04.1: reg 10: [mem 0xf0889000-0xf08890ff] pci 0000:00:04.1: supports D1 D2 pci 0000:00:04.1: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:04.1: PME# disabled pci 0000:00:06.0: reg 10: [mem 0xf0887000-0xf0887fff] pci 0000:00:06.0: supports D1 D2 pci 0000:00:06.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:06.0: PME# disabled pci 0000:00:06.1: reg 10: [mem 0xf0889400-0xf08894ff] pci 0000:00:06.1: supports D1 D2 pci 0000:00:06.1: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:06.1: PME# disabled pci 0000:00:08.0: reg 10: [mem 0xf0880000-0xf0883fff] pci 0000:00:08.0: PME# supported from D3hot D3cold pci 0000:00:08.0: PME# disabled pci 0000:00:0a.0: reg 10: [mem 0xf0888000-0xf0888fff] pci 0000:00:0a.0: reg 14: [io 0x30d0-0x30d7] pci 0000:00:0a.0: reg 18: [mem 0xf0889c00-0xf0889cff] pci 0000:00:0a.0: reg 1c: [mem 0xf0889800-0xf088980f] pci 0000:00:0a.0: supports D1 D2 pci 0000:00:0a.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0a.0: PME# disabled pci 0000:00:0b.0: reg 10: [io 0x30e8-0x30ef] pci 0000:00:0b.0: reg 14: [io 0x30dc-0x30df] pci 0000:00:0b.0: reg 18: [io 0x30e0-0x30e7] pci 0000:00:0b.0: reg 1c: [io 0x30d8-0x30db] pci 0000:00:0b.0: reg 20: [io 0x30c0-0x30cf] pci 0000:00:0b.0: reg 24: [mem 0xf0884000-0xf0885fff] pci 0000:00:0c.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:0c.0: PME# disabled pci 0000:00:10.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:10.0: PME# disabled pci 0000:00:15.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:15.0: PME# disabled pci 0000:00:16.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:16.0: PME# disabled pci 0000:00:17.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:17.0: PME# disabled pci 0000:00:18.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:00:18.0: PME# disabled pci 0000:01:07.0: proprietary Ricoh MMC controller disabled (via firewire function) pci 0000:01:07.0: MMC cards are now supported by standard SDHCI controller pci 0000:01:07.0: reg 10: [mem 0xf0500000-0xf05007ff] pci 0000:01:07.0: supports D1 D2 pci 0000:01:07.0: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:01:07.0: PME# disabled pci 0000:01:07.1: reg 10: [mem 0xf0500800-0xf05008ff] pci 0000:01:07.1: supports D1 D2 pci 0000:01:07.1: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:01:07.1: PME# disabled pci 0000:01:07.2: reg 10: [mem 0xf0501000-0xf05010ff] pci 0000:01:07.2: supports D1 D2 pci 0000:01:07.2: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:01:07.2: PME# disabled pci 0000:01:07.3: reg 10: [mem 0xf0501400-0xf05014ff] pci 0000:01:07.3: supports D1 D2 pci 0000:01:07.3: PME# supported from D0 D1 D2 D3hot D3cold pci 0000:01:07.3: PME# disabled pci 0000:00:09.0: PCI bridge to [bus 01-01] (subtractive decode) pci 0000:00:09.0: bridge window [io 0xf000-0x0000] (disabled) pci 0000:00:09.0: bridge window [mem 0xf0500000-0xf05fffff] pci 0000:00:09.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled) pci 0000:00:09.0: bridge window [io 0x0000-0x0cf7] (subtractive decode) pci 0000:00:09.0: bridge window [io 0x0d00-0xffff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000a0000-0x000bffff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000c0000-0x000c3fff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000c4000-0x000c7fff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000c8000-0x000cbfff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000cc000-0x000cffff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000d0000-0x000d3fff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000d4000-0x000d7fff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000d8000-0x000dbfff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000dc000-0x000dffff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000e0000-0x000e3fff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000e4000-0x000e7fff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000e8000-0x000ebfff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000ec000-0x000effff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0x000f0000-0x000fffff] (subtractive decode) pci 0000:00:09.0: bridge window [mem 0xa0000000-0xfebfffff] (subtractive decode) pci 0000:02:00.0: reg 10: [mem 0xae000000-0xaeffffff] pci 0000:02:00.0: reg 14: [mem 0xd0000000-0xdfffffff 64bit pref] pci 0000:02:00.0: reg 1c: [mem 0xac000000-0xadffffff 64bit] pci 0000:02:00.0: reg 24: [io 0x4000-0x407f] pci 0000:02:00.0: reg 30: [mem 0x00000000-0x0001ffff pref] pci 0000:00:0c.0: PCI bridge to [bus 02-02] pci 0000:00:0c.0: bridge window [io 0x4000-0x4fff] pci 0000:00:0c.0: bridge window [mem 0xac000000-0xaeffffff] pci 0000:00:0c.0: bridge window [mem 0xd0000000-0xdfffffff 64bit pref] pci 0000:03:00.0: reg 10: [mem 0xaa000000-0xaaffffff] pci 0000:03:00.0: reg 14: [mem 0xb0000000-0xbfffffff 64bit pref] pci 0000:03:00.0: reg 1c: [mem 0xcc000000-0xcdffffff 64bit pref] pci 0000:03:00.0: reg 24: [io 0x5000-0x507f] pci 0000:03:00.0: reg 30: [mem 0x00000000-0x0001ffff pref] pci 0000:00:10.0: PCI bridge to [bus 03-03] pci 0000:00:10.0: bridge window [io 0x5000-0x5fff] pci 0000:00:10.0: bridge window [mem 0xaa000000-0xaaffffff] pci 0000:00:10.0: bridge window [mem 0xb0000000-0xcdffffff 64bit pref] pci 0000:00:15.0: PCI bridge to [bus 04-05] pci 0000:00:15.0: bridge window [io 0x6000-0x6fff] pci 0000:00:15.0: bridge window [mem 0xf0200000-0xf03fffff] pci 0000:00:15.0: bridge window [mem 0xf0000000-0xf01fffff 64bit pref] pci 0000:06:00.0: reg 10: [mem 0xf0400000-0xf040ffff 64bit] pci 0000:06:00.0: supports D1 pci 0000:06:00.0: PME# supported from D0 D1 D3hot pci 0000:06:00.0: PME# disabled pci 0000:06:00.0: disabling ASPM on pre-1.1 PCIe device. You can enable it with 'pcie_aspm=force' pci 0000:00:16.0: PCI bridge to [bus 06-06] pci 0000:00:16.0: bridge window [io 0xf000-0x0000] (disabled) pci 0000:00:16.0: bridge window [mem 0xf0400000-0xf04fffff] pci 0000:00:16.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled) pci 0000:00:17.0: PCI bridge to [bus 07-07] pci 0000:00:17.0: bridge window [io 0xf000-0x0000] (disabled) pci 0000:00:17.0: bridge window [mem 0xfff00000-0x000fffff] (disabled) pci 0000:00:17.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled) pci 0000:00:18.0: PCI bridge to [bus 08-08] pci 0000:00:18.0: bridge window [io 0xf000-0x0000] (disabled) pci 0000:00:18.0: bridge window [mem 0xfff00000-0x000fffff] (disabled) pci 0000:00:18.0: bridge window [mem 0xfff00000-0x000fffff pref] (disabled) pci_bus 0000:00: on NUMA node 0 ACPI: PCI Interrupt Routing Table [\_SB_.PCI0._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.IXVE._PRT] ACPI: PCI Interrupt Routing Table [\_SB_.PCI0.P2P0._PRT] ACPI: PCI Interrupt Link [LNK1] (IRQs 5 7 *10 11 14 15) ACPI: PCI Interrupt Link [LNK2] (IRQs 5 7 10 *11 14 15) ACPI: PCI Interrupt Link [LNK3] (IRQs 5 7 10 11 14 15) *0, disabled. ACPI: PCI Interrupt Link [LNK4] (IRQs 5 7 10 11 14 15) *0, disabled. ACPI: PCI Interrupt Link [Z00Q] (IRQs 18 19 20 21 22 23) *11 ACPI: PCI Interrupt Link [Z00R] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z00S] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z00T] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z00U] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z00V] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z00W] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z00X] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z00Y] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z00Z] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z010] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z011] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z012] (IRQs 18 19 20 21 22 23) *10 ACPI: PCI Interrupt Link [Z013] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z014] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z015] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z016] (IRQs 18 19 20 21 22 23) *11 ACPI: PCI Interrupt Link [Z017] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z018] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z019] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z01A] (IRQs 18 19 20 21 22 23) *10 ACPI: PCI Interrupt Link [Z01B] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z01C] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z01D] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z01E] (IRQs 18 19 20 21 22 23) *11 ACPI: PCI Interrupt Link [Z01F] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z01G] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z01H] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [LSMB] (IRQs 18 19 20 21 22 23) *10 ACPI: PCI Interrupt Link [LUS0] (IRQs 18 19 20 21 22 23) *7 ACPI: PCI Interrupt Link [LUS2] (IRQs 18 19 20 21 22 23) *11 ACPI: PCI Interrupt Link [LMAC] (IRQs 18 19 20 21 22 23) *10 ACPI: PCI Interrupt Link [LAZA] (IRQs 17) *11 ACPI: PCI Interrupt Link [LGPU] (IRQs 18 19 20 21 22 23) *5 ACPI: PCI Interrupt Link [LPID] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [LSI0] (IRQs 18 19 20 21 22 23) *11 ACPI: PCI Interrupt Link [LSI1] (IRQs 18 19 20 21 22 23) *0, disabled. ACPI: PCI Interrupt Link [Z00O] (IRQs 18 19 20 21 22 23) *5 ACPI: PCI Interrupt Link [Z00P] (IRQs 18 19 20 21 22 23) *10 ACPI: PCI Interrupt Link [LPMU] (IRQs 18 19 20 21 22 23) *10 HEST: Table is not found! vgaarb: device added: PCI:0000:02:00.0,decodes=io+mem,owns=none,locks=none vgaarb: device added: PCI:0000:03:00.0,decodes=io+mem,owns=io+mem,locks=none vgaarb: loaded PCI: Using ACPI for IRQ routing PCI: pci_cache_line_size set to 64 bytes reserve RAM buffer: 000000000009dc00 - 000000000009ffff reserve RAM buffer: 000000008fec0000 - 000000008fffffff NetLabel: Initializing NetLabel: domain hash size = 128 NetLabel: protocols = UNLABELED CIPSOv4 NetLabel: unlabeled traffic allowed by default HPET: 4 timers in total, 0 timers will be used for per-cpu timer hpet0: at MMIO 0xfed00000, IRQs 2, 8, 31, 31 hpet0: 4 comparators, 64-bit 25.000000 MHz counter Switching to clocksource tsc pnp: PnP ACPI init ACPI: bus type pnp registered pnp 00:03: disabling [mem 0xf0600000-0xf0607fff] because it overlaps 0000:00:03.5 BAR 0 [mem 0xf0600000-0xf067ffff] pnp: PnP ACPI: found 13 devices ACPI: ACPI bus type pnp unregistered system 00:00: [mem 0xffc00000-0xffffffff] could not be reserved system 00:00: [mem 0xfec00000-0xfec00fff] could not be reserved system 00:00: [mem 0xfee00000-0xfeefffff] could not be reserved system 00:00: [mem 0xfed00000-0xfed00fff] has been reserved system 00:04: [io 0x1000-0x107f] has been reserved system 00:04: [io 0x1080-0x10ff] has been reserved system 00:04: [io 0x1400-0x147f] has been reserved system 00:04: [io 0x1480-0x14ff] has been reserved system 00:04: [io 0x1800-0x187f] has been reserved system 00:04: [io 0x1880-0x18ff] has been reserved system 00:07: [io 0x04d0-0x04d1] has been reserved system 00:07: [io 0x0910-0x0911] has been reserved system 00:07: [io 0x0295-0x0296] has been reserved pci 0000:00:09.0: PCI bridge to [bus 01-01] pci 0000:00:09.0: bridge window [io disabled] pci 0000:00:09.0: bridge window [mem 0xf0500000-0xf05fffff] pci 0000:00:09.0: bridge window [mem pref disabled] pci 0000:02:00.0: BAR 6: can't assign mem pref (size 0x20000) pci 0000:00:0c.0: PCI bridge to [bus 02-02] pci 0000:00:0c.0: bridge window [io 0x4000-0x4fff] pci 0000:00:0c.0: bridge window [mem 0xac000000-0xaeffffff] pci 0000:00:0c.0: bridge window [mem 0xd0000000-0xdfffffff 64bit pref] pci 0000:03:00.0: BAR 6: assigned [mem 0xc0000000-0xc001ffff pref] pci 0000:00:10.0: PCI bridge to [bus 03-03] pci 0000:00:10.0: bridge window [io 0x5000-0x5fff] pci 0000:00:10.0: bridge window [mem 0xaa000000-0xaaffffff] pci 0000:00:10.0: bridge window [mem 0xb0000000-0xcdffffff 64bit pref] pci 0000:00:15.0: PCI bridge to [bus 04-05] pci 0000:00:15.0: bridge window [io 0x6000-0x6fff] pci 0000:00:15.0: bridge window [mem 0xf0200000-0xf03fffff] pci 0000:00:15.0: bridge window [mem 0xf0000000-0xf01fffff 64bit pref] pci 0000:00:16.0: PCI bridge to [bus 06-06] pci 0000:00:16.0: bridge window [io disabled] pci 0000:00:16.0: bridge window [mem 0xf0400000-0xf04fffff] pci 0000:00:16.0: bridge window [mem pref disabled] pci 0000:00:17.0: PCI bridge to [bus 07-07] pci 0000:00:17.0: bridge window [io disabled] pci 0000:00:17.0: bridge window [mem disabled] pci 0000:00:17.0: bridge window [mem pref disabled] pci 0000:00:18.0: PCI bridge to [bus 08-08] pci 0000:00:18.0: bridge window [io disabled] pci 0000:00:18.0: bridge window [mem disabled] pci 0000:00:18.0: bridge window [mem pref disabled] pci 0000:00:09.0: setting latency timer to 64 ACPI: PCI Interrupt Link [Z00Q] enabled at IRQ 23 pci 0000:00:0c.0: PCI INT A -> Link[Z00Q] -> GSI 23 (level, low) -> IRQ 23 pci 0000:00:0c.0: setting latency timer to 64 pci 0000:00:10.0: setting latency timer to 64 ACPI: PCI Interrupt Link [Z012] enabled at IRQ 22 pci 0000:00:15.0: PCI INT A -> Link[Z012] -> GSI 22 (level, low) -> IRQ 22 pci 0000:00:15.0: setting latency timer to 64 ACPI: PCI Interrupt Link [Z016] enabled at IRQ 21 pci 0000:00:16.0: PCI INT A -> Link[Z016] -> GSI 21 (level, low) -> IRQ 21 pci 0000:00:16.0: setting latency timer to 64 ACPI: PCI Interrupt Link [Z01A] enabled at IRQ 20 pci 0000:00:17.0: PCI INT A -> Link[Z01A] -> GSI 20 (level, low) -> IRQ 20 pci 0000:00:17.0: setting latency timer to 64 ACPI: PCI Interrupt Link [Z01E] enabled at IRQ 19 pci 0000:00:18.0: PCI INT A -> Link[Z01E] -> GSI 19 (level, low) -> IRQ 19 pci 0000:00:18.0: setting latency timer to 64 pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7] pci_bus 0000:00: resource 5 [io 0x0d00-0xffff] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff] pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff] pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff] pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff] pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff] pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff] pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff] pci_bus 0000:00: resource 15 [mem 0x000e0000-0x000e3fff] pci_bus 0000:00: resource 16 [mem 0x000e4000-0x000e7fff] pci_bus 0000:00: resource 17 [mem 0x000e8000-0x000ebfff] pci_bus 0000:00: resource 18 [mem 0x000ec000-0x000effff] pci_bus 0000:00: resource 19 [mem 0x000f0000-0x000fffff] pci_bus 0000:00: resource 20 [mem 0xa0000000-0xfebfffff] pci_bus 0000:01: resource 1 [mem 0xf0500000-0xf05fffff] pci_bus 0000:01: resource 4 [io 0x0000-0x0cf7] pci_bus 0000:01: resource 5 [io 0x0d00-0xffff] pci_bus 0000:01: resource 6 [mem 0x000a0000-0x000bffff] pci_bus 0000:01: resource 7 [mem 0x000c0000-0x000c3fff] pci_bus 0000:01: resource 8 [mem 0x000c4000-0x000c7fff] pci_bus 0000:01: resource 9 [mem 0x000c8000-0x000cbfff] pci_bus 0000:01: resource 10 [mem 0x000cc000-0x000cffff] pci_bus 0000:01: resource 11 [mem 0x000d0000-0x000d3fff] pci_bus 0000:01: resource 12 [mem 0x000d4000-0x000d7fff] pci_bus 0000:01: resource 13 [mem 0x000d8000-0x000dbfff] pci_bus 0000:01: resource 14 [mem 0x000dc000-0x000dffff] pci_bus 0000:01: resource 15 [mem 0x000e0000-0x000e3fff] pci_bus 0000:01: resource 16 [mem 0x000e4000-0x000e7fff] pci_bus 0000:01: resource 17 [mem 0x000e8000-0x000ebfff] pci_bus 0000:01: resource 18 [mem 0x000ec000-0x000effff] pci_bus 0000:01: resource 19 [mem 0x000f0000-0x000fffff] pci_bus 0000:01: resource 20 [mem 0xa0000000-0xfebfffff] pci_bus 0000:02: resource 0 [io 0x4000-0x4fff] pci_bus 0000:02: resource 1 [mem 0xac000000-0xaeffffff] pci_bus 0000:02: resource 2 [mem 0xd0000000-0xdfffffff 64bit pref] pci_bus 0000:03: resource 0 [io 0x5000-0x5fff] pci_bus 0000:03: resource 1 [mem 0xaa000000-0xaaffffff] pci_bus 0000:03: resource 2 [mem 0xb0000000-0xcdffffff 64bit pref] pci_bus 0000:04: resource 0 [io 0x6000-0x6fff] pci_bus 0000:04: resource 1 [mem 0xf0200000-0xf03fffff] pci_bus 0000:04: resource 2 [mem 0xf0000000-0xf01fffff 64bit pref] pci_bus 0000:06: resource 1 [mem 0xf0400000-0xf04fffff] NET: Registered protocol family 2 IP route cache hash table entries: 131072 (order: 8, 1048576 bytes) TCP established hash table entries: 262144 (order: 10, 4194304 bytes) TCP bind hash table entries: 65536 (order: 8, 1048576 bytes) TCP: Hash tables configured (established 262144 bind 65536) TCP reno registered UDP hash table entries: 2048 (order: 4, 65536 bytes) UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes) NET: Registered protocol family 1 pci 0000:03:00.0: Boot video device PCI: CLS 64 bytes, default 64 Unpacking initramfs... Freeing initrd memory: 3048k freed PCI-DMA: Using software bounce buffering for IO (SWIOTLB) Placing 64MB software IO TLB between ffff880005800000 - ffff880009800000 software IO TLB at phys 0x5800000 - 0x9800000 Simple Boot Flag at 0x36 set to 0x1 Scanning for low memory corruption every 60 seconds audit: initializing netlink socket (disabled) type=2000 audit(1288821681.376:1): initialized HugeTLB registered 2 MB page size, pre-allocated 0 pages VFS: Disk quotas dquot_6.5.2 Dquot-cache hash table entries: 512 (order 0, 4096 bytes) msgmni has been set to 7410 Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253) io scheduler noop registered io scheduler deadline registered io scheduler cfq registered (default) intel_idle: MWAIT substates: 0x3122220 intel_idle: does not run on family 6 model 23 ERST: Table is not found! Linux agpgart interface v0.103 Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled PNP: PS/2 Controller [PNP0303:KBC0,PNP0f13:MSE0] at 0x60,0x64 irq 1,12 serio: i8042 KBD port at 0x60,0x64 irq 1 serio: i8042 AUX port at 0x60,0x64 irq 12 mice: PS/2 mouse device common for all mice rtc_cmos 00:0a: RTC can wake from S4 rtc_cmos 00:0a: rtc core: registered rtc_cmos as rtc0 rtc0: alarms up to one year, y3k, 114 bytes nvram, hpet irqs cpuidle: using governor ladder cpuidle: using governor menu TCP cubic registered NET: Registered protocol family 17 Registering the dns_resolver key type PM: Resume from disk failed. registered taskstats version 1 rtc_cmos 00:0a: setting system clock to 2010-11-03 22:01:22 UTC (1288821682) Initalizing network drop monitor service Freeing unused kernel memory: 504k freed input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input0 udev[38]: starting version 163 SCSI subsystem initialized libata version 3.00 loaded. ahci 0000:00:0b.0: version 3.0 ACPI: PCI Interrupt Link [LSI0] enabled at IRQ 18 ahci 0000:00:0b.0: PCI INT A -> Link[LSI0] -> GSI 18 (level, low) -> IRQ 18 ahci 0000:00:0b.0: irq 40 for MSI/MSI-X ahci 0000:00:0b.0: controller can't do PMP, turning off CAP_PMP ahci 0000:00:0b.0: AHCI 0001.0200 32 slots 6 ports 3 Gbps 0x3f impl SATA mode ahci 0000:00:0b.0: flags: 64bit ncq sntf led pio slum part sxs boh ahci 0000:00:0b.0: setting latency timer to 64 scsi0 : ahci scsi1 : ahci scsi2 : ahci scsi3 : ahci scsi4 : ahci scsi5 : ahci ata1: SATA max UDMA/133 abar m8192@0xf0884000 port 0xf0884100 irq 40 ata2: SATA max UDMA/133 abar m8192@0xf0884000 port 0xf0884180 irq 40 ata3: SATA max UDMA/133 abar m8192@0xf0884000 port 0xf0884200 irq 40 ata4: SATA max UDMA/133 abar m8192@0xf0884000 port 0xf0884280 irq 40 ata5: SATA max UDMA/133 abar m8192@0xf0884000 port 0xf0884300 irq 40 ata6: SATA max UDMA/133 abar m8192@0xf0884000 port 0xf0884380 irq 40 ata3: SATA link down (SStatus 0 SControl 300) ata6: SATA link down (SStatus 0 SControl 300) ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300) ata4: SATA link down (SStatus 0 SControl 300) ata2: SATA link up 1.5 Gbps (SStatus 113 SControl 300) ata5: SATA link down (SStatus 0 SControl 300) ata2.00: ATAPI: TSSTcorp DVD+/-RW TS-D633A, D300, max UDMA/100 ata2.00: applying bridge limits ata2.00: configured for UDMA/100 ata1.00: ATA-8: ST9500420ASG, 0002SDM1, max UDMA/133 ata1.00: 976773168 sectors, multi 16: LBA48 NCQ (depth 31/32) ata1.00: configured for UDMA/133 scsi 0:0:0:0: Direct-Access ATA ST9500420ASG 0002 PQ: 0 ANSI: 5 scsi 1:0:0:0: CD-ROM TSSTcorp DVD+-RW TS-D633A D300 PQ: 0 ANSI: 5 sd 0:0:0:0: [sda] 976773168 512-byte logical blocks: (500 GB/465 GiB) sd 0:0:0:0: [sda] Write Protect is off sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00 sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA sda: sda1 sda2 sda3 sd 0:0:0:0: [sda] Attached SCSI disk sr0: scsi3-mmc drive: 24x/24x writer dvd-ram cd/rw xa/form2 cdda tray cdrom: Uniform CD-ROM driver Revision: 3.20 sr 1:0:0:0: Attached scsi CD-ROM sr0 device-mapper: uevent: version 1.0.3 device-mapper: ioctl: 4.18.0-ioctl (2010-06-29) initialised: dm-devel@redhat.com EXT4-fs (dm-1): mounted filesystem with ordered data mode. Opts: (null) Not activating Mandatory Access Control now since /sbin/tomoyo-init doesn't exist. udev[917]: starting version 163 input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1 ACPI: Power Button [PWRB] input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:27/PNP0C0E:00/input/input2 ACPI: Sleep Button [SLPB] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input3 ACPI: Lid Switch [LID] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input4 ACPI: Power Button [PWRF] forcedeth: Reverse Engineered nForce ethernet driver. Version 0.64. ACPI: PCI Interrupt Link [LMAC] enabled at IRQ 23 forcedeth 0000:00:0a.0: PCI INT A -> Link[LMAC] -> GSI 23 (level, low) -> IRQ 23 forcedeth 0000:00:0a.0: setting latency timer to 64 sd 0:0:0:0: Attached scsi generic sg0 type 0 sr 1:0:0:0: Attached scsi generic sg1 type 5 dcdbas dcdbas: Dell Systems Management Base Driver (version 5.6.0-3.2) pci_hotplug: PCI Hot Plug PCI Core version: 0.5 usbcore: registered new interface driver usbfs usbcore: registered new interface driver hub usbcore: registered new device driver usb ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver [Firmware Bug]: ACPI(IGPU) defines _DOD but not _DOS input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:08/LNXVIDEO:00/input/input5 ACPI: Video Device [IGPU] (multi-head: yes rom: no post: no) [Firmware Bug]: ACPI(Z01I) defines _DOD but not _DOS input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:0f/LNXVIDEO:01/input/input6 ACPI: Video Device [Z01I] (multi-head: yes rom: yes post: no) forcedeth 0000:00:0a.0: ifname eth0, PHY OUI 0x50ef @ 0, addr 00:22:19:f1:37:3a forcedeth 0000:00:0a.0: highdma csum pwrctl gbit lnktim msi desc-v3 ACPI: PCI Interrupt Link [LUS2] enabled at IRQ 22 ehci_hcd 0000:00:04.1: PCI INT B -> Link[LUS2] -> GSI 22 (level, low) -> IRQ 22 ehci_hcd 0000:00:04.1: setting latency timer to 64 ehci_hcd 0000:00:04.1: EHCI Host Controller ehci_hcd 0000:00:04.1: new USB bus registered, assigned bus number 1 ehci_hcd 0000:00:04.1: debug port 1 ehci_hcd 0000:00:04.1: cache line size of 64 is not supported ehci_hcd 0000:00:04.1: irq 22, io mem 0xf0889000 shpchp: Standard Hot Plug PCI Controller Driver version: 0.4 Synaptics Touchpad, model: 1, fw: 7.2, id: 0x1c0b1, caps: 0xd04731/0xa40000/0xa0000 ehci_hcd 0000:00:04.1: USB 2.0 started, EHCI 1.00 hub 1-0:1.0: USB hub found hub 1-0:1.0: 4 ports detected ACPI: PCI Interrupt Link [Z00P] enabled at IRQ 21 ehci_hcd 0000:00:06.1: PCI INT B -> Link[Z00P] -> GSI 21 (level, low) -> IRQ 21 ehci_hcd 0000:00:06.1: setting latency timer to 64 ehci_hcd 0000:00:06.1: EHCI Host Controller ehci_hcd 0000:00:06.1: new USB bus registered, assigned bus number 2 ehci_hcd 0000:00:06.1: debug port 1 ehci_hcd 0000:00:06.1: cache line size of 64 is not supported ehci_hcd 0000:00:06.1: irq 21, io mem 0xf0889400 ehci_hcd 0000:00:06.1: USB 2.0 started, EHCI 1.00 hub 2-0:1.0: USB hub found hub 2-0:1.0: 3 ports detected ACPI: PCI Interrupt Link [LUS0] enabled at IRQ 20 ohci_hcd 0000:00:04.0: PCI INT A -> Link[LUS0] -> GSI 20 (level, low) -> IRQ 20 ohci_hcd 0000:00:04.0: setting latency timer to 64 ohci_hcd 0000:00:04.0: OHCI Host Controller ohci_hcd 0000:00:04.0: new USB bus registered, assigned bus number 3 ohci_hcd 0000:00:04.0: irq 20, io mem 0xf0886000 input: SynPS/2 Synaptics TouchPad as /devices/platform/i8042/serio1/input/input7 hub 3-0:1.0: USB hub found hub 3-0:1.0: 4 ports detected ACPI: PCI Interrupt Link [Z00O] enabled at IRQ 19 ohci_hcd 0000:00:06.0: PCI INT A -> Link[Z00O] -> GSI 19 (level, low) -> IRQ 19 ohci_hcd 0000:00:06.0: setting latency timer to 64 ohci_hcd 0000:00:06.0: OHCI Host Controller ohci_hcd 0000:00:06.0: new USB bus registered, assigned bus number 4 ohci_hcd 0000:00:06.0: irq 19, io mem 0xf0887000 hub 4-0:1.0: USB hub found hub 4-0:1.0: 3 ports detected i2c i2c-0: nForce2 SMBus adapter at 0x3040 i2c i2c-1: nForce2 SMBus adapter at 0x2000 thermal LNXTHERM:01: registered as thermal_zone0 ACPI: Thermal Zone [THRM] (34 C) ACPI: acpi_idle registered with cpuidle Monitor-Mwait will be used to enter C-1 state Monitor-Mwait will be used to enter C-2 state Monitor-Mwait will be used to enter C-3 state Marking TSC unstable due to TSC halts in idle Switching to clocksource hpet usb 2-3: new high speed USB device using ehci_hcd and address 2 [drm] Initialized drm 1.1.0 20060810 sdhci: Secure Digital Host Controller Interface driver sdhci: Copyright(c) Pierre Ossman sdhci-pci 0000:01:07.1: SDHCI controller found [1180:0822] (rev 22) ACPI: PCI Interrupt Link [LNK2] enabled at IRQ 11 sdhci-pci 0000:01:07.1: PCI INT B -> Link[LNK2] -> GSI 11 (level, low) -> IRQ 11 sdhci-pci 0000:01:07.1: Will use DMA mode even though HW doesn't fully claim to support it. Registered led device: mmc0:: mmc0: SDHCI controller on PCI [0000:01:07.1] using DMA ACPI: PCI Interrupt Link [LNK1] enabled at IRQ 11 firewire_ohci 0000:01:07.0: PCI INT A -> Link[LNK1] -> GSI 11 (level, low) -> IRQ 11 ACPI: WMI: Skipping duplicate GUID 05901221-D566-11D1-B2F0-00A0C9062910 ACPI: WMI: Skipping duplicate GUID 05901221-D566-11D1-B2F0-00A0C9062910 ACPI: WMI: Mapper loaded firewire_ohci: Added fw-ohci device 0000:01:07.0, OHCI v1.10, 4 IR + 4 IT contexts, quirks 0x1 HDA Intel 0000:00:08.0: power state changed by ACPI to D0 HDA Intel 0000:00:08.0: power state changed by ACPI to D0 ACPI: PCI Interrupt Link [LAZA] enabled at IRQ 17 HDA Intel 0000:00:08.0: PCI INT A -> Link[LAZA] -> GSI 17 (level, low) -> IRQ 17 hda_intel: Disable MSI for Nvidia chipset HDA Intel 0000:00:08.0: setting latency timer to 64 ACPI: AC Adapter [ADP0] (off-line) usb 3-4: new full speed USB device using ohci_hcd and address 2 input: Dell WMI hotkeys as /devices/virtual/input/input8 ACPI: EC: GPE storm detected, transactions will use polling mode hub 3-4:1.0: USB hub found hub 3-4:1.0: 3 ports detected firewire_core: created device fw0: GUID 434fc00015265e01, S400 VGA switcheroo: detected DSM switching method \_SB_.PCI0.IXVE.IGPU handle nouveau 0000:02:00.0: enabling device (0004 -> 0007) nouveau 0000:02:00.0: PCI INT A -> Link[Z00Q] -> GSI 23 (level, low) -> IRQ 23 nouveau 0000:02:00.0: setting latency timer to 64 [drm] nouveau 0000:02:00.0: nouveau_load:800 - vendor: 0x10DE device: 0x6E8 class: 0x30000 [drm] nouveau 0000:02:00.0: nouveau_load:823 - regs mapped ok at 0xae000000 [drm] nouveau 0000:02:00.0: Detected an NV50 generation card (0x298400a2) [drm] nouveau 0000:02:00.0: Attempting to load BIOS image from PRAMIN [drm] nouveau 0000:02:00.0: ... BIOS signature not found [drm] nouveau 0000:02:00.0: Attempting to load BIOS image from PROM [drm] nouveau 0000:02:00.0: ... BIOS signature not found [drm] nouveau 0000:02:00.0: Attempting to load BIOS image from PCIROM [drm] nouveau 0000:02:00.0: ... BIOS signature not found [drm] nouveau 0000:02:00.0: Attempting to load BIOS image from ACPI ACPI: Battery Slot [BAT0] (battery present) usb 3-4.1: new full speed USB device using ohci_hcd and address 3 cfg80211: Calling CRDA to update world regulatory domain usb 3-4.2: new full speed USB device using ohci_hcd and address 4 ath9k 0000:06:00.0: PCI INT A -> Link[Z016] -> GSI 21 (level, low) -> IRQ 21 ath9k 0000:06:00.0: setting latency timer to 64 cfg80211: World regulatory domain updated: (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp) (2402000 KHz - 2472000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) (2457000 KHz - 2482000 KHz @ 20000 KHz), (300 mBi, 2000 mBm) (2474000 KHz - 2494000 KHz @ 20000 KHz), (300 mBi, 2000 mBm) (5170000 KHz - 5250000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) (5735000 KHz - 5835000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) usbcore: registered new interface driver hiddev input: HID 413c:8157 as /devices/pci0000:00/0000:00:04.0/usb3/3-4/3-4.1/3-4.1:1.0/input/input9 generic-usb 0003:413C:8157.0001: input,hidraw0: USB HID v1.11 Keyboard [HID 413c:8157] on usb-0000:00:04.0-4.1/input0 input: HID 413c:8158 as /devices/pci0000:00/0000:00:04.0/usb3/3-4/3-4.2/3-4.2:1.0/input/input10 generic-usb 0003:413C:8158.0002: input,hidraw1: USB HID v1.11 Mouse [HID 413c:8158] on usb-0000:00:04.0-4.2/input0 usbcore: registered new interface driver usbhid usbhid: USB HID core driver ath: EEPROM regdomain: 0x60 ath: EEPROM indicates we should expect a direct regpair map ath: Country alpha2 being used: 00 ath: Regpair used: 0x60 usb 3-4.3: new full speed USB device using ohci_hcd and address 5 phy0: Selected rate control algorithm 'ath9k_rate_control' Registered led device: ath9k-phy0::radio Registered led device: ath9k-phy0::assoc Registered led device: ath9k-phy0::tx Registered led device: ath9k-phy0::rx phy0: Atheros AR9280 Rev:2 mem=0xffffc900008c0000, irq=21 Bluetooth: Core ver 2.15 NET: Registered protocol family 31 Bluetooth: HCI device and connection manager initialized Bluetooth: HCI socket layer initialized Bluetooth: Generic Bluetooth USB driver ver 0.6 usbcore: registered new interface driver btusb hda-intel: azx_get_response timeout, switching to polling mode: last cmd=0x100f0000 [drm] nouveau 0000:02:00.0: ... appears to be valid [drm] nouveau 0000:02:00.0: BIT BIOS found [drm] nouveau 0000:02:00.0: Bios version 62.98.4d.00 [drm] nouveau 0000:02:00.0: TMDS table version 2.0 [drm] nouveau 0000:02:00.0: Found Display Configuration Block version 4.0 [drm] nouveau 0000:02:00.0: Raw DCB entry 0: 02013300 00000028 [drm] nouveau 0000:02:00.0: Raw DCB entry 1: 0000000e 00000000 [drm] nouveau 0000:02:00.0: DCB connector table: VHER 0x40 5 16 4 [drm] nouveau 0000:02:00.0: 0: 0x00000340: type 0x40 idx 0 tag 0xff [drm] nouveau 0000:02:00.0: 1: 0x00001030: type 0x30 idx 1 tag 0x07 [drm] nouveau 0000:02:00.0: 2: 0x0000a546: type 0x46 idx 2 tag 0x08 [drm] nouveau 0000:02:00.0: 3: 0x00000400: type 0x00 idx 3 tag 0xff [drm] nouveau 0000:02:00.0: 4: 0x00050146: type 0x46 idx 4 tag 0x51 [drm] nouveau 0000:02:00.0: 5: 0x00000210: type 0x10 idx 5 tag 0xff [drm] nouveau 0000:02:00.0: 6: 0x00000211: type 0x11 idx 6 tag 0xff [drm] nouveau 0000:02:00.0: 7: 0x00000213: type 0x13 idx 7 tag 0xff [drm] nouveau 0000:02:00.0: Adaptor not initialised, running VBIOS init tables. [drm] nouveau 0000:02:00.0: Parsing VBIOS init table 0 at offset 0xD979 [drm] nouveau 0000:02:00.0: 0xD979: ------ Executing following commands ------ [drm] nouveau 0000:02:00.0: 0xD979: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000200, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xD982: [ (0x33) - INIT_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD982: Repeating following segment 20 times [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD984: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD984: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xD991: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xD992: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:02:00.0: 0xD992: Condition: 0x07 [drm] nouveau 0000:02:00.0: 0xD992: Cond: 0x07, Reg: 0x0000C040, Mask: 0x00000300 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000C040, Data: 0x3E801008 [drm] nouveau 0000:02:00.0: 0xD992: Checking if 0x00000000 equals 0x00000000 [drm] nouveau 0000:02:00.0: 0xD992: Condition fulfilled -- continuing to execute [drm] nouveau 0000:02:00.0: 0xD994: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00001540, Data: 0xF1010001 [drm] nouveau 0000:02:00.0: 0xD99D: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xD99E: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000200, Data: 0xC0110111 [drm] nouveau 0000:02:00.0: 0xD9A7: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:02:00.0: 0xD9A7: Executing subroutine at 0xE47A [drm] nouveau 0000:02:00.0: 0xE47A: [ (0x58) - INIT_ZM_REG_SEQUENCE ] [drm] nouveau 0000:02:00.0: 0xE47A: BaseReg: 0x001009C0, Count: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009C0, Data: 0x04040004 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009C4, Data: 0x00000404 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009C8, Data: 0x04040004 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009CC, Data: 0x00000404 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009D0, Data: 0x00000404 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009D4, Data: 0x04000004 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009D8, Data: 0x04000004 [drm] nouveau 0000:02:00.0: 0xE49C: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x0F44A01C [drm] nouveau 0000:02:00.0: 0xE49C: Reg: 0x001009DC, RegIncrement: 0x04, Count: 0x05, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009DC, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009E0, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009E4, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009E8, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009EC, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE543: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: 0xD9A7: End of 0xE47A subroutine [drm] nouveau 0000:02:00.0: 0xD9AA: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD9AA: Reg: 0x001008C0, Mask: 0xFF000000, Data: 0x08000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x001008C0, Data: 0x83303A98 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001008C0, Data: 0x8B000000 [drm] nouveau 0000:02:00.0: 0xD9B7: [ (0x69) - INIT_IO ] [drm] nouveau 0000:02:00.0: 0xD9B7: Port: 0x03C3, Mask: 0x00, Data: 0x01 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00614100, Data: 0x10000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614100, Data: 0x00800000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E18C, Data: 0x00010000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E18C, Data: 0x00030000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00614900, Data: 0x10000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614900, Data: 0x00800000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000200, Data: 0xC0110111 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000200, Data: 0x80110111 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E18C, Data: 0x00030000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E18C, Data: 0x00010000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000200, Data: 0x80110111 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00000200, Data: 0xC0110111 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614100, Data: 0x00800018 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614900, Data: 0x00800018 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614100, Data: 0x10000018 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614900, Data: 0x10000018 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00614280, Data: 0x04840484 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614280, Data: 0x00800080 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00614A80, Data: 0x04840484 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614A80, Data: 0x00800080 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00615280, Data: 0x04840484 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00615280, Data: 0x00800080 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00614300, Data: 0x00800484 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614300, Data: 0x00800080 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00614B00, Data: 0x00800484 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614B00, Data: 0x00800080 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00614380, Data: 0x00800484 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614380, Data: 0x00800080 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00614B80, Data: 0x00800484 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614B80, Data: 0x00800080 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00615380, Data: 0x00800484 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00615380, Data: 0x00800080 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00614200, Data: 0x00800084 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614200, Data: 0x00800080 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00614A00, Data: 0x00800084 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614A00, Data: 0x00800080 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00614108, Data: 0x40050012 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614108, Data: 0x00050012 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00614908, Data: 0x40050012 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614908, Data: 0x00050012 [drm] nouveau 0000:02:00.0: 0xD9BC: [ (0x53) - INIT_ZM_CR ] [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0x3F, Head: 0x00, Data: 0x57 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061943C, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061943C, Data: 0x57000000 [drm] nouveau 0000:02:00.0: 0xD9BF: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD9BF: Reg: 0x0000E104, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E104, Data: 0x40044444 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E104, Data: 0x40044444 [drm] nouveau 0000:02:00.0: 0xD9CC: [ (0x8E) - INIT_GPIO ] [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x700008E1 [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x08, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E100, Data: 0x00000100 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E100, Data: 0x00000100 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0xA40021E2 [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x21, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E100, Data: 0x00000100 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E100, Data: 0x00040100 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x240001E3 [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x01, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E100, Data: 0x00040100 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E100, Data: 0x000C0100 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x240000E4 [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x00, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E100, Data: 0x000C0100 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x200004E5 [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x04, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x200005E6 [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x05, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x210018E7 [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x18, state 1 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x0A0023E8 [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x23, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x5A002BE9 [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x2b, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E100, Data: 0x001C0300 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x09002EEA [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x2e, state 1 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E100, Data: 0x001C0300 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E100, Data: 0x001C0300 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x7200402B [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x40, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E100, Data: 0x001C0300 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E100, Data: 0x001C0B00 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x700007EF [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x07, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E100, Data: 0x001C0B00 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E100, Data: 0x001C0B00 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x58004BF0 [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x4b, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E28C, Data: 0x00000100 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E28C, Data: 0x00000100 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x580053F2 [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x53, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E28C, Data: 0x00000100 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E28C, Data: 0x00000100 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x700051F4 [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x51, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E28C, Data: 0x00000100 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E28C, Data: 0x00000100 [drm] nouveau 0000:02:00.0: 0xD9CC: Entry: 0x70014200 [drm] nouveau 0000:02:00.0: 0xD9CC: set gpio 0x42, state 0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E100, Data: 0x001C0B00 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E100, Data: 0x001C0B00 [drm] nouveau 0000:02:00.0: 0xD9CD: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD9CD: Reg: 0x00001084, Mask: 0xFFFFF7FF, Data: 0x00000800 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00001084, Data: 0x00001469 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00001084, Data: 0x00001C69 [drm] nouveau 0000:02:00.0: 0xD9DA: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E054, Data: 0x7FFF7FFF [drm] nouveau 0000:02:00.0: 0xD9E3: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00009220, Data: 0x00000009 [drm] nouveau 0000:02:00.0: 0xD9EC: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00009200, Data: 0x00000144 [drm] nouveau 0000:02:00.0: 0xD9F5: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00009210, Data: 0x0000007D [drm] nouveau 0000:02:00.0: 0xD9FE: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xD9FE: Reg: 0x00101000, Mask: 0xFFFFFFFF, Data: 0x80000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x0F44A01C [drm] nouveau 0000:02:00.0: Write: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xDA0B: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDA0B: Reg: 0x0010100C, Mask: 0xFFFFFFFF, Data: 0x80000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0010100C, Data: 0x0001B030 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0010100C, Data: 0x8001B030 [drm] nouveau 0000:02:00.0: 0xDA18: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:02:00.0: 0xDA18: Condition: 0x07 [drm] nouveau 0000:02:00.0: 0xDA18: Cond: 0x07, Reg: 0x0000C040, Mask: 0x00000300 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000C040, Data: 0x3E801008 [drm] nouveau 0000:02:00.0: 0xDA18: Checking if 0x00000000 equals 0x00000000 [drm] nouveau 0000:02:00.0: 0xDA18: Condition fulfilled -- continuing to execute [drm] nouveau 0000:02:00.0: 0xDA1A: [ (0x5F) - INIT_COPY_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDA1A: SrcReg: 0x00614004, Shift: 0x00, SrcMask: 0xFFFFFFFF, Xor: 0x00000000, DstReg: 0x00610184, DstMask: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00614004, Data: 0x77704557 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00610184, Data: 0x7F700000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00610184, Data: 0x77704557 [drm] nouveau 0000:02:00.0: 0xDA30: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xDA31: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00619F00, Data: 0x00000009 [drm] nouveau 0000:02:00.0: 0xDA3A: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:02:00.0: 0xDA3A: Condition: 0x06 [drm] nouveau 0000:02:00.0: 0xDA3A: Cond: 0x06, Reg: 0x00021218, Mask: 0x000000FF [drm] nouveau 0000:02:00.0: Read: Reg: 0x00021218, Data: 0x00000021 [drm] nouveau 0000:02:00.0: 0xDA3A: Checking if 0x00000021 equals 0x00000000 [drm] nouveau 0000:02:00.0: 0xDA3A: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:02:00.0: 0xDA3C: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xDA45: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xDA4E: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xDA57: [ (0x38) - INIT_NOT ] [drm] nouveau 0000:02:00.0: 0xDA57: ------ Executing following commands ------ [drm] nouveau 0000:02:00.0: 0xDA58: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDA58: Reg: 0x0061A068, Mask: 0xFBFFFFFF, Data: 0x04000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061A068, Data: 0x40000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A068, Data: 0x44000000 [drm] nouveau 0000:02:00.0: 0xDA65: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDA65: Reg: 0x0061A868, Mask: 0xFBFFFFFF, Data: 0x04000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061A868, Data: 0x40000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A868, Data: 0x44000000 [drm] nouveau 0000:02:00.0: 0xDA72: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDA72: Reg: 0x0061B068, Mask: 0xFBFFFFFF, Data: 0x04000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061B068, Data: 0x40000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061B068, Data: 0x44000000 [drm] nouveau 0000:02:00.0: 0xDA7F: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xDA80: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00617348, Data: 0x80000001 [drm] nouveau 0000:02:00.0: 0xDA89: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00004700, Data: 0x80000001 [drm] nouveau 0000:02:00.0: 0xDA92: [ (0x37) - INIT_COPY ] [drm] nouveau 0000:02:00.0: 0xDA92: Reg: 0x00101000, Shift: 0x02, SrcMask: 0x0F, Port: 0x03D4, Index: 0x88, Mask: 0xF0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x07 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00619488, Data: 0x00000007 [drm] nouveau 0000:02:00.0: 0xDA9D: [ (0x37) - INIT_COPY ] [drm] nouveau 0000:02:00.0: 0xDA9D: Reg: 0x00101000, Shift: 0x18, SrcMask: 0x0F, Port: 0x03D4, Index: 0x8B, Mask: 0xF0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x00000007 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x8B, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0x8B, Head: 0x00, Data: 0x0F [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x00000007 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: 0xDAA8: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDAA8: Reg: 0x00001580, Mask: 0xFFFFFFFF, Data: 0x00090000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00001580, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00001580, Data: 0x00090000 [drm] nouveau 0000:02:00.0: 0xDAB5: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:02:00.0: 0xDAB5: Condition: 0x09 [drm] nouveau 0000:02:00.0: 0xDAB5: Cond: 0x09, Reg: 0x00000000, Mask: 0xE0000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00000000, Data: 0x298400A2 [drm] nouveau 0000:02:00.0: 0xDAB5: Checking if 0x20000000 equals 0x20000000 [drm] nouveau 0000:02:00.0: 0xDAB5: Condition fulfilled -- continuing to execute [drm] nouveau 0000:02:00.0: 0xDAB7: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00001538, Data: 0x00011111 [drm] nouveau 0000:02:00.0: 0xDAC0: [ (0x38) - INIT_NOT ] [drm] nouveau 0000:02:00.0: 0xDAC0: ------ Skipping following commands ------ [drm] nouveau 0000:02:00.0: 0xDAC1: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xDACA: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xDACA: ---- Executing following commands ---- [drm] nouveau 0000:02:00.0: 0xDACB: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDACB: Reg: 0x0010002C, Mask: 0xFFFFFF00, Data: 0x00000012 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0010002C, Data: 0x00000032 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0010002C, Data: 0x00000012 [drm] nouveau 0000:02:00.0: 0xDAD8: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDAD8: Reg: 0x00003310, Mask: 0xFFFFF8FF, Data: 0x00000500 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00003310, Data: 0x00000300 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00003310, Data: 0x00000500 [drm] nouveau 0000:02:00.0: 0xDAE5: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDAE5: Reg: 0x00001530, Mask: 0xFFFFFFF0, Data: 0x0000000A [drm] nouveau 0000:02:00.0: Read: Reg: 0x00001530, Data: 0x800412FF [drm] nouveau 0000:02:00.0: Write: Reg: 0x00001530, Data: 0x800412FA [drm] nouveau 0000:02:00.0: 0xDAF2: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0002004C, Data: 0x40072A0B [drm] nouveau 0000:02:00.0: 0xDAFB: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x000204CC, Data: 0x0000005D [drm] nouveau 0000:02:00.0: 0xDB04: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00020060, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xDB0D: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00088138, Data: 0x10000000 [drm] nouveau 0000:02:00.0: 0xDB16: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDB16: Reg: 0x0008813C, Mask: 0x00000000, Data: 0x53FF0000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0008813C, Data: 0x33FF0000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0008813C, Data: 0x53FF0000 [drm] nouveau 0000:02:00.0: 0xDB23: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00088140, Data: 0x08010000 [drm] nouveau 0000:02:00.0: 0xDB2C: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDB2C: Reg: 0x0008818C, Mask: 0x0FFFFFF8, Data: 0xD0000007 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0008818C, Data: 0x50000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0008818C, Data: 0xD0000007 [drm] nouveau 0000:02:00.0: 0xDB39: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDB39: Reg: 0x00088458, Mask: 0xF300FF00, Data: 0x0040001F [drm] nouveau 0000:02:00.0: Read: Reg: 0x00088458, Data: 0x0057001F [drm] nouveau 0000:02:00.0: Write: Reg: 0x00088458, Data: 0x0040001F [drm] nouveau 0000:02:00.0: 0xDB46: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDB46: Reg: 0x00001604, Mask: 0xFFF577FF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00001604, Data: 0x002AAA04 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00001604, Data: 0x00202204 [drm] nouveau 0000:02:00.0: 0xDB53: [ (0x53) - INIT_ZM_CR ] [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0x8F, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061948C, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061948C, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xDB56: [ (0x76) - INIT_IO_CONDITION ] [drm] nouveau 0000:02:00.0: 0xDB56: IO condition: 0x04 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061948C, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x8F, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: 0xDB56: Checking if 0x00 equals 0x01 [drm] nouveau 0000:02:00.0: 0xDB56: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:02:00.0: 0xDB58: [ (0x4D) - INIT_ZM_I2C_BYTE ] [drm] nouveau 0000:02:00.0: 0xDB5E: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xDB5E: ---- Executing following commands ---- [drm] nouveau 0000:02:00.0: 0xDB5F: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E81C, Data: 0x00044001 [drm] nouveau 0000:02:00.0: 0xDB68: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E824, Data: 0x00200000 [drm] nouveau 0000:02:00.0: 0xDB71: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E820, Data: 0x80660801 [drm] nouveau 0000:02:00.0: 0xDB7A: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E844, Data: 0x00022801 [drm] nouveau 0000:02:00.0: 0xDB83: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDB83: Reg: 0x0000E84C, Mask: 0xFFF8FFFF, Data: 0x00120000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E84C, Data: 0x00030000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E84C, Data: 0x00120000 [drm] nouveau 0000:02:00.0: 0xDB90: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E848, Data: 0x80191501 [drm] nouveau 0000:02:00.0: 0xDB99: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDB99: Reg: 0x00004040, Mask: 0x7FFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00004040, Data: 0x00010000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00004040, Data: 0x00010000 [drm] nouveau 0000:02:00.0: 0xDBA6: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDBA6: Reg: 0x00004050, Mask: 0xFFEFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00004050, Data: 0x00010000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00004050, Data: 0x00010000 [drm] nouveau 0000:02:00.0: 0xDBB3: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000C050, Data: 0x0000500E [drm] nouveau 0000:02:00.0: 0xDBBC: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xDBBC: Sleeping for 0x07D0 microseconds [drm] nouveau 0000:02:00.0: 0xDBBF: [ (0x6B) - INIT_SUB ] [drm] nouveau 0000:02:00.0: 0xDBBF: Calling script 7 [drm] nouveau 0000:02:00.0: 0xE5B2: [ (0x4A) - INIT_IO_RESTRICT_PLL2 ] [drm] nouveau 0000:02:00.0: 0xE5B2: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x00004008 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x07 [drm] nouveau 0000:02:00.0: 0xE5B2: Reg: 0x00004008, Config: 0x07, Freq: 300000kHz [drm] nouveau 0000:02:00.0: Loading PLL limits for reg 0x00004008 [drm] nouveau 0000:02:00.0: pll.vco1.minfreq: 590000 [drm] nouveau 0000:02:00.0: pll.vco1.maxfreq: 1180000 [drm] nouveau 0000:02:00.0: pll.vco1.min_inputfreq: 14000 [drm] nouveau 0000:02:00.0: pll.vco1.max_inputfreq: 75000 [drm] nouveau 0000:02:00.0: pll.vco1.min_n: 14 [drm] nouveau 0000:02:00.0: pll.vco1.max_n: 255 [drm] nouveau 0000:02:00.0: pll.vco1.min_m: 1 [drm] nouveau 0000:02:00.0: pll.vco1.max_m: 255 [drm] nouveau 0000:02:00.0: pll.vco2.minfreq: 590000 [drm] nouveau 0000:02:00.0: pll.vco2.maxfreq: 1180000 [drm] nouveau 0000:02:00.0: pll.vco2.min_inputfreq: 0 [drm] nouveau 0000:02:00.0: pll.vco2.max_inputfreq: 65535000 [drm] nouveau 0000:02:00.0: pll.vco2.min_n: 1 [drm] nouveau 0000:02:00.0: pll.vco2.max_n: 1 [drm] nouveau 0000:02:00.0: pll.vco2.min_m: 1 [drm] nouveau 0000:02:00.0: pll.vco2.max_m: 1 [drm] nouveau 0000:02:00.0: pll.max_log2p: 7 [drm] nouveau 0000:02:00.0: pll.log2p_bias: 1 [drm] nouveau 0000:02:00.0: pll.refclk: 108000 [drm] nouveau 0000:02:00.0: 0xE5DD: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: 0xDBBF: End of script 7 [drm] nouveau 0000:02:00.0: 0xDBC1: [ (0x6B) - INIT_SUB ] [drm] nouveau 0000:02:00.0: 0xDBC1: Calling script 8 [drm] nouveau 0000:02:00.0: 0xE5DE: [ (0x4A) - INIT_IO_RESTRICT_PLL2 ] [drm] nouveau 0000:02:00.0: 0xE5DE: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x00004020 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x07 [drm] nouveau 0000:02:00.0: 0xE5DE: Reg: 0x00004020, Config: 0x07, Freq: 550000kHz [drm] nouveau 0000:02:00.0: Loading PLL limits for reg 0x00004020 [drm] nouveau 0000:02:00.0: pll.vco1.minfreq: 750000 [drm] nouveau 0000:02:00.0: pll.vco1.maxfreq: 1500000 [drm] nouveau 0000:02:00.0: pll.vco1.min_inputfreq: 50000 [drm] nouveau 0000:02:00.0: pll.vco1.max_inputfreq: 100000 [drm] nouveau 0000:02:00.0: pll.vco1.min_n: 10 [drm] nouveau 0000:02:00.0: pll.vco1.max_n: 255 [drm] nouveau 0000:02:00.0: pll.vco1.min_m: 1 [drm] nouveau 0000:02:00.0: pll.vco1.max_m: 255 [drm] nouveau 0000:02:00.0: pll.vco2.minfreq: 750000 [drm] nouveau 0000:02:00.0: pll.vco2.maxfreq: 1500000 [drm] nouveau 0000:02:00.0: pll.vco2.min_inputfreq: 0 [drm] nouveau 0000:02:00.0: pll.vco2.max_inputfreq: 65535000 [drm] nouveau 0000:02:00.0: pll.vco2.min_n: 1 [drm] nouveau 0000:02:00.0: pll.vco2.max_n: 1 [drm] nouveau 0000:02:00.0: pll.vco2.min_m: 1 [drm] nouveau 0000:02:00.0: pll.vco2.max_m: 1 [drm] nouveau 0000:02:00.0: pll.max_log2p: 7 [drm] nouveau 0000:02:00.0: pll.log2p_bias: 0 [drm] nouveau 0000:02:00.0: pll.refclk: 100000 [drm] nouveau 0000:02:00.0: 0xE609: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: 0xDBC1: End of script 8 [drm] nouveau 0000:02:00.0: 0xDBC3: [ (0x6B) - INIT_SUB ] [drm] nouveau 0000:02:00.0: 0xDBC3: Calling script 6 [drm] nouveau 0000:02:00.0: 0xE586: [ (0x4A) - INIT_IO_RESTRICT_PLL2 ] [drm] nouveau 0000:02:00.0: 0xE586: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x00004028 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x07 [drm] nouveau 0000:02:00.0: 0xE586: Reg: 0x00004028, Config: 0x07, Freq: 275000kHz [drm] nouveau 0000:02:00.0: Loading PLL limits for reg 0x00004028 [drm] nouveau 0000:02:00.0: pll.vco1.minfreq: 500000 [drm] nouveau 0000:02:00.0: pll.vco1.maxfreq: 1000000 [drm] nouveau 0000:02:00.0: pll.vco1.min_inputfreq: 14000 [drm] nouveau 0000:02:00.0: pll.vco1.max_inputfreq: 75000 [drm] nouveau 0000:02:00.0: pll.vco1.min_n: 14 [drm] nouveau 0000:02:00.0: pll.vco1.max_n: 255 [drm] nouveau 0000:02:00.0: pll.vco1.min_m: 1 [drm] nouveau 0000:02:00.0: pll.vco1.max_m: 7 [drm] nouveau 0000:02:00.0: pll.vco2.minfreq: 500000 [drm] nouveau 0000:02:00.0: pll.vco2.maxfreq: 1000000 [drm] nouveau 0000:02:00.0: pll.vco2.min_inputfreq: 0 [drm] nouveau 0000:02:00.0: pll.vco2.max_inputfreq: 65535000 [drm] nouveau 0000:02:00.0: pll.vco2.min_n: 1 [drm] nouveau 0000:02:00.0: pll.vco2.max_n: 1 [drm] nouveau 0000:02:00.0: pll.vco2.min_m: 1 [drm] nouveau 0000:02:00.0: pll.vco2.max_m: 1 [drm] nouveau 0000:02:00.0: pll.max_log2p: 7 [drm] nouveau 0000:02:00.0: pll.log2p_bias: 0 [drm] nouveau 0000:02:00.0: pll.refclk: 100000 [drm] nouveau 0000:02:00.0: 0xE5B1: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: 0xDBC3: End of script 6 [drm] nouveau 0000:02:00.0: 0xDBC5: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDBC5: Reg: 0x0000E18C, Mask: 0xFFFFFFFE, Data: 0x00100000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E18C, Data: 0x00010000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E18C, Data: 0x00110000 [drm] nouveau 0000:02:00.0: 0xDBD2: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xDBD2: Sleeping for 0x03E8 microseconds [drm] nouveau 0000:02:00.0: 0xDBD5: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E818, Data: 0x88080000 [drm] nouveau 0000:02:00.0: 0xDBDE: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xDBDE: Sleeping for 0x0064 microseconds [drm] nouveau 0000:02:00.0: 0xDBE1: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E818, Data: 0x80080000 [drm] nouveau 0000:02:00.0: 0xDBEA: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:02:00.0: 0xDBEA: Condition: 0x10 [drm] nouveau 0000:02:00.0: 0xDBEA: Cond: 0x10, Reg: 0x00004080, Mask: 0x00010000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00004080, Data: 0x00030000 [drm] nouveau 0000:02:00.0: 0xDBEA: Checking if 0x00010000 equals 0x00010000 [drm] nouveau 0000:02:00.0: 0xDBEA: Condition fulfilled -- continuing to execute [drm] nouveau 0000:02:00.0: 0xDBEC: [ (0x38) - INIT_NOT ] [drm] nouveau 0000:02:00.0: 0xDBEC: ------ Skipping following commands ------ [drm] nouveau 0000:02:00.0: 0xDBED: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDBFA: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xDBFD: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xDC06: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xDC09: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xDC12: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xDC12: ---- Executing following commands ---- [drm] nouveau 0000:02:00.0: 0xDC13: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E824, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xDC1C: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDC1C: Reg: 0x0000E820, Mask: 0x7FFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E820, Data: 0x80660801 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E820, Data: 0x00660801 [drm] nouveau 0000:02:00.0: 0xDC29: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xDC29: Sleeping for 0x03E8 microseconds [drm] nouveau 0000:02:00.0: 0xDC2C: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDC2C: Reg: 0x00004020, Mask: 0xFFFFFFFF, Data: 0x80000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00004020, Data: 0x00010000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00004020, Data: 0x80010000 [drm] nouveau 0000:02:00.0: 0xDC39: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDC39: Reg: 0x00004028, Mask: 0xFFC0FFFF, Data: 0x80090000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00004028, Data: 0x00010000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00004028, Data: 0x80090000 [drm] nouveau 0000:02:00.0: 0xDC46: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDC46: Reg: 0x00004008, Mask: 0xFFFFFFFF, Data: 0x90001200 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00004008, Data: 0x00011200 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00004008, Data: 0x90011200 [drm] nouveau 0000:02:00.0: 0xDC53: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xDC53: Sleeping for 0x03E8 microseconds [drm] nouveau 0000:02:00.0: 0xDC56: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDC56: Reg: 0x00004028, Mask: 0xFFFFFFFF, Data: 0xA0000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00004028, Data: 0x80090000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00004028, Data: 0xA0090000 [drm] nouveau 0000:02:00.0: 0xDC63: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDC63: Reg: 0x00004008, Mask: 0xFFFFEFFF, Data: 0x90004600 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00004008, Data: 0x90011200 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00004008, Data: 0x90014600 [drm] nouveau 0000:02:00.0: 0xDC70: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xDC70: Sleeping for 0x0064 microseconds [drm] nouveau 0000:02:00.0: 0xDC73: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDC73: Reg: 0x0000C040, Mask: 0x017F3340, Data: 0x2A80D0A3 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000C040, Data: 0x3E801008 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000C040, Data: 0x2A80D0A3 [drm] nouveau 0000:02:00.0: 0xDC80: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDC80: Reg: 0x00004008, Mask: 0xFFFFFDFF, Data: 0x90004400 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00004008, Data: 0x90014600 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00004008, Data: 0x90014400 [drm] nouveau 0000:02:00.0: 0xDC8D: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDC8D: Reg: 0x00004020, Mask: 0x00000000, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00004020, Data: 0x80010000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00004020, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xDC9A: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDC9A: Reg: 0x00020018, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00020018, Data: 0x9E9C9A98 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00020018, Data: 0x9E9C9A98 [drm] nouveau 0000:02:00.0: 0xDCA7: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:02:00.0: 0xDCA7: Executing subroutine at 0xE940 [drm] nouveau 0000:02:00.0: 0xE940: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: 0xDCA7: End of 0xE940 subroutine [drm] nouveau 0000:02:00.0: 0xDCAA: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000C044, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xDCB3: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100F34, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xDCBC: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00020060, Data: 0x00040000 [drm] nouveau 0000:02:00.0: 0xDCC5: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E610, Data: 0x0000000F [drm] nouveau 0000:02:00.0: 0xDCCE: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E61C, Data: 0x0000000F [drm] nouveau 0000:02:00.0: 0xDCD7: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E690, Data: 0xF4000204 [drm] nouveau 0000:02:00.0: 0xDCE0: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDCE0: Reg: 0x00089008, Mask: 0xFFFFC7FF, Data: 0x00002800 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00089008, Data: 0x03000010 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00089008, Data: 0x03002810 [drm] nouveau 0000:02:00.0: 0xDCED: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDCED: Reg: 0x0008900C, Mask: 0x00000000, Data: 0x00AC02AC [drm] nouveau 0000:02:00.0: Read: Reg: 0x0008900C, Data: 0x000202AC [drm] nouveau 0000:02:00.0: Write: Reg: 0x0008900C, Data: 0x00AC02AC [drm] nouveau 0000:02:00.0: 0xDCFA: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDCFA: Reg: 0x0000154C, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000154C, Data: 0x000000FD [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000154C, Data: 0x000000FD [drm] nouveau 0000:02:00.0: 0xDD07: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDD07: Reg: 0x00088460, Mask: 0xFFFFFFFB, Data: 0x00000004 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00088460, Data: 0xB0601220 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00088460, Data: 0xB0601224 [drm] nouveau 0000:02:00.0: 0xDD14: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDD14: Reg: 0x00089028, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00089028, Data: 0x00FAF100 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00089028, Data: 0x00FAF100 [drm] nouveau 0000:02:00.0: 0xDD21: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0008848C, Data: 0x01200090 [drm] nouveau 0000:02:00.0: 0xDD2A: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDD2A: Reg: 0x00001084, Mask: 0xFFFFF7FF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00001084, Data: 0x00001C69 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00001084, Data: 0x00001469 [drm] nouveau 0000:02:00.0: 0xDD37: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xDD37: Reg: 0x00088610, Mask: 0xFFFFFFFE, Data: 0x00000001 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00088610, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00088610, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xDD44: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00020080, Data: 0x100C0736 [drm] nouveau 0000:02:00.0: 0xDD4D: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: Parsing VBIOS init table 1 at offset 0xDD4E [drm] nouveau 0000:02:00.0: 0xDD4E: ------ Executing following commands ------ [drm] nouveau 0000:02:00.0: 0xDD4E: [ (0x58) - INIT_ZM_REG_SEQUENCE ] [drm] nouveau 0000:02:00.0: 0xDD4E: BaseReg: 0x00100718, Count: 0x02 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100718, Data: 0x00022077 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0010071C, Data: 0x00044077 [drm] nouveau 0000:02:00.0: 0xDD5C: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xDD5C: Reg: 0x001008A0, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001008A0, Data: 0x87703FB9 [drm] nouveau 0000:02:00.0: 0xDD83: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100920, Data: 0x0F0F0F0F [drm] nouveau 0000:02:00.0: 0xDD8C: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xDD8C: Reg: 0x00100A20, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100A20, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xDDB3: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xDDB3: Reg: 0x00100A40, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100A40, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xDDDA: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xDDDA: Reg: 0x00100A60, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100A60, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xDE01: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xDE01: Reg: 0x00100A80, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100A80, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xDE28: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xDE28: Reg: 0x00100AA0, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100AA0, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xDE4F: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xDE4F: Reg: 0x00100AC0, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100AC0, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xDE76: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xDE76: Reg: 0x001005A0, RegIncrement: 0x04, Count: 0x02, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001005A0, Data: 0x008A8787 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001005A4, Data: 0x00001111 [drm] nouveau 0000:02:00.0: 0xDEBD: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:02:00.0: 0xDEBD: Executing subroutine at 0xE2E5 [drm] nouveau 0000:02:00.0: 0xE2E5: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE2E5: Reg: 0x00004008, Mask: 0xFFFF9FFF, Data: 0x00006000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00004008, Data: 0x90014400 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00004008, Data: 0x90016400 [drm] nouveau 0000:02:00.0: 0xE2F2: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE2F2: Reg: 0x00100760, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100760, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE319: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE319: Reg: 0x00100780, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100780, Data: 0xDDDDDDDD [drm] nouveau 0000:02:00.0: 0xE340: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE340: Reg: 0x001007A0, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001007A0, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE367: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE367: Reg: 0x001007C0, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001007C0, Data: 0xDDDDDDDD [drm] nouveau 0000:02:00.0: 0xE38E: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE38E: Reg: 0x001007E0, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001007E0, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE3B5: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE3B5: Reg: 0x00100800, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100800, Data: 0xAAAAAAAA [drm] nouveau 0000:02:00.0: 0xE3DC: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: 0xDEBD: End of 0xE2E5 subroutine [drm] nouveau 0000:02:00.0: 0xDEC0: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:02:00.0: 0xDEC0: Executing subroutine at 0xE3DD [drm] nouveau 0000:02:00.0: 0xE3DD: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE3DD: Reg: 0x00100820, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100820, Data: 0x11111111 [drm] nouveau 0000:02:00.0: 0xE404: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE404: Reg: 0x00100840, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100840, Data: 0x22222222 [drm] nouveau 0000:02:00.0: 0xE42B: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: 0xDEC0: End of 0xE3DD subroutine [drm] nouveau 0000:02:00.0: 0xDEC3: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:02:00.0: 0xDEC3: Executing subroutine at 0xE42C [drm] nouveau 0000:02:00.0: 0xE42C: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE42C: Reg: 0x00100860, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100860, Data: 0x11111111 [drm] nouveau 0000:02:00.0: 0xE453: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE453: Reg: 0x00100880, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100880, Data: 0x22222222 [drm] nouveau 0000:02:00.0: 0xE47A: [ (0x58) - INIT_ZM_REG_SEQUENCE ] [drm] nouveau 0000:02:00.0: 0xE47A: BaseReg: 0x001009C0, Count: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009C0, Data: 0x04040004 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009C4, Data: 0x00000404 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009C8, Data: 0x04040004 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009CC, Data: 0x00000404 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009D0, Data: 0x00000404 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009D4, Data: 0x04000004 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009D8, Data: 0x04000004 [drm] nouveau 0000:02:00.0: 0xE49C: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE49C: Reg: 0x001009DC, RegIncrement: 0x04, Count: 0x05, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009DC, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009E0, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009E4, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009E8, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001009EC, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE543: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: 0xDEC3: End of 0xE42C subroutine [drm] nouveau 0000:02:00.0: 0xDEC6: [ (0x32) - INIT_IO_RESTRICT_PROG ] [drm] nouveau 0000:02:00.0: 0xDEC6: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x00100714 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x07 [drm] nouveau 0000:02:00.0: 0xDEC6: Writing config 07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100714, Data: 0x00033102 [drm] nouveau 0000:02:00.0: 0xDEF1: [ (0x58) - INIT_ZM_REG_SEQUENCE ] [drm] nouveau 0000:02:00.0: 0xDEF1: BaseReg: 0x00100740, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100740, Data: 0x0E000000 [drm] nouveau 0000:02:00.0: 0xDEFB: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100DA0, Data: 0x00000010 [drm] nouveau 0000:02:00.0: 0xDF04: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100710, Data: 0x0000001E [drm] nouveau 0000:02:00.0: 0xDF0D: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0010024C, Data: 0x0A010080 [drm] nouveau 0000:02:00.0: 0xDF16: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xDF16: Reg: 0x00100254, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100254, Data: 0x00000002 [drm] nouveau 0000:02:00.0: 0xDF3D: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0010053C, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xDF46: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xDF46: Reg: 0x00100080, RegIncrement: 0x04, Count: 0x01, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100080, Data: 0x00000020 [drm] nouveau 0000:02:00.0: 0xDF6D: [ (0x8F) - INIT_RAM_RESTRICT_ZM_REG_GROUP ] [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xDF6D: Reg: 0x00100220, RegIncrement: 0x04, Count: 0x0B, StrapRamCfg: 0x07, Index: 0x07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100220, Data: 0x060A120F [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100224, Data: 0x09010907 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100228, Data: 0x02040305 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0010022C, Data: 0x1B160606 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100230, Data: 0x23000808 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100234, Data: 0x12050906 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100238, Data: 0x002F0132 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0010023C, Data: 0x04060202 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100240, Data: 0x110F031C [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100244, Data: 0x00000186 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100248, Data: 0x03EBE80F [drm] nouveau 0000:02:00.0: 0xE0D4: [ (0x32) - INIT_IO_RESTRICT_PROG ] [drm] nouveau 0000:02:00.0: 0xE0D4: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x00100200 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x07 [drm] nouveau 0000:02:00.0: 0xE0D4: Writing config 07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100200, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE0FF: [ (0x32) - INIT_IO_RESTRICT_PROG ] [drm] nouveau 0000:02:00.0: 0xE0FF: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x00100204 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x07 [drm] nouveau 0000:02:00.0: 0xE0FF: Writing config 07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100204, Data: 0x01559000 [drm] nouveau 0000:02:00.0: 0xE12A: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:02:00.0: 0xE12A: Condition: 0x0B [drm] nouveau 0000:02:00.0: 0xE12A: Cond: 0x0B, Reg: 0x00101000, Mask: 0x00000020 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE12A: Checking if 0x00000000 equals 0x00000020 [drm] nouveau 0000:02:00.0: 0xE12A: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:02:00.0: 0xE12C: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE139: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xE139: ---- Executing following commands ---- [drm] nouveau 0000:02:00.0: 0xE13A: [ (0x32) - INIT_IO_RESTRICT_PROG ] [drm] nouveau 0000:02:00.0: 0xE13A: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x00100214 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x07 [drm] nouveau 0000:02:00.0: 0xE13A: Writing config 07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100214, Data: 0x00000022 [drm] nouveau 0000:02:00.0: 0xE165: [ (0x32) - INIT_IO_RESTRICT_PROG ] [drm] nouveau 0000:02:00.0: 0xE165: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x00100250 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x07 [drm] nouveau 0000:02:00.0: 0xE165: Writing config 07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100250, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE190: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE190: Reg: 0x0000122C, Mask: 0xFFFFFFFE, Data: 0x00000001 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000122C, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000122C, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE19D: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xE19D: Sleeping for 0x0FA0 microseconds [drm] nouveau 0000:02:00.0: 0xE1A0: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE1A0: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE1A2: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xE1A2: Sleeping for 0x00C8 microseconds [drm] nouveau 0000:02:00.0: 0xE1A5: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100218, Data: 0x01000000 [drm] nouveau 0000:02:00.0: 0xE1AE: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0010021C, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE1B7: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xE1B7: Sleeping for 0x00C8 microseconds [drm] nouveau 0000:02:00.0: 0xE1BA: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:02:00.0: 0xE1BA: Condition: 0x0B [drm] nouveau 0000:02:00.0: 0xE1BA: Cond: 0x0B, Reg: 0x00101000, Mask: 0x00000020 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE1BA: Checking if 0x00000000 equals 0x00000020 [drm] nouveau 0000:02:00.0: 0xE1BA: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:02:00.0: 0xE1BC: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xE1C5: [ (0x38) - INIT_NOT ] [drm] nouveau 0000:02:00.0: 0xE1C5: ------ Executing following commands ------ [drm] nouveau 0000:02:00.0: 0xE1C6: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100218, Data: 0x01000100 [drm] nouveau 0000:02:00.0: 0xE1CF: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xE1D0: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xE1D0: Sleeping for 0x00C8 microseconds [drm] nouveau 0000:02:00.0: 0xE1D3: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100218, Data: 0x01000101 [drm] nouveau 0000:02:00.0: 0xE1DC: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xE1DC: Sleeping for 0x00C8 microseconds [drm] nouveau 0000:02:00.0: 0xE1DF: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE1DF: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D8, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE1E1: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE1E1: Macro: 0x00, MacroTableIndex: 0x00, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D4, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE1E3: [ (0x32) - INIT_IO_RESTRICT_PROG ] [drm] nouveau 0000:02:00.0: 0xE1E3: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x001002E0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x07 [drm] nouveau 0000:02:00.0: 0xE1E3: Writing config 07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002E0, Data: 0x00600000 [drm] nouveau 0000:02:00.0: 0xE20E: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:02:00.0: 0xE20E: Condition: 0x0B [drm] nouveau 0000:02:00.0: 0xE20E: Cond: 0x0B, Reg: 0x00101000, Mask: 0x00000020 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: 0xE20E: Checking if 0x00000000 equals 0x00000020 [drm] nouveau 0000:02:00.0: 0xE20E: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:02:00.0: 0xE210: [ (0x32) - INIT_IO_RESTRICT_PROG ] [drm] nouveau 0000:02:00.0: 0xE23B: [ (0x38) - INIT_NOT ] [drm] nouveau 0000:02:00.0: 0xE23B: ------ Executing following commands ------ [drm] nouveau 0000:02:00.0: 0xE23C: [ (0x32) - INIT_IO_RESTRICT_PROG ] [drm] nouveau 0000:02:00.0: 0xE23C: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x001002C4 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x07 [drm] nouveau 0000:02:00.0: 0xE23C: Writing config 07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002C4, Data: 0x00100020 [drm] nouveau 0000:02:00.0: 0xE267: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xE268: [ (0x32) - INIT_IO_RESTRICT_PROG ] [drm] nouveau 0000:02:00.0: 0xE268: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x001002C0 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x07 [drm] nouveau 0000:02:00.0: 0xE268: Writing config 07 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002C0, Data: 0x00000772 [drm] nouveau 0000:02:00.0: 0xE293: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:02:00.0: 0xE293: Condition: 0x0C [drm] nouveau 0000:02:00.0: 0xE293: Cond: 0x0C, Reg: 0x00100200, Mask: 0x00000004 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00100200, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE293: Checking if 0x00000000 equals 0x00000004 [drm] nouveau 0000:02:00.0: 0xE293: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:02:00.0: 0xE295: [ (0x90) - INIT_COPY_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xE29E: [ (0x90) - INIT_COPY_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xE2A7: [ (0x90) - INIT_COPY_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xE2B0: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xE2B0: ---- Executing following commands ---- [drm] nouveau 0000:02:00.0: 0xE2B1: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE2B1: Reg: 0x0000E108, Mask: 0xFFFFFEFF, Data: 0x00000100 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0000E108, Data: 0x4444421B [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E108, Data: 0x4444431B [drm] nouveau 0000:02:00.0: 0xE2BE: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE2BE: Macro: 0x02, MacroTableIndex: 0x02, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D8, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE2C0: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE2C0: Macro: 0x00, MacroTableIndex: 0x00, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D4, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE2C2: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE2C2: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE2C4: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE2C4: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE2C6: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE2C6: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE2C8: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xE2C8: Sleeping for 0x03E8 microseconds [drm] nouveau 0000:02:00.0: 0xE2CB: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100210, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE2D4: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE2D4: Reg: 0x00004008, Mask: 0xFFFFBFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00004008, Data: 0x90016400 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00004008, Data: 0x90012400 [drm] nouveau 0000:02:00.0: 0xE2E1: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xE2E1: Sleeping for 0x03E8 microseconds [drm] nouveau 0000:02:00.0: 0xE2E4: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: Parsing VBIOS init table 2 at offset 0xE544 [drm] nouveau 0000:02:00.0: 0xE544: ------ Executing following commands ------ [drm] nouveau 0000:02:00.0: 0xE544: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE544: Reg: 0x001008C0, Mask: 0x00000000, Data: 0x8B303A98 [drm] nouveau 0000:02:00.0: Read: Reg: 0x001008C0, Data: 0x8B000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001008C0, Data: 0x8B303A98 [drm] nouveau 0000:02:00.0: 0xE551: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000108C, Data: 0x000000D1 [drm] nouveau 0000:02:00.0: 0xE55A: [ (0x53) - INIT_ZM_CR ] [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0xF0, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194F0, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006194F0, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE55D: [ (0x51) - INIT_CR_INDEX_ADDRESS_LATCHED ] [drm] nouveau 0000:02:00.0: 0xE55D: Index1: 0xA0, Index2: 0xA1, BaseAddr: 0x08, Count: 0x02 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194A0, Data: 0x10000000 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x08 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194A0, Data: 0x10000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006194A0, Data: 0x10000008 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA1, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194A0, Data: 0x10000008 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006194A0, Data: 0x10000008 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x09 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194A0, Data: 0x10000008 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006194A0, Data: 0x10000009 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA1, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194A0, Data: 0x10000009 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006194A0, Data: 0x10000009 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194A0, Data: 0x10000009 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006194A0, Data: 0x10000000 [drm] nouveau 0000:02:00.0: 0xE564: [ (0x51) - INIT_CR_INDEX_ADDRESS_LATCHED ] [drm] nouveau 0000:02:00.0: 0xE564: Index1: 0xA0, Index2: 0xA1, BaseAddr: 0x18, Count: 0x02 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194A0, Data: 0x10000000 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x18 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194A0, Data: 0x10000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006194A0, Data: 0x10000018 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA1, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194A0, Data: 0x10000018 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006194A0, Data: 0x10000018 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x19 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194A0, Data: 0x10000018 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006194A0, Data: 0x10000019 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA1, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194A0, Data: 0x10000019 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006194A0, Data: 0x10000019 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194A0, Data: 0x10000019 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006194A0, Data: 0x10000000 [drm] nouveau 0000:02:00.0: 0xE56B: [ (0x52) - INIT_CR ] [drm] nouveau 0000:02:00.0: 0xE56B: Index: 0x88, Mask: 0xBF, Data: 0x40 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x07 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x47 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000007 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00619488, Data: 0x0F000047 [drm] nouveau 0000:02:00.0: 0xE56F: [ (0x52) - INIT_CR ] [drm] nouveau 0000:02:00.0: 0xE56F: Index: 0x8A, Mask: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000047 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x8A, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0x8A, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000047 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00619488, Data: 0x0F000047 [drm] nouveau 0000:02:00.0: 0xE573: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0000E200, Data: 0x0003103C [drm] nouveau 0000:02:00.0: 0xE57C: [ (0x53) - INIT_ZM_CR ] [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0x30, Head: 0x00, Data: 0x10 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619430, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00619430, Data: 0x00000010 [drm] nouveau 0000:02:00.0: 0xE57F: [ (0x53) - INIT_ZM_CR ] [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0x31, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619430, Data: 0x00000010 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00619430, Data: 0x00000010 [drm] nouveau 0000:02:00.0: 0xE582: [ (0x53) - INIT_ZM_CR ] [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0xAA, Head: 0x00, Data: 0x00 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006194A8, Data: 0x00020000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006194A8, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE585: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: Parsing VBIOS init table 3 at offset 0xE636 [drm] nouveau 0000:02:00.0: 0xE636: ------ Executing following commands ------ [drm] nouveau 0000:02:00.0: 0xE636: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:02:00.0: 0xE636: Executing subroutine at 0xCBBC [drm] nouveau 0000:02:00.0: 0xCBBC: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: 0xE636: End of 0xCBBC subroutine [drm] nouveau 0000:02:00.0: 0xE639: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE639: Reg: 0x00100E04, Mask: 0xFFE0007F, Data: 0x00060C00 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00100E04, Data: 0x80040801 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100E04, Data: 0x80060C01 [drm] nouveau 0000:02:00.0: 0xE646: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE646: Reg: 0x00100E08, Mask: 0xF01FFFFF, Data: 0x04600000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00100E08, Data: 0x06610808 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100E08, Data: 0x04610808 [drm] nouveau 0000:02:00.0: 0xE653: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xE653: Sleeping for 0x03E8 microseconds [drm] nouveau 0000:02:00.0: 0xE656: [ (0x6B) - INIT_SUB ] [drm] nouveau 0000:02:00.0: 0xE656: Calling script 10 [drm] nouveau 0000:02:00.0: 0xBC80: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:02:00.0: 0xBC80: Condition: 0x0C [drm] nouveau 0000:02:00.0: 0xBC80: Cond: 0x0C, Reg: 0x00100200, Mask: 0x00000004 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00100200, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xBC80: Checking if 0x00000000 equals 0x00000004 [drm] nouveau 0000:02:00.0: 0xBC80: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:02:00.0: 0xBC82: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xBC8F: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xBC8F: ---- Executing following commands ---- [drm] nouveau 0000:02:00.0: 0xBC90: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xBC90: Reg: 0x001002C0, Mask: 0xFFFFFEFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x001002C0, Data: 0x00000772 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002C0, Data: 0x00000672 [drm] nouveau 0000:02:00.0: 0xBC9D: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:02:00.0: 0xBC9D: Condition: 0x0C [drm] nouveau 0000:02:00.0: 0xBC9D: Cond: 0x0C, Reg: 0x00100200, Mask: 0x00000004 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00100200, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xBC9D: Checking if 0x00000000 equals 0x00000004 [drm] nouveau 0000:02:00.0: 0xBC9D: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:02:00.0: 0xBC9F: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xBCAC: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xBCAC: ---- Executing following commands ---- [drm] nouveau 0000:02:00.0: 0xBCAD: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xBCAD: Reg: 0x001002C0, Mask: 0xFFFFFFFF, Data: 0x00000100 [drm] nouveau 0000:02:00.0: Read: Reg: 0x001002C0, Data: 0x00000672 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002C0, Data: 0x00000772 [drm] nouveau 0000:02:00.0: 0xBCBA: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:02:00.0: 0xBCBA: Sleeping for 0x0028 microseconds [drm] nouveau 0000:02:00.0: 0xBCBD: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:02:00.0: 0xBCBD: Condition: 0x0C [drm] nouveau 0000:02:00.0: 0xBCBD: Cond: 0x0C, Reg: 0x00100200, Mask: 0x00000004 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00100200, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xBCBD: Checking if 0x00000000 equals 0x00000004 [drm] nouveau 0000:02:00.0: 0xBCBD: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:02:00.0: 0xBCBF: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xBCCC: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xBCCC: ---- Executing following commands ---- [drm] nouveau 0000:02:00.0: 0xBCCD: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xBCCD: Reg: 0x001002C0, Mask: 0xFFFFFEFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x001002C0, Data: 0x00000772 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002C0, Data: 0x00000672 [drm] nouveau 0000:02:00.0: 0xBCDA: [ (0x39) - INIT_IO_FLAG_CONDITION ] [drm] nouveau 0000:02:00.0: 0xBCDA: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, FlagArray: 0xBC78, FAMask: 0x80, Cmpval: 0x80 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000047 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x47 [drm] nouveau 0000:02:00.0: 0xBCDA: Checking if 0x00 equals 0x80 [drm] nouveau 0000:02:00.0: 0xBCDA: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:02:00.0: 0xBCDC: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xBCE5: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xBCEE: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xBCF7: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xBD00: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xBD09: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: 0xBD12: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xBD12: ---- Executing following commands ---- [drm] nouveau 0000:02:00.0: 0xBD13: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: 0xE656: End of script 10 [drm] nouveau 0000:02:00.0: 0xE658: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE658: Macro: 0x00, MacroTableIndex: 0x00, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D4, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE65A: [ (0x33) - INIT_REPEAT ] [drm] nouveau 0000:02:00.0: 0xE65A: Repeating following segment 10 times [drm] nouveau 0000:02:00.0: 0xE65C: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE65C: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE65E: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xE65C: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE65C: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE65E: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xE65C: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE65C: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE65E: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xE65C: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE65C: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE65E: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xE65C: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE65C: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE65E: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xE65C: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE65C: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE65E: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xE65C: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE65C: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE65E: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xE65C: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE65C: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE65E: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xE65C: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE65C: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE65E: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xE65C: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE65C: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE65E: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:02:00.0: 0xE65F: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE65F: Macro: 0x00, MacroTableIndex: 0x00, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D4, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE661: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE661: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE663: [ (0x6F) - INIT_MACRO ] [drm] nouveau 0000:02:00.0: 0xE663: Macro: 0x01, MacroTableIndex: 0x01, Count: 0x01 [drm] nouveau 0000:02:00.0: Write: Reg: 0x001002D0, Data: 0x00000001 [drm] nouveau 0000:02:00.0: 0xE665: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100210, Data: 0x80000001 [drm] nouveau 0000:02:00.0: 0xE66E: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE66E: Reg: 0x00100200, Mask: 0xFFFFF7FF, Data: 0x00000800 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00100200, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100200, Data: 0x00000800 [drm] nouveau 0000:02:00.0: 0xE67B: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100678, Data: 0x58805880 [drm] nouveau 0000:02:00.0: 0xE684: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100B08, Data: 0x000003FF [drm] nouveau 0000:02:00.0: 0xE68D: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE68D: Reg: 0x00100600, Mask: 0xFFFFFFFF, Data: 0x00004000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00100600, Data: 0x97030610 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100600, Data: 0x97034610 [drm] nouveau 0000:02:00.0: 0xE69A: [ (0x63) - INIT_COMPUTE_MEM ] [drm] nouveau 0000:02:00.0: 0xE69B: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00612000, Data: 0x00000210 [drm] nouveau 0000:02:00.0: 0xE6A4: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614000, Data: 0x00000210 [drm] nouveau 0000:02:00.0: 0xE6AD: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614100, Data: 0x10000000 [drm] nouveau 0000:02:00.0: 0xE6B6: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614900, Data: 0x10000000 [drm] nouveau 0000:02:00.0: 0xE6BF: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614110, Data: 0x0005003A [drm] nouveau 0000:02:00.0: 0xE6C8: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614114, Data: 0x50070012 [drm] nouveau 0000:02:00.0: 0xE6D1: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614120, Data: 0x00450800 [drm] nouveau 0000:02:00.0: 0xE6DA: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614920, Data: 0x00450800 [drm] nouveau 0000:02:00.0: 0xE6E3: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614124, Data: 0x00040000 [drm] nouveau 0000:02:00.0: 0xE6EC: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00614924, Data: 0x00040000 [drm] nouveau 0000:02:00.0: 0xE6F5: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A008, Data: 0x03A502D1 [drm] nouveau 0000:02:00.0: 0xE6FE: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A178, Data: 0x0E08C28C [drm] nouveau 0000:02:00.0: 0xE707: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A1B8, Data: 0x0E08C28C [drm] nouveau 0000:02:00.0: 0xE710: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A1F8, Data: 0x8BC8927C [drm] nouveau 0000:02:00.0: 0xE719: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A238, Data: 0x0E08C28C [drm] nouveau 0000:02:00.0: 0xE722: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A2B8, Data: 0x8BC8927C [drm] nouveau 0000:02:00.0: 0xE72B: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A338, Data: 0x000BD234 [drm] nouveau 0000:02:00.0: 0xE734: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE734: Reg: 0x0061A148, Mask: 0xFF00FFFF, Data: 0x00150000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061A148, Data: 0x4015020D [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A148, Data: 0x4015020D [drm] nouveau 0000:02:00.0: 0xE741: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE741: Reg: 0x0061A188, Mask: 0xFF00FFFF, Data: 0x00150000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061A188, Data: 0x4015020D [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A188, Data: 0x4015020D [drm] nouveau 0000:02:00.0: 0xE74E: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE74E: Reg: 0x0061A1C8, Mask: 0xFF00FFFF, Data: 0x00170000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061A1C8, Data: 0x0C170271 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A1C8, Data: 0x0C170271 [drm] nouveau 0000:02:00.0: 0xE75B: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE75B: Reg: 0x0061A208, Mask: 0xFF00FFFF, Data: 0x00150000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061A208, Data: 0x4415020D [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A208, Data: 0x4415020D [drm] nouveau 0000:02:00.0: 0xE768: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE768: Reg: 0x0061A288, Mask: 0xFF00FFFF, Data: 0x00170000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061A288, Data: 0x0C170271 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061A288, Data: 0x0C170271 [drm] nouveau 0000:02:00.0: 0xE775: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE775: Reg: 0x006165A4, Mask: 0xFFFFFF80, Data: 0x00000038 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006165A4, Data: 0x00020038 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006165A4, Data: 0x00020038 [drm] nouveau 0000:02:00.0: 0xE782: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE782: Reg: 0x00616DA4, Mask: 0xFFFFFF80, Data: 0x00000038 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00616DA4, Data: 0x00020038 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00616DA4, Data: 0x00020038 [drm] nouveau 0000:02:00.0: 0xE78F: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE78F: Reg: 0x0061F018, Mask: 0xFFFFFFF3, Data: 0x00000004 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061F018, Data: 0x00000302 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061F018, Data: 0x00000306 [drm] nouveau 0000:02:00.0: 0xE79C: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE79C: Reg: 0x00003310, Mask: 0xFFFFF8FF, Data: 0x00000300 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00003310, Data: 0x00000500 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00003310, Data: 0x00000300 [drm] nouveau 0000:02:00.0: 0xE7A9: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00617338, Data: 0x80000000 [drm] nouveau 0000:02:00.0: 0xE7B2: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061C080, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE7BB: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061C084, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE7C4: [ (0x53) - INIT_ZM_CR ] [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0x85, Head: 0x00, Data: 0xFF [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619484, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00619484, Data: 0x0000FF00 [drm] nouveau 0000:02:00.0: 0xE7C7: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE7C7: Reg: 0x006105D4, Mask: 0xFFFFFFE0, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006105D4, Data: 0x0000001F [drm] nouveau 0000:02:00.0: Write: Reg: 0x006105D4, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE7D4: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE7D4: Reg: 0x006105D8, Mask: 0xFFFFFFE0, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006105D8, Data: 0x0000001F [drm] nouveau 0000:02:00.0: Write: Reg: 0x006105D8, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE7E1: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE7E1: Reg: 0x006105DC, Mask: 0xF8000000, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x006105DC, Data: 0x07F70003 [drm] nouveau 0000:02:00.0: Write: Reg: 0x006105DC, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE7EE: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE7EE: Reg: 0x0008814C, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0008814C, Data: 0x0300001B [drm] nouveau 0000:02:00.0: Write: Reg: 0x0008814C, Data: 0x0300001B [drm] nouveau 0000:02:00.0: 0xE7FB: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x00100DC0, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE804: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x000010A0, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE80D: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE80D: Reg: 0x00001090, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00001090, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00001090, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE81A: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE81A: Reg: 0x00001090, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00001090, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00001090, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE827: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:02:00.0: Write: Reg: 0x000010A0, Data: 0x00000000 [drm] nouveau 0000:02:00.0: 0xE830: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE830: Reg: 0x00088150, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00088150, Data: 0x6000FE15 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00088150, Data: 0x6000FE15 [drm] nouveau 0000:02:00.0: 0xE83D: [ (0x52) - INIT_CR ] [drm] nouveau 0000:02:00.0: 0xE83D: Index: 0x88, Mask: 0x7F, Data: 0x80 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000047 [drm] nouveau 0000:02:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0x47 [drm] nouveau 0000:02:00.0: Indexed IO write: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0xC7 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00619488, Data: 0x0F000047 [drm] nouveau 0000:02:00.0: Write: Reg: 0x00619488, Data: 0x0F0000C7 [drm] nouveau 0000:02:00.0: 0xE841: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: Parsing VBIOS init table 4 at offset 0xE842 [drm] nouveau 0000:02:00.0: 0xE842: ------ Executing following commands ------ [drm] nouveau 0000:02:00.0: 0xE842: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: Parsing VBIOS init table at offset 0xE8A7 [drm] nouveau 0000:02:00.0: 0xE8A7: [ (0x56) - INIT_CONDITION_TIME ] [drm] nouveau 0000:02:00.0: 0xE8A7: Condition: 0x01, Retries: 0x64 [drm] nouveau 0000:02:00.0: 0xE8A7: Cond: 0x01, Reg: 0x0061000C, Mask: 0x80000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061000C, Data: 0x80000000 [drm] nouveau 0000:02:00.0: 0xE8A7: Checking if 0x80000000 equals 0x80000000 [drm] nouveau 0000:02:00.0: 0xE8A7: Condition met, continuing [drm] nouveau 0000:02:00.0: 0xE8A7: Cond: 0x01, Reg: 0x0061000C, Mask: 0x80000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061000C, Data: 0x80000000 [drm] nouveau 0000:02:00.0: 0xE8A7: Checking if 0x80000000 equals 0x80000000 [drm] nouveau 0000:02:00.0: 0xE8AA: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xE8AB: [ (0x5F) - INIT_COPY_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE8AB: SrcReg: 0x00610000, Shift: 0x00, SrcMask: 0x0000FFFF, Xor: 0x00000000, DstReg: 0x0061000C, DstMask: 0xFFFF0000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x00610000, Data: 0x887D0140 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061000C, Data: 0x80000000 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061000C, Data: 0x80000140 [drm] nouveau 0000:02:00.0: 0xE8C1: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:02:00.0: 0xE8C1: Reg: 0x0061000C, Mask: 0xBFFFFFFF, Data: 0x40000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061000C, Data: 0x80000140 [drm] nouveau 0000:02:00.0: Write: Reg: 0x0061000C, Data: 0xC0000140 [drm] nouveau 0000:02:00.0: 0xE8CE: [ (0x56) - INIT_CONDITION_TIME ] [drm] nouveau 0000:02:00.0: 0xE8CE: Condition: 0x02, Retries: 0x64 [drm] nouveau 0000:02:00.0: 0xE8CE: Cond: 0x02, Reg: 0x0061000C, Mask: 0x40000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061000C, Data: 0xC0000140 [drm] nouveau 0000:02:00.0: 0xE8CE: Checking if 0x40000000 equals 0x00000000 [drm] nouveau 0000:02:00.0: 0xE8CE: Condition not met, sleeping for 20ms [drm] nouveau 0000:02:00.0: 0xE8CE: Cond: 0x02, Reg: 0x0061000C, Mask: 0x40000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061000C, Data: 0x80000140 [drm] nouveau 0000:02:00.0: 0xE8CE: Checking if 0x00000000 equals 0x00000000 [drm] nouveau 0000:02:00.0: 0xE8CE: Condition met, continuing [drm] nouveau 0000:02:00.0: 0xE8CE: Cond: 0x02, Reg: 0x0061000C, Mask: 0x40000000 [drm] nouveau 0000:02:00.0: Read: Reg: 0x0061000C, Data: 0x80000140 [drm] nouveau 0000:02:00.0: 0xE8CE: Checking if 0x00000000 equals 0x00000000 [drm] nouveau 0000:02:00.0: 0xE8D1: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:02:00.0: 0xE8D2: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: Searching for output entry for 0 0 2 [drm] nouveau 0000:02:00.0: output script 0 not found [drm] nouveau 0000:02:00.0: Read: Reg: 0x00101000, Data: 0x8F44A01C [drm] nouveau 0000:02:00.0: Detected 256MiB VRAM [drm] nouveau 0000:02:00.0: nouveau_gpuobj_early_init:280 - [drm] nouveau 0000:02:00.0: nv50_instmem_init:90 - Rsvd VRAM base: 0x0ff00000 [drm] nouveau 0000:02:00.0: nv50_instmem_init:92 - VBIOS image: 0x00000000 [drm] nouveau 0000:02:00.0: nv50_instmem_init:93 - Aperture size: 32 MiB [drm] nouveau 0000:02:00.0: nv50_instmem_init:94 - PT size: 64 KiB [drm] nouveau 0000:02:00.0: nv50_instmem_init:113 - NV50VM: GART 0x0000000020000000-0x000000003fffffff [drm] nouveau 0000:02:00.0: nv50_instmem_init:116 - NV50VM: VRAM 0x0000000040000000-0x000000005fffffff [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new_fake:562 - p_offset=0x00000000 b_offset=0x0ff00000 size=0x00030000 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new_fake:567 - gpuobj ffff88015a572b40 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572b40 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new_fake:562 - p_offset=0x00000020 b_offset=0x0ff00020 size=0x00004000 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new_fake:567 - gpuobj ffff88015a572c00 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572c00 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new_fake:562 - p_offset=0x00000200 b_offset=0x0ff00200 size=0x00004000 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new_fake:567 - gpuobj ffff88015a572ba0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch0 size=65536 align=4096 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572c60 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572c60 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch0 size=65536 align=0 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572cc0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572cc0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch0 size=24 align=16 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572d20 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch0 h=0x00000000 gpuobj=ffff88015a572d20 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch0 size=24 align=16 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572d80 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch0 h=0x00000000 gpuobj=ffff88015a572d80 [TTM] Zone kernel: Available graphics memory: 1897374 kiB. [TTM] Initializing pool allocator. [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch-1 size=1048576 align=16 flags=0x00000007 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015c2eef00 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:235 - global heap [drm] nouveau 0000:02:00.0: nv50_instmem_bind:435 - st=0x30000 sz=0x100000 [drm] nouveau 0000:02:00.0: nv50_instmem_bind:442 - pramin=0x30000, pte=96, pte_end=608 [drm] nouveau 0000:02:00.0: nv50_instmem_bind:443 - first vram page: 0x00040000 [drm] nouveau 0000:02:00.0: 512 MiB GART (aperture) mtrr: type mismatch for d0000000,10000000 old: write-back new: write-combining [drm] nouveau 0000:02:00.0: nouveau_gpuobj_init:293 - [drm] nouveau 0000:02:00.0: nv50_graph_init:143 - [drm] nouveau 0000:02:00.0: nv50_graph_init_reset:38 - [drm] nouveau 0000:02:00.0: nv50_graph_init_regs__nv:61 - [drm] nouveau 0000:02:00.0: nv50_graph_init_regs:93 - [drm] nouveau 0000:02:00.0: nv50_graph_init_intr:47 - [drm] nouveau 0000:02:00.0: nv50_graph_init_ctxctl:108 - [drm] nouveau 0000:02:00.0: nv50_fifo_init:159 - [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch-1 size=512 align=4096 flags=0x00000002 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015c2ee1e0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:235 - global heap [drm] nouveau 0000:02:00.0: nv50_instmem_bind:435 - st=0x130000 sz=0x1000 [drm] nouveau 0000:02:00.0: nv50_instmem_bind:442 - pramin=0x130000, pte=608, pte_end=610 [drm] nouveau 0000:02:00.0: nv50_instmem_bind:443 - first vram page: 0x00140000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015c2ee1e0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch-1 size=512 align=4096 flags=0x00000002 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015c2eed20 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:235 - global heap [drm] nouveau 0000:02:00.0: nv50_instmem_bind:435 - st=0x131000 sz=0x1000 [drm] nouveau 0000:02:00.0: nv50_instmem_bind:442 - pramin=0x131000, pte=610, pte_end=612 [drm] nouveau 0000:02:00.0: nv50_instmem_bind:443 - first vram page: 0x00150000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015c2eed20 [drm] nouveau 0000:02:00.0: nv50_fifo_init_reset:94 - [drm] nouveau 0000:02:00.0: nv50_fifo_init_intr:103 - [drm] nouveau 0000:02:00.0: nv50_fifo_init_context_table:115 - [drm] nouveau 0000:02:00.0: nv50_fifo_channel_enable:63 - ch0 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch1 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch2 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch3 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch4 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch5 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch6 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch7 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch8 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch9 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch10 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch11 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch12 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch13 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch14 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch15 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch16 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch17 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch18 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch19 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch20 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch21 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch22 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch23 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch24 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch25 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch26 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch27 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch28 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch29 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch30 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch31 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch32 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch33 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch34 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch35 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch36 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch37 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch38 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch39 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch40 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch41 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch42 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch43 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch44 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch45 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch46 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch47 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch48 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch49 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch50 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch51 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch52 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch53 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch54 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch55 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch56 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch57 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch58 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch59 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch60 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch61 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch62 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch63 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch64 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch65 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch66 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch67 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch68 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch69 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch70 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch71 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch72 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch73 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch74 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch75 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch76 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch77 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch78 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch79 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch80 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch81 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch82 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch83 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch84 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch85 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch86 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch87 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch88 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch89 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch90 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch91 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch92 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch93 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch94 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch95 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch96 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch97 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch98 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch99 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch100 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch101 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch102 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch103 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch104 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch105 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch106 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch107 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch108 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch109 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch110 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch111 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch112 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch113 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch114 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch115 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch116 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch117 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch118 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch119 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch120 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch121 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch122 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch123 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch124 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch125 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_disable:80 - ch126 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_enable:63 - ch127 [drm] nouveau 0000:02:00.0: nv50_fifo_playlist_update:39 - [drm] nouveau 0000:02:00.0: nv50_fifo_init_regs__nv:130 - [drm] nouveau 0000:02:00.0: nv50_fifo_init_regs:138 - [drm] nouveau 0000:02:00.0: nv50_fifo_channel_enable:63 - ch0 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_enable:63 - ch127 [drm] nouveau 0000:02:00.0: nv50_display_create:472 - [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch-1 size=32768 align=4096 flags=0x00000002 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9120 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:235 - global heap [drm] nouveau 0000:02:00.0: nv50_instmem_bind:435 - st=0x132000 sz=0x8000 [drm] nouveau 0000:02:00.0: nv50_instmem_bind:442 - pramin=0x132000, pte=612, pte_end=628 [drm] nouveau 0000:02:00.0: nv50_instmem_bind:443 - first vram page: 0x00160000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015b1e9120 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch-1 size=4096 align=16 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9180 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015b1e9180 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch-1 size=24 align=32 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e91e0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x01000001 gpuobj=ffff88015b1e91e0 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:75 - ch-1 handle=0x01000001 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000208 [drm] nouveau 0000:02:00.0: nouveau_ramht_insert:140 - insert ch-1 0x00000208: h=0x01000001, c=0x00400002 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch-1 size=24 align=32 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9240 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x01000002 gpuobj=ffff88015b1e9240 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:75 - ch-1 handle=0x01000002 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000210 [drm] nouveau 0000:02:00.0: nouveau_ramht_insert:140 - insert ch-1 0x00000210: h=0x01000002, c=0x00408002 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch-1 size=24 align=32 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e92a0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x01000000 gpuobj=ffff88015b1e92a0 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:75 - ch-1 handle=0x01000000 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000200 [drm] nouveau 0000:02:00.0: nouveau_ramht_insert:140 - insert ch-1 0x00000200: h=0x01000000, c=0x00410002 [drm] nouveau 0000:02:00.0: nv50_crtc_create:714 - [drm] nouveau 0000:02:00.0: nv50_crtc_create:714 - [drm] nouveau 0000:02:00.0: nouveau_connector_create:739 - [drm] nouveau 0000:02:00.0: nv50_display_init:206 - [drm] nouveau 0000:02:00.0: nv50_display_init:250 - ram_amount 268435456 [drm] nouveau 0000:02:00.0: Allocating FIFO number 1 [drm] nouveau 0000:02:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:02:00.0: nouveau_sgdma_bind:98 - pg=0x0 [drm] nouveau 0000:02:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:02:00.0: nouveau_sgdma_bind:98 - pg=0x10 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_channel_init:944 - ch1 vram=0x80000002 tt=0x80000003 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_channel_init_pramin:894 - ch1 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch-1 size=439296 align=4096 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9420 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:235 - global heap [drm] nouveau 0000:02:00.0: nv50_instmem_bind:435 - st=0x13a000 sz=0x6c000 [drm] nouveau 0000:02:00.0: nv50_instmem_bind:442 - pramin=0x13a000, pte=628, pte_end=844 [drm] nouveau 0000:02:00.0: nv50_instmem_bind:443 - first vram page: 0x001c0000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015b1e9420 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new_fake:562 - p_offset=0x0013a200 b_offset=0xffffffff size=0x00004000 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new_fake:567 - gpuobj ffff88015b1e9480 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015c2eef00 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572cc0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch1 size=32768 align=16 flags=0x00000002 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e94e0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x00000000 gpuobj=ffff88015b1e94e0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_dma_new:660 - ch1 class=0x003d offset=0x0 size=0x60000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=3 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9540 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000002 gpuobj=ffff88015b1e9540 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000002 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000090 [drm] nouveau 0000:02:00.0: nouveau_ramht_insert:140 - insert ch1 0x00000090: h=0x80000002, c=0x00000e00 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000003 gpuobj=ffff88015b1e9540 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000003 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000098 [drm] nouveau 0000:02:00.0: nouveau_ramht_insert:140 - insert ch1 0x00000098: h=0x80000003, c=0x00000e00 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_dma_new:660 - ch1 class=0x003d offset=0x0 size=0x60000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_dma_new:661 - access=1 target=3 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e95a0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x00000000 gpuobj=ffff88015b1e95a0 [drm] nouveau 0000:02:00.0: nv50_graph_create_context:213 - ch1 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch1 size=376832 align=4096 flags=0x00000006 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9600 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015b1e9600 [drm] nouveau 0000:02:00.0: nv50_fifo_create_context:226 - ch1 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch1 size=256 align=256 flags=0x00000006 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9660 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015b1e9660 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch1 size=4096 align=1024 flags=0x00000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e96c0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015b1e96c0 [drm] nouveau 0000:02:00.0: nv50_fifo_channel_enable:63 - ch1 [drm] nouveau 0000:02:00.0: nv50_fifo_playlist_update:39 - [drm] nouveau 0000:02:00.0: nouveau_gpuobj_gr_new:819 - ch1 class=0x5039 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9720 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000001 gpuobj=ffff88015b1e9720 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000001 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000088 [drm] nouveau 0000:02:00.0: nouveau_ramht_insert:140 - insert ch1 0x00000088: h=0x80000001, c=0x00100e04 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x8000000e gpuobj=ffff88015b1e9780 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x8000000e [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000f0 [drm] nouveau 0000:02:00.0: nouveau_ramht_insert:140 - insert ch1 0x000000f0: h=0x8000000e, c=0x00000004 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_dma_new:660 - ch1 class=0x003d offset=0x20010000 size=0x20 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=3 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e97e0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000006 gpuobj=ffff88015b1e97e0 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000006 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000b0 [drm] nouveau 0000:02:00.0: nouveau_ramht_insert:140 - insert ch1 0x000000b0: h=0x80000006, c=0x00000e06 [drm] nouveau 0000:02:00.0: nouveau_channel_alloc: initialised FIFO 1 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_dma_new:660 - ch1 class=0x003d offset=0x0 size=0x10000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9840 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000004 gpuobj=ffff88015b1e9840 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000004 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000a0 [drm] nouveau 0000:02:00.0: nouveau_ramht_insert:140 - insert ch1 0x000000a0: h=0x80000004, c=0x00000e08 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_dma_new:660 - ch1 class=0x003d offset=0x20000000 size=0x20000000 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=3 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e98a0 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000005 gpuobj=ffff88015b1e98a0 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000005 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000a8 [drm] nouveau 0000:02:00.0: nouveau_ramht_insert:140 - insert ch1 0x000000a8: h=0x80000005, c=0x00000e0a [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:VGA-1] [drm] nouveau 0000:02:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 295 [drm] nouveau 0000:02:00.0: nv50_dac_detect:115 - Load was detected on output with or 1 [drm] nouveau 0000:02:00.0: nouveau_connector_native_mode:478 - native mode from largest: 0x0@0 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:VGA-1] probed modes : [drm:drm_mode_debug_printmodeline], Modeline 13:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [drm:drm_mode_debug_printmodeline], Modeline 11:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 [drm:drm_mode_debug_printmodeline], Modeline 10:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5 [drm:drm_mode_debug_printmodeline], Modeline 12:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5 [drm:drm_mode_debug_printmodeline], Modeline 9:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa [drm:drm_setup_crtcs], [drm:drm_enable_connectors], connector 7 enabled? yes [drm:drm_target_preferred], looking for cmdline mode on connector 7 [drm:drm_target_preferred], looking for preferred mode on connector 7 [drm:drm_target_preferred], found mode 1024x768 [drm:drm_setup_crtcs], picking CRTCs for 8192x8192 config [drm:drm_setup_crtcs], desired mode 1024x768 set on crtc 5 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_gr_new:819 - ch1 class=0x502d [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9900 [drm] nouveau 0000:02:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:02:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000007 gpuobj=ffff88015b1e9900 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000007 [drm] nouveau 0000:02:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000b8 [drm] nouveau 0000:02:00.0: nouveau_ramht_insert:140 - insert ch1 0x000000b8: h=0x80000007, c=0x00100e0c [drm] nouveau 0000:02:00.0: allocated 1024x768 fb: 0x40230000, bo ffff8801588cbc00 [drm:drm_crtc_helper_set_config], [drm:drm_crtc_helper_set_config], [CRTC:5] [FB:15] #connectors=1 (x y) (0 0) [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set [drm:drm_crtc_helper_set_config], modes are different, full mode set [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 [drm:drm_mode_debug_printmodeline], Modeline 14:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [drm:drm_crtc_helper_set_config], encoder changed, full mode switch [drm:drm_crtc_helper_set_config], crtc changed, full mode switch [drm:drm_crtc_helper_set_config], [CONNECTOR:7:VGA-1] to [CRTC:5] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace [drm:drm_mode_debug_printmodeline], Modeline 14:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa [drm] nouveau 0000:02:00.0: nv50_dac_mode_fixup:185 - or 1 [drm:drm_crtc_helper_set_mode], [CRTC:5] [drm] nouveau 0000:02:00.0: nv50_crtc_prepare:458 - index 0 [drm] nouveau 0000:02:00.0: nv50_crtc_blank:71 - index 0 [drm] nouveau 0000:02:00.0: nv50_crtc_blank:72 - blanked [drm] nouveau 0000:02:00.0: nv50_cursor_hide:79 - [drm] nouveau 0000:02:00.0: nv50_crtc_mode_set:620 - index 0 [drm] nouveau 0000:02:00.0: nv50_crtc_set_dither:142 - [drm] nouveau 0000:02:00.0: nv50_crtc_set_scale:196 - [drm] nouveau 0000:02:00.0: nv50_crtc_do_mode_set_base:505 - index 0 [drm] nouveau 0000:02:00.0: nv50_crtc_lut_load:48 - [drm:drm_crtc_helper_set_mode], [ENCODER:8:DAC-8] set [MODE:14:1024x768] [drm] nouveau 0000:02:00.0: nv50_dac_mode_set:226 - or 1 type 0 crtc 0 [drm] nouveau 0000:02:00.0: nv50_dac_dpms:130 - or 1 mode 0 [drm] nouveau 0000:02:00.0: nv50_crtc_commit:472 - index 0 [drm] nouveau 0000:02:00.0: nv50_crtc_blank:71 - index 0 [drm] nouveau 0000:02:00.0: nv50_crtc_blank:72 - unblanked [drm] nouveau 0000:02:00.0: nv50_cursor_hide:79 - [drm:drm_crtc_helper_set_config], [drm:drm_crtc_helper_set_config], [CRTC:6] [FB:15] #connectors=0 (x y) (0 0) [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set [drm:drm_crtc_helper_set_config], [CONNECTOR:7:VGA-1] to [CRTC:5] [drm:drm_crtc_helper_set_config], [drm:drm_crtc_helper_set_config], [CRTC:5] [FB:15] #connectors=1 (x y) (0 0) [drm:drm_crtc_helper_set_config], [CONNECTOR:7:VGA-1] to [CRTC:5] [drm] nouveau 0000:02:00.0: nv50_crtc_lut_load:48 - [drm] nouveau 0000:02:00.0: nv50_crtc_lut_load:48 - [drm] nouveau 0000:02:00.0: nv50_display_irq_handler:1084 - PDISPLAY_INTR 0x00000000 0x00000010 [drm] nouveau 0000:02:00.0: nv50_display_irq_handler:1084 - PDISPLAY_INTR 0x00000000 0x00000010 [drm] nouveau 0000:02:00.0: nv50_display_irq_handler_bh:974 - PDISPLAY_INTR_BH 0x00000000 0x00000010 [drm] nouveau 0000:02:00.0: nv50_display_unk10_handler:678 - 0x610030: 0x000002a0 [drm] nouveau 0000:02:00.0: nv50_display_unk10_handler:698 - DAC-0 mc: 0x00000000 [drm] nouveau 0000:02:00.0: nv50_display_unk10_handler:698 - DAC-1 mc: 0x00000000 [drm] nouveau 0000:02:00.0: nv50_display_unk10_handler:698 - DAC-2 mc: 0x00000000 [drm] nouveau 0000:02:00.0: nv50_display_unk10_handler:721 - SOR-0 mc: 0x00000000 [drm] nouveau 0000:02:00.0: nv50_display_unk10_handler:721 - SOR-1 mc: 0x00000000 [drm] nouveau 0000:02:00.0: nv50_display_unk10_handler:721 - SOR-2 mc: 0x00000000 [drm] nouveau 0000:02:00.0: nv50_display_unk10_handler:721 - SOR-3 mc: 0x00000000 [drm] nouveau 0000:02:00.0: nv50_display_irq_handler_bh:974 - PDISPLAY_INTR_BH 0x00000000 0x00000000 [drm] nouveau 0000:02:00.0: nv50_display_irq_handler:1084 - PDISPLAY_INTR 0x00000000 0x00000020 [drm] nouveau 0000:02:00.0: nv50_display_irq_handler:1084 - PDISPLAY_INTR 0x00000000 0x00000020 [drm] nouveau 0000:02:00.0: nv50_display_irq_handler_bh:974 - PDISPLAY_INTR_BH 0x00000000 0x00000020 [drm] nouveau 0000:02:00.0: nv50_display_unk20_handler:800 - 0x610030: 0x000002b0 [drm] nouveau 0000:02:00.0: Loading PLL limits for reg 0x00614100 [drm] nouveau 0000:02:00.0: pll.vco1.minfreq: 250000 [drm] nouveau 0000:02:00.0: pll.vco1.maxfreq: 500000 [drm] nouveau 0000:02:00.0: pll.vco1.min_inputfreq: 4000 [drm] nouveau 0000:02:00.0: pll.vco1.max_inputfreq: 27000 [drm] nouveau 0000:02:00.0: pll.vco1.min_n: 20 [drm] nouveau 0000:02:00.0: pll.vco1.max_n: 255 [drm] nouveau 0000:02:00.0: pll.vco1.min_m: 1 [drm] nouveau 0000:02:00.0: pll.vco1.max_m: 2 [drm] nouveau 0000:02:00.0: pll.vco2.minfreq: 500000 [drm] nouveau 0000:02:00.0: pll.vco2.maxfreq: 1000000 [drm] nouveau 0000:02:00.0: pll.vco2.min_inputfreq: 14000 [drm] nouveau 0000:02:00.0: pll.vco2.max_inputfreq: 75000 [drm] nouveau 0000:02:00.0: pll.vco2.min_n: 14 [drm] nouveau 0000:02:00.0: pll.vco2.max_n: 255 [drm] nouveau 0000:02:00.0: pll.vco2.min_m: 1 [drm] nouveau 0000:02:00.0: pll.vco2.max_m: 255 [drm] nouveau 0000:02:00.0: pll.max_log2p: 6 [drm] nouveau 0000:02:00.0: pll.log2p_bias: 0 [drm] nouveau 0000:02:00.0: pll.refclk: 27000 [drm] nouveau 0000:02:00.0: nv50_crtc_set_clock:287 - pclk 65000 out 65025 NM1 34 2 NM2 17 15 P 3 [drm] nouveau 0000:02:00.0: nv50_display_unk20_handler:829 - DAC-0 mc: 0x00000000 [drm] nouveau 0000:02:00.0: nv50_display_unk20_handler:829 - DAC-1 mc: 0x00000041 [drm] nouveau 0000:02:00.0: Searching for output entry for 0 0 2 [drm] nouveau 0000:02:00.0: 0x1201: parsing clock script 0 [drm] nouveau 0000:02:00.0: 0x1201: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:02:00.0: nv50_display_irq_handler_bh:974 - PDISPLAY_INTR_BH 0x00000000 0x00000000 [drm] nouveau 0000:02:00.0: nv50_display_irq_handler:1084 - PDISPLAY_INTR 0x00000000 0x00000044 [drm] nouveau 0000:02:00.0: nv50_display_irq_handler:1084 - PDISPLAY_INTR 0x00000000 0x00000040 [drm] nouveau 0000:02:00.0: nv50_display_irq_handler_bh:974 - PDISPLAY_INTR_BH 0x00000000 0x00000040 [drm] nouveau 0000:02:00.0: nv50_display_unk40_handler:949 - 0x610030: 0x000002b0 [drm] nouveau 0000:02:00.0: Searching for output entry for 0 0 2 [drm] nouveau 0000:02:00.0: clock script 1 not found [drm] nouveau 0000:02:00.0: nv50_display_irq_handler_bh:974 - PDISPLAY_INTR_BH 0x00000000 0x00000000 Console: switching to colour frame buffer device 128x48 [drm:drm_crtc_helper_set_config], [drm:drm_crtc_helper_set_config], [CRTC:5] [FB:15] #connectors=1 (x y) (0 0) [drm:drm_crtc_helper_set_config], [CONNECTOR:7:VGA-1] to [CRTC:5] [drm] nouveau 0000:02:00.0: nv50_crtc_lut_load:48 - [drm] nouveau 0000:02:00.0: nv50_crtc_lut_load:48 - fb0: nouveaufb frame buffer device drm: registered panic notifier [drm] Initialized nouveau 0.0.16 20090420 for 0000:02:00.0 on minor 0 ACPI: PCI Interrupt Link [LGPU] enabled at IRQ 18 nouveau 0000:03:00.0: PCI INT A -> Link[LGPU] -> GSI 18 (level, low) -> IRQ 18 nouveau 0000:03:00.0: setting latency timer to 64 [drm] nouveau 0000:03:00.0: nouveau_load:800 - vendor: 0x10DE device: 0x866 class: 0x30000 [drm] nouveau 0000:03:00.0: nouveau_load:823 - regs mapped ok at 0xaa000000 [drm] nouveau 0000:03:00.0: Detected an NV50 generation card (0x0ac300b1) vga_switcheroo: enabled [drm] nouveau 0000:03:00.0: Attempting to load BIOS image from PRAMIN [drm] nouveau 0000:03:00.0: ... appears to be valid [drm] nouveau 0000:03:00.0: BIT BIOS found [drm] nouveau 0000:03:00.0: Bios version 62.79.3f.00 [drm] nouveau 0000:03:00.0: TMDS table version 2.0 [drm] nouveau 0000:03:00.0: Found Display Configuration Block version 4.0 [drm] nouveau 0000:03:00.0: Raw DCB entry 0: 01020323 00010034 [drm] nouveau 0000:03:00.0: Raw DCB entry 1: 02001300 0000001e [drm] nouveau 0000:03:00.0: Raw DCB entry 2: 02012386 0f200010 [drm] nouveau 0000:03:00.0: Raw DCB entry 3: 02012332 00020010 [drm] nouveau 0000:03:00.0: Raw DCB entry 4: 0000000e 00000000 [drm] nouveau 0000:03:00.0: DCB connector table: VHER 0x40 5 16 4 [drm] nouveau 0000:03:00.0: 0: 0x00000040: type 0x40 idx 0 tag 0xff [drm] nouveau 0000:03:00.0: 1: 0x00000100: type 0x00 idx 1 tag 0xff [drm] nouveau 0000:03:00.0: 2: 0x00005246: type 0x46 idx 2 tag 0x07 [drm] nouveau 0000:03:00.0: Parsing VBIOS init table 0 at offset 0xDCE2 [drm] nouveau 0000:03:00.0: 0xDCE2: ------ Executing following commands ------ [drm] nouveau 0000:03:00.0: 0xDCE2: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDCE2: Reg: 0x00020060, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00020060, Data: 0x00040000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00020060, Data: 0x00040000 [drm] nouveau 0000:03:00.0: 0xDCEF: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000C054, Data: 0x0C7F018C [drm] nouveau 0000:03:00.0: 0xDCF8: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDCF8: Reg: 0x00088090, Mask: 0xCFFFFFFF, Data: 0x30000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00088090, Data: 0x33000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00088090, Data: 0x33000000 [drm] nouveau 0000:03:00.0: 0xDD05: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD05: Reg: 0x00088098, Mask: 0xFFFFFF7F, Data: 0x00000080 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00088098, Data: 0x00005793 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00088098, Data: 0x00005793 [drm] nouveau 0000:03:00.0: 0xDD12: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0008809C, Data: 0x80000000 [drm] nouveau 0000:03:00.0: 0xDD1B: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD1B: Reg: 0x0000C044, Mask: 0xFFFFFFE0, Data: 0x00000001 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0000C044, Data: 0x00000001 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000C044, Data: 0x00000001 [drm] nouveau 0000:03:00.0: 0xDD28: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD28: Reg: 0x002FF0A8, Mask: 0xFFFF0000, Data: 0x000000FF [drm] nouveau 0000:03:00.0: Read: Reg: 0x002FF0A8, Data: 0x010100FF [drm] nouveau 0000:03:00.0: Write: Reg: 0x002FF0A8, Data: 0x010100FF [drm] nouveau 0000:03:00.0: 0xDD35: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD35: Reg: 0x002FF0A0, Mask: 0xFFFFDFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x002FF0A0, Data: 0x00001030 [drm] nouveau 0000:03:00.0: Write: Reg: 0x002FF0A0, Data: 0x00001030 [drm] nouveau 0000:03:00.0: 0xDD42: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614100, Data: 0x00800000 [drm] nouveau 0000:03:00.0: 0xDD4B: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614900, Data: 0x00800000 [drm] nouveau 0000:03:00.0: 0xDD54: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:03:00.0: 0xDD54: Sleeping for 0xFA00 microseconds [drm] nouveau 0000:03:00.0: 0xDD57: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614100, Data: 0x10000000 [drm] nouveau 0000:03:00.0: 0xDD60: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614900, Data: 0x10000000 [drm] nouveau 0000:03:00.0: 0xDD69: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000200, Data: 0x00000001 [drm] nouveau 0000:03:00.0: 0xDD72: [ (0x33) - INIT_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD72: Repeating following segment 20 times [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD74: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD74: Reg: 0x00000000, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000000, Data: 0x0AC300B1 [drm] nouveau 0000:03:00.0: 0xDD81: [ (0x36) - INIT_END_REPEAT ] [drm] nouveau 0000:03:00.0: 0xDD82: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000200, Data: 0xC0010111 [drm] nouveau 0000:03:00.0: 0xDD8B: [ (0x69) - INIT_IO ] [drm] nouveau 0000:03:00.0: 0xDD8B: Port: 0x03C3, Mask: 0x00, Data: 0x01 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614100, Data: 0x1D000600 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614100, Data: 0x0D800600 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0000E18C, Data: 0x00010000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E18C, Data: 0x00030000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614900, Data: 0x18000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614900, Data: 0x08800000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000200, Data: 0xC0110111 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000200, Data: 0x80110111 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0000E18C, Data: 0x00010000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E18C, Data: 0x00010000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00000200, Data: 0xC0110111 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000200, Data: 0xC0110111 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614100, Data: 0x00800018 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614900, Data: 0x00800018 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614100, Data: 0x10000018 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614900, Data: 0x10000018 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614280, Data: 0x04840484 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614280, Data: 0x00800080 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614A80, Data: 0x04840484 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614A80, Data: 0x00800080 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00615280, Data: 0x04840484 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00615280, Data: 0x00800080 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614300, Data: 0x00804040 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614300, Data: 0x00804040 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614B00, Data: 0x00800484 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614B00, Data: 0x00800080 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614380, Data: 0x00800484 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614380, Data: 0x00800080 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614B80, Data: 0x00800484 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614B80, Data: 0x00800080 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00615380, Data: 0x00800484 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00615380, Data: 0x00800080 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614200, Data: 0x00800040 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614200, Data: 0x00800040 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614A00, Data: 0x00800084 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614A00, Data: 0x00800080 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614108, Data: 0x30080011 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614108, Data: 0x00080011 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614908, Data: 0x40050012 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614908, Data: 0x00050012 [drm] nouveau 0000:03:00.0: 0xDD90: [ (0x53) - INIT_ZM_CR ] [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0x3F, Head: 0x00, Data: 0x57 [drm] nouveau 0000:03:00.0: 0xDD93: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDD93: Reg: 0x00001084, Mask: 0xFFFFF7FF, Data: 0x00000800 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00001084, Data: 0x00201749 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00001084, Data: 0x00201F49 [drm] nouveau 0000:03:00.0: 0xDDA0: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:03:00.0: 0xDDA0: Condition: 0x09 [drm] nouveau 0000:03:00.0: 0xDDA0: Cond: 0x09, Reg: 0x00101000, Mask: 0x00000040 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00101000, Data: 0x8FC098C0 [drm] nouveau 0000:03:00.0: 0xDDA0: Checking if 0x00000040 equals 0x00000000 [drm] nouveau 0000:03:00.0: 0xDDA0: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:03:00.0: 0xDDA2: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: 0xDDAB: [ (0x38) - INIT_NOT ] [drm] nouveau 0000:03:00.0: 0xDDAB: ------ Executing following commands ------ [drm] nouveau 0000:03:00.0: 0xDDAC: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00009220, Data: 0x0000040B [drm] nouveau 0000:03:00.0: 0xDDB5: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:03:00.0: 0xDDB6: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00009200, Data: 0x00000030 [drm] nouveau 0000:03:00.0: 0xDDBF: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00009210, Data: 0x00000019 [drm] nouveau 0000:03:00.0: 0xDDC8: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDDC8: Reg: 0x00101000, Mask: 0xE0FFC3FF, Data: 0x8F001800 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00101000, Data: 0x8FC098C0 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00101000, Data: 0x8FC098C0 [drm] nouveau 0000:03:00.0: 0xDDD5: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDDD5: Reg: 0x0010100C, Mask: 0xFFFFFFFF, Data: 0x80000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0010100C, Data: 0xD901001A [drm] nouveau 0000:03:00.0: Write: Reg: 0x0010100C, Data: 0xD901001A [drm] nouveau 0000:03:00.0: 0xDDE2: [ (0x5F) - INIT_COPY_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDDE2: SrcReg: 0x00614004, Shift: 0x00, SrcMask: 0xFFFFFFFF, Xor: 0x00000000, DstReg: 0x00610184, DstMask: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614004, Data: 0x03300000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00610184, Data: 0x03300000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00610184, Data: 0x03300000 [drm] nouveau 0000:03:00.0: 0xDDF8: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00619F00, Data: 0x00000009 [drm] nouveau 0000:03:00.0: 0xDE01: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00001540, Data: 0xF3010001 [drm] nouveau 0000:03:00.0: 0xDE0A: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:03:00.0: 0xDE0A: Condition: 0x07 [drm] nouveau 0000:03:00.0: 0xDE0A: Cond: 0x07, Reg: 0x00021218, Mask: 0x000000FF [drm] nouveau 0000:03:00.0: Read: Reg: 0x00021218, Data: 0x0000001E [drm] nouveau 0000:03:00.0: 0xDE0A: Checking if 0x0000001E equals 0x00000000 [drm] nouveau 0000:03:00.0: 0xDE0A: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:03:00.0: 0xDE0C: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: 0xDE15: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: 0xDE1E: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: 0xDE27: [ (0x38) - INIT_NOT ] [drm] nouveau 0000:03:00.0: 0xDE27: ------ Executing following commands ------ [drm] nouveau 0000:03:00.0: 0xDE28: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDE28: Reg: 0x0061A068, Mask: 0xFBFFFFFF, Data: 0x04000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061A068, Data: 0x4C00CC27 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061A068, Data: 0x4C00CC27 [drm] nouveau 0000:03:00.0: 0xDE35: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDE35: Reg: 0x0061A868, Mask: 0xFBFFFFFF, Data: 0x04000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061A868, Data: 0x4C000028 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061A868, Data: 0x4C000028 [drm] nouveau 0000:03:00.0: 0xDE42: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDE42: Reg: 0x0061B068, Mask: 0xFBFFFFFF, Data: 0x04000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061B068, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061B068, Data: 0x04000000 [drm] nouveau 0000:03:00.0: 0xDE4F: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:03:00.0: 0xDE50: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00000200, Data: 0xC0110111 [drm] nouveau 0000:03:00.0: 0xDE59: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00001084, Data: 0x00201749 [drm] nouveau 0000:03:00.0: 0xDE62: [ (0x6B) - INIT_SUB ] [drm] nouveau 0000:03:00.0: 0xDE62: Calling script 8 [drm] nouveau 0000:03:00.0: 0xE025: [ (0x4A) - INIT_IO_RESTRICT_PLL2 ] [drm] nouveau 0000:03:00.0: 0xE025: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x00004020 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00619488, Data: 0xFF0000C0 [drm] nouveau 0000:03:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0xC0 [drm] nouveau 0000:03:00.0: 0xE025: Reg: 0x00004020, Config: 0x00, Freq: 1100000kHz [drm] nouveau 0000:03:00.0: Loading PLL limits for reg 0x00004020 [drm] nouveau 0000:03:00.0: pll.vco1.minfreq: 1000000 [drm] nouveau 0000:03:00.0: pll.vco1.maxfreq: 2000000 [drm] nouveau 0000:03:00.0: pll.vco1.min_inputfreq: 50000 [drm] nouveau 0000:03:00.0: pll.vco1.max_inputfreq: 100000 [drm] nouveau 0000:03:00.0: pll.vco1.min_n: 10 [drm] nouveau 0000:03:00.0: pll.vco1.max_n: 255 [drm] nouveau 0000:03:00.0: pll.vco1.min_m: 1 [drm] nouveau 0000:03:00.0: pll.vco1.max_m: 255 [drm] nouveau 0000:03:00.0: pll.vco2.minfreq: 1000000 [drm] nouveau 0000:03:00.0: pll.vco2.maxfreq: 2000000 [drm] nouveau 0000:03:00.0: pll.vco2.min_inputfreq: 0 [drm] nouveau 0000:03:00.0: pll.vco2.max_inputfreq: 65535000 [drm] nouveau 0000:03:00.0: pll.vco2.min_n: 1 [drm] nouveau 0000:03:00.0: pll.vco2.max_n: 1 [drm] nouveau 0000:03:00.0: pll.vco2.min_m: 1 [drm] nouveau 0000:03:00.0: pll.vco2.max_m: 1 [drm] nouveau 0000:03:00.0: pll.max_log2p: 5 [drm] nouveau 0000:03:00.0: pll.log2p_bias: 0 [drm] nouveau 0000:03:00.0: pll.refclk: 100000 [drm] nouveau 0000:03:00.0: 0xE050: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: 0xDE62: End of script 8 [drm] nouveau 0000:03:00.0: 0xDE64: [ (0x6B) - INIT_SUB ] [drm] nouveau 0000:03:00.0: 0xDE64: Calling script 6 [drm] nouveau 0000:03:00.0: 0xDFCD: [ (0x4A) - INIT_IO_RESTRICT_PLL2 ] [drm] nouveau 0000:03:00.0: 0xDFCD: Port: 0x03D4, Index: 0x88, Mask: 0x07, Shift: 0x00, Count: 0x08, Reg: 0x00004028 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00619488, Data: 0xFF0000C0 [drm] nouveau 0000:03:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0xC0 [drm] nouveau 0000:03:00.0: 0xDFCD: Reg: 0x00004028, Config: 0x00, Freq: 450000kHz [drm] nouveau 0000:03:00.0: Loading PLL limits for reg 0x00000000 [drm] nouveau 0000:03:00.0: pll.vco1.minfreq: 500000 [drm] nouveau 0000:03:00.0: pll.vco1.maxfreq: 1000000 [drm] nouveau 0000:03:00.0: pll.vco1.min_inputfreq: 14000 [drm] nouveau 0000:03:00.0: pll.vco1.max_inputfreq: 75000 [drm] nouveau 0000:03:00.0: pll.vco1.min_n: 14 [drm] nouveau 0000:03:00.0: pll.vco1.max_n: 255 [drm] nouveau 0000:03:00.0: pll.vco1.min_m: 1 [drm] nouveau 0000:03:00.0: pll.vco1.max_m: 255 [drm] nouveau 0000:03:00.0: pll.vco2.minfreq: 500000 [drm] nouveau 0000:03:00.0: pll.vco2.maxfreq: 1000000 [drm] nouveau 0000:03:00.0: pll.vco2.min_inputfreq: 0 [drm] nouveau 0000:03:00.0: pll.vco2.max_inputfreq: 65535000 [drm] nouveau 0000:03:00.0: pll.vco2.min_n: 1 [drm] nouveau 0000:03:00.0: pll.vco2.max_n: 1 [drm] nouveau 0000:03:00.0: pll.vco2.min_m: 1 [drm] nouveau 0000:03:00.0: pll.vco2.max_m: 1 [drm] nouveau 0000:03:00.0: pll.max_log2p: 5 [drm] nouveau 0000:03:00.0: pll.log2p_bias: 0 [drm] nouveau 0000:03:00.0: pll.refclk: 100000 [drm] nouveau 0000:03:00.0: 0xDFF8: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: 0xDE64: End of script 6 [drm] nouveau 0000:03:00.0: 0xDE66: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDE66: Reg: 0x00004040, Mask: 0xFFF0FFFF, Data: 0x00010000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00004040, Data: 0x00010000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00004040, Data: 0x00010000 [drm] nouveau 0000:03:00.0: 0xDE73: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:03:00.0: 0xDE73: Sleeping for 0x03E8 microseconds [drm] nouveau 0000:03:00.0: 0xDE76: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDE76: Reg: 0x0000E824, Mask: 0xFFEFFFFF, Data: 0x00100000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0000E824, Data: 0x00100000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E824, Data: 0x00100000 [drm] nouveau 0000:03:00.0: 0xDE83: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E4F8, Data: 0x000000FA [drm] nouveau 0000:03:00.0: 0xDE8C: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E548, Data: 0x000000FA [drm] nouveau 0000:03:00.0: 0xDE95: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E598, Data: 0x000000FA [drm] nouveau 0000:03:00.0: 0xDE9E: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E5E8, Data: 0x000000FA [drm] nouveau 0000:03:00.0: 0xDEA7: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E500, Data: 0x00003418 [drm] nouveau 0000:03:00.0: 0xDEB0: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E550, Data: 0x00003418 [drm] nouveau 0000:03:00.0: 0xDEB9: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E5A0, Data: 0x00003418 [drm] nouveau 0000:03:00.0: 0xDEC2: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E5F0, Data: 0x00003418 [drm] nouveau 0000:03:00.0: 0xDECB: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDECB: Reg: 0x00004070, Mask: 0xFFF8FFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00004070, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00004070, Data: 0x00000000 [drm] nouveau 0000:03:00.0: 0xDED8: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDED8: Reg: 0x00004020, Mask: 0x7FFFFFFF, Data: 0x80000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00004020, Data: 0x80000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00004020, Data: 0x80000000 [drm] nouveau 0000:03:00.0: 0xDEE5: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDEE5: Reg: 0x00004028, Mask: 0x7FFFFFFF, Data: 0x80000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00004028, Data: 0x80010000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00004028, Data: 0x80010000 [drm] nouveau 0000:03:00.0: 0xDEF2: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDEF2: Reg: 0x00102018, Mask: 0xFFFFFFFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00102018, Data: 0x00000FF0 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00102018, Data: 0x00000FF0 [drm] nouveau 0000:03:00.0: 0xDEFF: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:03:00.0: 0xDEFF: Sleeping for 0x0064 microseconds [drm] nouveau 0000:03:00.0: 0xDF02: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDF02: Reg: 0x0000C054, Mask: 0xFF80FC00, Data: 0x007F0033 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0000C054, Data: 0x0C7F0033 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000C054, Data: 0x0C7F0033 [drm] nouveau 0000:03:00.0: 0xDF0F: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDF0F: Reg: 0x00100F64, Mask: 0x80FFC07F, Data: 0x01000080 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00100F64, Data: 0x81000081 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00100F64, Data: 0x81000081 [drm] nouveau 0000:03:00.0: 0xDF1C: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDF1C: Reg: 0x00100F68, Mask: 0xFFE03F80, Data: 0x00004009 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00100F68, Data: 0x00004789 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00100F68, Data: 0x00004789 [drm] nouveau 0000:03:00.0: 0xDF29: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDF29: Reg: 0x00100F6C, Mask: 0xFFFFC000, Data: 0x00000B16 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00100F6C, Data: 0x00000B16 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00100F6C, Data: 0x00000B16 [drm] nouveau 0000:03:00.0: 0xDF36: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDF36: Reg: 0x00100F30, Mask: 0xFFFF9FFF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00100F30, Data: 0x000089CB [drm] nouveau 0000:03:00.0: Write: Reg: 0x00100F30, Data: 0x000089CB [drm] nouveau 0000:03:00.0: 0xDF43: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDF43: Reg: 0x00100B18, Mask: 0xFFC0F8CC, Data: 0x003A0722 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00100B18, Data: 0x003A0722 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00100B18, Data: 0x003A0722 [drm] nouveau 0000:03:00.0: 0xDF50: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDF50: Reg: 0x00001084, Mask: 0xFFFFF7FF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00001084, Data: 0x00201749 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00001084, Data: 0x00201749 [drm] nouveau 0000:03:00.0: 0xDF5D: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDF5D: Reg: 0x00004300, Mask: 0xFFFFFFE0, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00004300, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00004300, Data: 0x00000000 [drm] nouveau 0000:03:00.0: 0xDF6A: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00020080, Data: 0x10070523 [drm] nouveau 0000:03:00.0: 0xDF73: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:03:00.0: 0xDF73: Condition: 0x0E [drm] nouveau 0000:03:00.0: 0xDF73: Cond: 0x0E, Reg: 0x002FF090, Mask: 0x00000001 [drm] nouveau 0000:03:00.0: Read: Reg: 0x002FF090, Data: 0x00000001 [drm] nouveau 0000:03:00.0: 0xDF73: Checking if 0x00000001 equals 0x00000000 [drm] nouveau 0000:03:00.0: 0xDF73: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:03:00.0: 0xDF75: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: 0xDF7E: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: 0xDF87: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:03:00.0: 0xDF87: ---- Executing following commands ---- [drm] nouveau 0000:03:00.0: 0xDF88: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xDF88: Reg: 0x002FF090, Mask: 0xFFFFFFFE, Data: 0x00000001 [drm] nouveau 0000:03:00.0: Read: Reg: 0x002FF090, Data: 0x00000001 [drm] nouveau 0000:03:00.0: Write: Reg: 0x002FF090, Data: 0x00000001 [drm] nouveau 0000:03:00.0: 0xDF95: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: Parsing VBIOS init table 1 at offset 0xDF96 [drm] nouveau 0000:03:00.0: 0xDF96: ------ Executing following commands ------ [drm] nouveau 0000:03:00.0: 0xDF96: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: Parsing VBIOS init table 2 at offset 0xDF98 [drm] nouveau 0000:03:00.0: 0xDF98: ------ Executing following commands ------ [drm] nouveau 0000:03:00.0: 0xDF98: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000108C, Data: 0x000000D1 [drm] nouveau 0000:03:00.0: 0xDFA1: [ (0x53) - INIT_ZM_CR ] [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0xF0, Head: 0x00, Data: 0x00 [drm] nouveau 0000:03:00.0: 0xDFA4: [ (0x51) - INIT_CR_INDEX_ADDRESS_LATCHED ] [drm] nouveau 0000:03:00.0: 0xDFA4: Index1: 0xA0, Index2: 0xA1, BaseAddr: 0x08, Count: 0x02 [drm] nouveau 0000:03:00.0: Read: Reg: 0x006194A0, Data: 0x10000019 [drm] nouveau 0000:03:00.0: Indexed IO read: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x19 [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x08 [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA1, Head: 0x00, Data: 0x00 [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x09 [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA1, Head: 0x00, Data: 0x00 [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x19 [drm] nouveau 0000:03:00.0: 0xDFAB: [ (0x51) - INIT_CR_INDEX_ADDRESS_LATCHED ] [drm] nouveau 0000:03:00.0: 0xDFAB: Index1: 0xA0, Index2: 0xA1, BaseAddr: 0x18, Count: 0x02 [drm] nouveau 0000:03:00.0: Read: Reg: 0x006194A0, Data: 0x10000019 [drm] nouveau 0000:03:00.0: Indexed IO read: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x19 [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x18 [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA1, Head: 0x00, Data: 0x00 [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x19 [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA1, Head: 0x00, Data: 0x00 [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0xA0, Head: 0x00, Data: 0x19 [drm] nouveau 0000:03:00.0: 0xDFB2: [ (0x52) - INIT_CR ] [drm] nouveau 0000:03:00.0: 0xDFB2: Index: 0x88, Mask: 0xBF, Data: 0x40 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00619488, Data: 0xFF0000C0 [drm] nouveau 0000:03:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0xC0 [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0xC0 [drm] nouveau 0000:03:00.0: 0xDFB6: [ (0x52) - INIT_CR ] [drm] nouveau 0000:03:00.0: 0xDFB6: Index: 0x8A, Mask: 0x00, Data: 0x00 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00619488, Data: 0xFF0000C0 [drm] nouveau 0000:03:00.0: Indexed IO read: Port: 0x03D4, Index: 0x8A, Head: 0x00, Data: 0x00 [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0x8A, Head: 0x00, Data: 0x00 [drm] nouveau 0000:03:00.0: 0xDFBA: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E200, Data: 0x0003103C [drm] nouveau 0000:03:00.0: 0xDFC3: [ (0x53) - INIT_ZM_CR ] [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0x30, Head: 0x00, Data: 0x10 [drm] nouveau 0000:03:00.0: 0xDFC6: [ (0x53) - INIT_ZM_CR ] [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0x31, Head: 0x00, Data: 0x00 [drm] nouveau 0000:03:00.0: 0xDFC9: [ (0x53) - INIT_ZM_CR ] [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0xAA, Head: 0x00, Data: 0x00 [drm] nouveau 0000:03:00.0: 0xDFCC: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: Parsing VBIOS init table 3 at offset 0xE07D [drm] nouveau 0000:03:00.0: 0xE07D: ------ Executing following commands ------ [drm] nouveau 0000:03:00.0: 0xE07D: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:03:00.0: 0xE07D: Executing subroutine at 0xC9C6 [drm] nouveau 0000:03:00.0: 0xC9C6: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: 0xE07D: End of 0xC9C6 subroutine [drm] nouveau 0000:03:00.0: 0xE080: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:03:00.0: 0xE080: Executing subroutine at 0xDF97 [drm] nouveau 0000:03:00.0: 0xDF97: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: 0xE080: End of 0xDF97 subroutine [drm] nouveau 0000:03:00.0: 0xE083: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xE083: Reg: 0x00614120, Mask: 0xFFC3E7FF, Data: 0x00040800 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614120, Data: 0x00450800 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614120, Data: 0x00450800 [drm] nouveau 0000:03:00.0: 0xE090: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xE090: Reg: 0x00614920, Mask: 0xFFC3E7FF, Data: 0x00040800 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00614920, Data: 0x00450800 [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614920, Data: 0x00450800 [drm] nouveau 0000:03:00.0: 0xE09D: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614100, Data: 0x10000000 [drm] nouveau 0000:03:00.0: 0xE0A6: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614900, Data: 0x10000000 [drm] nouveau 0000:03:00.0: 0xE0AF: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00612000, Data: 0x10000210 [drm] nouveau 0000:03:00.0: 0xE0B8: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614000, Data: 0x10000210 [drm] nouveau 0000:03:00.0: 0xE0C1: [ (0x75) - INIT_CONDITION ] [drm] nouveau 0000:03:00.0: 0xE0C1: Condition: 0x09 [drm] nouveau 0000:03:00.0: 0xE0C1: Cond: 0x09, Reg: 0x00101000, Mask: 0x00000040 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00101000, Data: 0x8FC098C0 [drm] nouveau 0000:03:00.0: 0xE0C1: Checking if 0x00000040 equals 0x00000000 [drm] nouveau 0000:03:00.0: 0xE0C1: Condition not fulfilled -- skipping following commands [drm] nouveau 0000:03:00.0: 0xE0C3: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: 0xE0CC: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: 0xE0D5: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: 0xE0DE: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: 0xE0E7: [ (0x38) - INIT_NOT ] [drm] nouveau 0000:03:00.0: 0xE0E7: ------ Executing following commands ------ [drm] nouveau 0000:03:00.0: 0xE0E8: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614110, Data: 0x0005004C [drm] nouveau 0000:03:00.0: 0xE0F1: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614114, Data: 0x50190035 [drm] nouveau 0000:03:00.0: 0xE0FA: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00614118, Data: 0x00010014 [drm] nouveau 0000:03:00.0: 0xE103: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061411C, Data: 0x5010001D [drm] nouveau 0000:03:00.0: 0xE10C: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:03:00.0: 0xE10D: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061A008, Data: 0x03A502D1 [drm] nouveau 0000:03:00.0: 0xE116: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C080, Data: 0x00000084 [drm] nouveau 0000:03:00.0: 0xE11F: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C084, Data: 0x80000400 [drm] nouveau 0000:03:00.0: 0xE128: [ (0x53) - INIT_ZM_CR ] [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0x85, Head: 0x00, Data: 0xFF [drm] nouveau 0000:03:00.0: 0xE12B: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x00020010, Data: 0xFA2D0399 [drm] nouveau 0000:03:00.0: 0xE134: [ (0x7A) - INIT_ZM_REG ] [drm] nouveau 0000:03:00.0: Write: Reg: 0x0002000C, Data: 0x00000003 [drm] nouveau 0000:03:00.0: 0xE13D: [ (0x52) - INIT_CR ] [drm] nouveau 0000:03:00.0: 0xE13D: Index: 0x88, Mask: 0x7F, Data: 0x80 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00619488, Data: 0xFF0000C0 [drm] nouveau 0000:03:00.0: Indexed IO read: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0xC0 [drm] nouveau 0000:03:00.0: Indexed IO write: Port: 0x03D4, Index: 0x88, Head: 0x00, Data: 0xC0 [drm] nouveau 0000:03:00.0: 0xE141: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: Parsing VBIOS init table 4 at offset 0xE142 [drm] nouveau 0000:03:00.0: 0xE142: ------ Executing following commands ------ [drm] nouveau 0000:03:00.0: 0xE142: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: Parsing VBIOS init table at offset 0xE1A7 [drm] nouveau 0000:03:00.0: 0xE1A7: [ (0x56) - INIT_CONDITION_TIME ] [drm] nouveau 0000:03:00.0: 0xE1A7: Condition: 0x01, Retries: 0x64 [drm] nouveau 0000:03:00.0: 0xE1A7: Cond: 0x01, Reg: 0x0061000C, Mask: 0x80000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061000C, Data: 0x00000140 [drm] nouveau 0000:03:00.0: 0xE1A7: Checking if 0x00000000 equals 0x80000000 [drm] nouveau 0000:03:00.0: 0xE1A7: Condition not met, sleeping for 20ms [drm] nouveau 0000:03:00.0: 0xE1A7: Cond: 0x01, Reg: 0x0061000C, Mask: 0x80000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061000C, Data: 0x00000140 [drm] nouveau 0000:03:00.0: 0xE1A7: Checking if 0x00000000 equals 0x80000000 [drm] nouveau 0000:03:00.0: 0xE1A7: Condition still not met after 20ms, skipping following opcodes [drm] nouveau 0000:03:00.0: 0xE1AA: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:03:00.0: 0xE1AA: ---- Executing following commands ---- [drm] nouveau 0000:03:00.0: 0xE1AB: [ (0x5F) - INIT_COPY_NV_REG ] [drm] nouveau 0000:03:00.0: 0xE1AB: SrcReg: 0x00610000, Shift: 0x00, SrcMask: 0x0000FFFF, Xor: 0x00000000, DstReg: 0x0061000C, DstMask: 0xFFFF0000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x00610000, Data: 0x887D0140 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061000C, Data: 0x00000140 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061000C, Data: 0x00000140 [drm] nouveau 0000:03:00.0: 0xE1C1: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xE1C1: Reg: 0x0061000C, Mask: 0xBFFFFFFF, Data: 0x40000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061000C, Data: 0x00000140 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061000C, Data: 0x40000140 [drm] nouveau 0000:03:00.0: 0xE1CE: [ (0x56) - INIT_CONDITION_TIME ] [drm] nouveau 0000:03:00.0: 0xE1CE: Condition: 0x02, Retries: 0x64 [drm] nouveau 0000:03:00.0: 0xE1CE: Cond: 0x02, Reg: 0x0061000C, Mask: 0x40000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061000C, Data: 0x00000140 [drm] nouveau 0000:03:00.0: 0xE1CE: Checking if 0x00000000 equals 0x00000000 [drm] nouveau 0000:03:00.0: 0xE1CE: Condition met, continuing [drm] nouveau 0000:03:00.0: 0xE1CE: Cond: 0x02, Reg: 0x0061000C, Mask: 0x40000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061000C, Data: 0x00000140 [drm] nouveau 0000:03:00.0: 0xE1CE: Checking if 0x00000000 equals 0x00000000 [drm] nouveau 0000:03:00.0: 0xE1D1: [ (0x72) - INIT_RESUME ] [drm] nouveau 0000:03:00.0: 0xE1D2: [ (0x8E) - INIT_GPIO ] [drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x700008E0 [drm] nouveau 0000:03:00.0: 0xE1D2: set gpio 0x08, state 0 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x700007E1 [drm] nouveau 0000:03:00.0: 0xE1D2: set gpio 0x07, state 0 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0xA40021E2 [drm] nouveau 0000:03:00.0: 0xE1D2: set gpio 0x21, state 0 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x240001E3 [drm] nouveau 0000:03:00.0: 0xE1D2: set gpio 0x01, state 0 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x240000E4 [drm] nouveau 0000:03:00.0: 0xE1D2: set gpio 0x00, state 0 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:03:00.0: 0xE1D2: Entry: 0x58004AE7 [drm] nouveau 0000:03:00.0: 0xE1D2: set gpio 0x4a, state 0 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0000E100, Data: 0x001C0100 [drm] nouveau 0000:03:00.0: 0xE1D3: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: Searching for output entry for 3 0 1 [drm] nouveau 0000:03:00.0: 0xC35E: parsing output script 0 [drm] nouveau 0000:03:00.0: 0xC35E: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:03:00.0: 0xC35E: Executing subroutine at 0xC364 [drm] nouveau 0000:03:00.0: 0xC364: [ (0x58) - INIT_ZM_REG_SEQUENCE ] [drm] nouveau 0000:03:00.0: 0xC364: BaseReg: 0x4061C040, Count: 0x10 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C040, Data: 0x5E000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C044, Data: 0x5E200000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C048, Data: 0x00201021 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C04C, Data: 0x002010CD [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C050, Data: 0x0060A000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C054, Data: 0x00608000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C058, Data: 0x00608000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C05C, Data: 0x00608000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C060, Data: 0x00202000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C064, Data: 0x80202000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C068, Data: 0xFE2010FA [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C06C, Data: 0xFE001002 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C070, Data: 0xFE009312 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C074, Data: 0xFE008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C078, Data: 0xFE008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C07C, Data: 0xFE008000 [drm] nouveau 0000:03:00.0: 0xC3AA: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: 0xC35E: End of 0xC364 subroutine [drm] nouveau 0000:03:00.0: 0xC361: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: Searching for output entry for 0 0 2 [drm] nouveau 0000:03:00.0: output script 0 not found [drm] nouveau 0000:03:00.0: Searching for output entry for 6 0 2 [drm] nouveau 0000:03:00.0: 0xC8E4: parsing output script 0 [drm] nouveau 0000:03:00.0: 0xC8E4: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:03:00.0: 0xC8E4: Executing subroutine at 0xC97E [drm] nouveau 0000:03:00.0: 0xC97E: [ (0x58) - INIT_ZM_REG_SEQUENCE ] [drm] nouveau 0000:03:00.0: 0xC97E: BaseReg: 0x4061C040, Count: 0x10 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C840, Data: 0x3F000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C844, Data: 0x1F000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C848, Data: 0x1E000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C84C, Data: 0x0000A000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C850, Data: 0x00008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C854, Data: 0x00008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C858, Data: 0x00008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C85C, Data: 0x00008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C860, Data: 0x00002000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C864, Data: 0x1E002000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C868, Data: 0x1F000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C86C, Data: 0x7F008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C870, Data: 0x7F008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C874, Data: 0x7F008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C878, Data: 0x7F008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C87C, Data: 0x7F008000 [drm] nouveau 0000:03:00.0: 0xC9C4: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: 0xC8E4: End of 0xC97E subroutine [drm] nouveau 0000:03:00.0: 0xC8E7: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: Searching for output entry for 2 0 2 [drm] nouveau 0000:03:00.0: 0xC706: parsing output script 0 [drm] nouveau 0000:03:00.0: 0xC706: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:03:00.0: 0xC706: Executing subroutine at 0xC74E [drm] nouveau 0000:03:00.0: 0xC74E: [ (0x58) - INIT_ZM_REG_SEQUENCE ] [drm] nouveau 0000:03:00.0: 0xC74E: BaseReg: 0x4061C040, Count: 0x10 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C840, Data: 0x1F000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C844, Data: 0x1F000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C848, Data: 0x1E000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C84C, Data: 0x0000A000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C850, Data: 0x00008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C854, Data: 0x00008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C858, Data: 0x00008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C85C, Data: 0x00008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C860, Data: 0x00002000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C864, Data: 0x1E002000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C868, Data: 0x1F000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C86C, Data: 0x1F008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C870, Data: 0x1F008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C874, Data: 0x1F008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C878, Data: 0x1F008000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C87C, Data: 0x1F008000 [drm] nouveau 0000:03:00.0: 0xC794: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: 0xC706: End of 0xC74E subroutine [drm] nouveau 0000:03:00.0: 0xC709: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xC709: Reg: 0x4061C014, Mask: 0xFFFEFFFF, Data: 0x00010000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061C814, Data: 0x00850000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C814, Data: 0x00850000 [drm] nouveau 0000:03:00.0: 0xC716: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xC716: Reg: 0x4061C00C, Mask: 0xFFFFFFDF, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061C80C, Data: 0x020003D0 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C80C, Data: 0x020003D0 [drm] nouveau 0000:03:00.0: 0xC723: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: Read: Reg: 0x00101000, Data: 0x8FC098C0 [drm] nouveau 0000:03:00.0: Detected 256MiB VRAM [drm] nouveau 0000:03:00.0: Stolen system memory at: 0x008ff00000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_early_init:280 - [drm] nouveau 0000:03:00.0: nv50_instmem_init:90 - Rsvd VRAM base: 0x0ff00000 [drm] nouveau 0000:03:00.0: nv50_instmem_init:92 - VBIOS image: 0x0ffe0000 [drm] nouveau 0000:03:00.0: nv50_instmem_init:93 - Aperture size: 32 MiB [drm] nouveau 0000:03:00.0: nv50_instmem_init:94 - PT size: 64 KiB [drm] nouveau 0000:03:00.0: nv50_instmem_init:113 - NV50VM: GART 0x0000000020000000-0x000000003fffffff [drm] nouveau 0000:03:00.0: nv50_instmem_init:116 - NV50VM: VRAM 0x0000000040000000-0x000000005fffffff [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:562 - p_offset=0x00000000 b_offset=0x0ff00000 size=0x00030000 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:567 - gpuobj ffff88015a572ea0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572ea0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:562 - p_offset=0x00000020 b_offset=0x0ff00020 size=0x00004000 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:567 - gpuobj ffff88015a572f00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572f00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:562 - p_offset=0x00000200 b_offset=0x0ff00200 size=0x00004000 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:567 - gpuobj ffff88015a572f60 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch0 size=65536 align=4096 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572a80 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572a80 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch0 size=65536 align=0 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572900 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572900 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch0 size=24 align=16 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572ae0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch0 h=0x00000000 gpuobj=ffff88015a572ae0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch0 size=24 align=16 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a5729c0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch0 h=0x00000000 gpuobj=ffff88015a5729c0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch-1 size=1048576 align=16 flags=0x00000007 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572a20 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:235 - global heap [drm] nouveau 0000:03:00.0: nv50_instmem_bind:435 - st=0x30000 sz=0x100000 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:442 - pramin=0x30000, pte=96, pte_end=608 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:443 - first vram page: 0x00040000 [drm] nouveau 0000:03:00.0: 512 MiB GART (aperture) mtrr: type mismatch for b0000000,10000000 old: write-back new: write-combining [drm] nouveau 0000:03:00.0: nouveau_gpuobj_init:293 - [drm] nouveau 0000:03:00.0: nv50_graph_init:143 - [drm] nouveau 0000:03:00.0: nv50_graph_init_reset:38 - [drm] nouveau 0000:03:00.0: nv50_graph_init_regs__nv:61 - [drm] nouveau 0000:03:00.0: nv50_graph_init_regs:93 - [drm] nouveau 0000:03:00.0: nv50_graph_init_intr:47 - [drm] nouveau 0000:03:00.0: nv50_graph_init_ctxctl:108 - [drm] nouveau 0000:03:00.0: nv50_fifo_init:159 - [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch-1 size=512 align=4096 flags=0x00000002 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572960 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:235 - global heap [drm] nouveau 0000:03:00.0: nv50_instmem_bind:435 - st=0x130000 sz=0x1000 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:442 - pramin=0x130000, pte=608, pte_end=610 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:443 - first vram page: 0x00140000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572960 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch-1 size=512 align=4096 flags=0x00000002 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572840 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:235 - global heap [drm] nouveau 0000:03:00.0: nv50_instmem_bind:435 - st=0x131000 sz=0x1000 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:442 - pramin=0x131000, pte=610, pte_end=612 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:443 - first vram page: 0x00150000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572840 [drm] nouveau 0000:03:00.0: nv50_fifo_init_reset:94 - [drm] nouveau 0000:03:00.0: nv50_fifo_init_intr:103 - [drm] nouveau 0000:03:00.0: nv50_fifo_init_context_table:115 - [drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:63 - ch0 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch1 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch2 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch3 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch4 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch5 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch6 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch7 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch8 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch9 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch10 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch11 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch12 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch13 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch14 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch15 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch16 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch17 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch18 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch19 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch20 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch21 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch22 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch23 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch24 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch25 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch26 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch27 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch28 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch29 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch30 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch31 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch32 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch33 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch34 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch35 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch36 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch37 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch38 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch39 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch40 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch41 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch42 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch43 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch44 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch45 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch46 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch47 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch48 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch49 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch50 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch51 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch52 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch53 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch54 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch55 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch56 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch57 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch58 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch59 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch60 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch61 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch62 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch63 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch64 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch65 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch66 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch67 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch68 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch69 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch70 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch71 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch72 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch73 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch74 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch75 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch76 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch77 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch78 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch79 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch80 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch81 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch82 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch83 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch84 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch85 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch86 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch87 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch88 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch89 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch90 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch91 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch92 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch93 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch94 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch95 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch96 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch97 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch98 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch99 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch100 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch101 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch102 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch103 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch104 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch105 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch106 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch107 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch108 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch109 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch110 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch111 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch112 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch113 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch114 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch115 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch116 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch117 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch118 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch119 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch120 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch121 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch122 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch123 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch124 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch125 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_disable:80 - ch126 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:63 - ch127 [drm] nouveau 0000:03:00.0: nv50_fifo_playlist_update:39 - [drm] nouveau 0000:03:00.0: nv50_fifo_init_regs__nv:130 - [drm] nouveau 0000:03:00.0: nv50_fifo_init_regs:138 - [drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:63 - ch0 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:63 - ch127 [drm] nouveau 0000:03:00.0: nv50_display_create:472 - [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch-1 size=32768 align=4096 flags=0x00000002 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572540 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:235 - global heap [drm] nouveau 0000:03:00.0: nv50_instmem_bind:435 - st=0x132000 sz=0x8000 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:442 - pramin=0x132000, pte=612, pte_end=628 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:443 - first vram page: 0x00160000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572540 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch-1 size=4096 align=16 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a5725a0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a5725a0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch-1 size=24 align=32 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572600 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x01000001 gpuobj=ffff88015a572600 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch-1 handle=0x01000001 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000208 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch-1 0x00000208: h=0x01000001, c=0x00400002 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch-1 size=24 align=32 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a5724e0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x01000002 gpuobj=ffff88015a5724e0 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch-1 handle=0x01000002 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000210 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch-1 0x00000210: h=0x01000002, c=0x00408002 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch-1 size=24 align=32 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a5723c0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x01000000 gpuobj=ffff88015a5723c0 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch-1 handle=0x01000000 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000200 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch-1 0x00000200: h=0x01000000, c=0x00410002 [drm] nouveau 0000:03:00.0: nv50_crtc_create:714 - [drm] nouveau 0000:03:00.0: nv50_crtc_create:714 - [drm] nouveau 0000:03:00.0: nouveau_connector_create:739 - [drm] nouveau 0000:03:00.0: Read: Reg: 0x00101000, Data: 0x8FC098C0 [drm] nouveau 0000:03:00.0: nv50_sor_create:289 - [drm] nouveau 0000:03:00.0: nouveau_connector_create:739 - [drm] nouveau 0000:03:00.0: nouveau_connector_create:739 - [drm] nouveau 0000:03:00.0: nv50_sor_create:289 - [drm] nouveau 0000:03:00.0: nouveau_connector_create:739 - [drm] nouveau 0000:03:00.0: nv50_sor_create:289 - [drm] nouveau 0000:03:00.0: nv50_display_init:206 - [drm] nouveau 0000:03:00.0: nv50_display_init:250 - ram_amount 268435456 hda-intel: Codec #1 probe error; disabling it... [drm] nouveau 0000:03:00.0: Allocating FIFO number 1 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x0 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x10 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init:944 - ch1 vram=0x80000002 tt=0x80000003 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init_pramin:894 - ch1 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch-1 size=369664 align=4096 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9b40 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:235 - global heap [drm] nouveau 0000:03:00.0: nv50_instmem_bind:435 - st=0x13a000 sz=0x5b000 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:442 - pramin=0x13a000, pte=628, pte_end=810 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:443 - first vram page: 0x001c0000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015b1e9b40 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:562 - p_offset=0x0013a200 b_offset=0xffffffff size=0x00004000 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:567 - gpuobj ffff88015b1e9ba0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572a20 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572900 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch1 size=32768 align=16 flags=0x00000002 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9c00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x00000000 gpuobj=ffff88015b1e9c00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch1 class=0x003d offset=0x0 size=0x60000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9c60 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000002 gpuobj=ffff88015b1e9c60 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000002 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000090 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch1 0x00000090: h=0x80000002, c=0x00000e00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000003 gpuobj=ffff88015b1e9c60 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000003 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000098 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch1 0x00000098: h=0x80000003, c=0x00000e00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch1 class=0x003d offset=0x0 size=0x60000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=1 target=3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9cc0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x00000000 gpuobj=ffff88015b1e9cc0 [drm] nouveau 0000:03:00.0: nv50_graph_create_context:213 - ch1 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch1 size=307200 align=4096 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9d20 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015b1e9d20 [drm] nouveau 0000:03:00.0: nv50_fifo_create_context:226 - ch1 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch1 size=256 align=256 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9d80 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015b1e9d80 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch1 size=4096 align=1024 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9de0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015b1e9de0 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:63 - ch1 [drm] nouveau 0000:03:00.0: nv50_fifo_playlist_update:39 - [drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:819 - ch1 class=0x5039 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9e40 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000001 gpuobj=ffff88015b1e9e40 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000001 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000088 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch1 0x00000088: h=0x80000001, c=0x00100e04 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x8000000e gpuobj=ffff88015b1e9ea0 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x8000000e [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000f0 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch1 0x000000f0: h=0x8000000e, c=0x00000004 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch1 class=0x003d offset=0x20010000 size=0x20 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9f00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000006 gpuobj=ffff88015b1e9f00 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000006 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000b0 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch1 0x000000b0: h=0x80000006, c=0x00000e06 [drm] nouveau 0000:03:00.0: nouveau_channel_alloc: initialised FIFO 1 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch1 class=0x003d offset=0x0 size=0x10000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015b1e9f60 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000004 gpuobj=ffff88015b1e9f60 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000004 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000a0 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch1 0x000000a0: h=0x80000004, c=0x00000e08 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch1 class=0x003d offset=0x20000000 size=0x20000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000005 gpuobj=ffff880156126000 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000005 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000a8 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch1 0x000000a8: h=0x80000005, c=0x00000e0a [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] [drm] nouveau 0000:03:00.0: nouveau_connector_native_mode:454 - native mode from preferred [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes : [drm:drm_mode_debug_printmodeline], Modeline 16:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9 [drm:drm_mode_debug_printmodeline], Modeline 18:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 19:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 21:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 20:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 22:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 23:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] disconnected [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 input: HDA Digital PCBeep as /devices/pci0000:00/0000:00:08.0/input/input11 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] disconnected [drm:drm_setup_crtcs], [drm:drm_enable_connectors], connector 7 enabled? yes [drm:drm_enable_connectors], connector 9 enabled? no [drm:drm_enable_connectors], connector 11 enabled? no [drm:drm_target_preferred], looking for cmdline mode on connector 7 [drm:drm_target_preferred], looking for preferred mode on connector 7 [drm:drm_target_preferred], found mode 1280x800 [drm:drm_setup_crtcs], picking CRTCs for 8192x8192 config [drm:drm_setup_crtcs], desired mode 1280x800 set on crtc 5 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:819 - ch1 class=0x502d [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch1 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff8801561260c0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch1 h=0x80000007 gpuobj=ffff8801561260c0 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch1 handle=0x80000007 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000b8 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch1 0x000000b8: h=0x80000007, c=0x00100e0c [drm] nouveau 0000:03:00.0: allocated 1280x800 fb: 0x40220000, bo ffff880159d3c400 fb1: nouveaufb frame buffer device [drm] Initialized nouveau 0.0.16 20090420 for 0000:03:00.0 on minor 1 input: HDA NVidia Mic at Ext Left Jack as /devices/pci0000:00/0000:00:08.0/sound/card0/input12 input: HDA NVidia HP Out at Ext Left Jack as /devices/pci0000:00/0000:00:08.0/sound/card0/input13 input: HDA NVidia HP Out at Ext Left Jack as /devices/pci0000:00/0000:00:08.0/sound/card0/input14 EXT4-fs (dm-1): re-mounted. Opts: (null) EXT4-fs (dm-1): re-mounted. Opts: (null) EXT4-fs (dm-0): mounted filesystem with ordered data mode. Opts: (null) EXT4-fs (sda1): mounted filesystem with ordered data mode. Opts: (null) fuse init (API version 7.15) Adding 4095996k swap on /dev/mapper/vg_soulou2-LogVol02. Priority:-1 extents:1 across:4095996k NET: Registered protocol family 10 lo: Disabled Privacy Extensions CPUFREQ: Per core ondemand sysfs interface is deprecated - ignore_nice_load ata1.00: configured for UDMA/133 ata1: EH complete EXT4-fs (dm-1): re-mounted. Opts: barrier=1,data=ordered,commit=3600 EXT4-fs (dm-0): re-mounted. Opts: commit=3600 EXT4-fs (sda1): re-mounted. Opts: commit=3600 WARNING! power/level is deprecated; use power/control instead sshd (4775): /proc/4775/oom_adj is deprecated, please use /proc/4775/oom_score_adj instead. ADDRCONF(NETDEV_UP): wlan0: link is not ready [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm:drm_crtc_helper_set_config], [drm:drm_crtc_helper_set_config], [CRTC:5] [FB:15] #connectors=1 (x y) (0 0) [drm:drm_crtc_helper_set_config], [CONNECTOR:7:VGA-1] to [CRTC:5] [drm] nouveau 0000:02:00.0: nv50_crtc_lut_load:48 - [drm] nouveau 0000:02:00.0: nv50_crtc_lut_load:48 - [drm] nouveau 0000:02:00.0: nouveau_channel_cleanup:333 - clearing FIFO enables from file_priv [drm] nouveau 0000:02:00.0: nouveau_channel_cleanup:333 - clearing FIFO enables from file_priv [drm] nouveau 0000:03:00.0: nouveau_channel_cleanup:333 - clearing FIFO enables from file_priv vgaarb: device changed decodes: PCI:0000:03:00.0,olddecodes=io+mem,decodes=none:owns=io+mem vgaarb: transferring owner from PCI:0000:03:00.0 to PCI:0000:02:00.0 vgaarb: device changed decodes: PCI:0000:02:00.0,olddecodes=io+mem,decodes=none:owns=io+mem [drm] nouveau 0000:02:00.0: nouveau_channel_cleanup:333 - clearing FIFO enables from file_priv [drm] nouveau 0000:02:00.0: nouveau_channel_cleanup:333 - clearing FIFO enables from file_priv [drm] nouveau 0000:02:00.0: nouveau_channel_cleanup:333 - clearing FIFO enables from file_priv [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[4] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[3] ENCODERS[4] [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] [drm] nouveau 0000:03:00.0: nouveau_connector_native_mode:454 - native mode from preferred [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes : [drm:drm_mode_debug_printmodeline], Modeline 16:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9 [drm:drm_mode_debug_printmodeline], Modeline 18:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 19:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 21:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 20:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 22:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 23:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6 [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_mode_getconnector], [CONNECTOR:9:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] disconnected [drm:drm_mode_getconnector], [CONNECTOR:9:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] disconnected [drm:drm_mode_getconnector], [CONNECTOR:11:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] disconnected [drm:drm_mode_getconnector], [CONNECTOR:11:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] disconnected [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] [drm] nouveau 0000:03:00.0: nouveau_connector_native_mode:454 - native mode from preferred [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes : [drm:drm_mode_debug_printmodeline], Modeline 16:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9 [drm:drm_mode_debug_printmodeline], Modeline 18:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 19:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 21:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 20:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 22:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 23:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6 [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_mode_getconnector], [CONNECTOR:9:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] disconnected [drm:drm_mode_getconnector], [CONNECTOR:9:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] disconnected [drm:drm_mode_getconnector], [CONNECTOR:11:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] disconnected [drm:drm_mode_getconnector], [CONNECTOR:11:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] disconnected [drm] nouveau 0000:03:00.0: Allocating FIFO number 2 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x20 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x30 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init:944 - ch2 vram=0xd8000001 tt=0xd8000002 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init_pramin:894 - ch2 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch-1 size=369664 align=4096 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a76c660 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:235 - global heap [drm] nouveau 0000:03:00.0: nv50_instmem_bind:435 - st=0x195000 sz=0x5b000 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:442 - pramin=0x195000, pte=810, pte_end=992 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:443 - first vram page: 0x00630000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a76c660 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:562 - p_offset=0x00195200 b_offset=0xffffffff size=0x00004000 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:567 - gpuobj ffff88015a76c9c0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572a20 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572900 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=32768 align=16 flags=0x00000002 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a76c540 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0x00000000 gpuobj=ffff88015a76c540 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch2 class=0x003d offset=0x0 size=0x60000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a76c000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0xd8000001 gpuobj=ffff88015a76c000 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0xd8000001 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000d0 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch2 0x000000d0: h=0xd8000001, c=0x00000e00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0xd8000002 gpuobj=ffff88015a76c000 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0xd8000002 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000c8 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch2 0x000000c8: h=0xd8000002, c=0x00000e00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch2 class=0x003d offset=0x0 size=0x60000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=1 target=3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a76cc60 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0x00000000 gpuobj=ffff88015a76cc60 [drm] nouveau 0000:03:00.0: nv50_graph_create_context:213 - ch2 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=307200 align=4096 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a76ce40 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a76ce40 [drm] nouveau 0000:03:00.0: nv50_fifo_create_context:226 - ch2 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=256 align=256 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a76cf00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a76cf00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=4096 align=1024 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126ba0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff880156126ba0 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:63 - ch2 [drm] nouveau 0000:03:00.0: nv50_fifo_playlist_update:39 - [drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:819 - ch2 class=0x5039 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff8801561268a0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0x80000001 gpuobj=ffff8801561268a0 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x80000001 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000088 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch2 0x00000088: h=0x80000001, c=0x00100e04 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0x8000000e gpuobj=ffff8801561269c0 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x8000000e [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000f0 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch2 0x000000f0: h=0x8000000e, c=0x00000004 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch2 class=0x003d offset=0x20030000 size=0x20 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126a80 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0x80000006 gpuobj=ffff880156126a80 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x80000006 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000b0 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch2 0x000000b0: h=0x80000006, c=0x00000e06 [drm] nouveau 0000:03:00.0: nouveau_channel_alloc: initialised FIFO 2 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:819 - ch2 class=0x0030 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126d80 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0x00000000 gpuobj=ffff880156126d80 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch2 0x00000000: h=0x00000000, c=0x00100e08 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x40 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x50 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x60 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x70 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch2 class=0x003d offset=0x20030020 size=0x20 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126900 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0xd8000003 gpuobj=ffff880156126900 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0xd8000003 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000c0 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch2 0x000000c0: h=0xd8000003, c=0x00000e0a [drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:819 - ch2 class=0x502d [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff8801561267e0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0x80000020 gpuobj=ffff8801561267e0 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x80000020 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000180 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch2 0x00000180: h=0x80000020, c=0x00100e0c [drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:819 - ch2 class=0x5039 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126d20 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0x80000018 gpuobj=ffff880156126d20 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x80000018 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000040 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch2 0x00000040: h=0x80000018, c=0x00100e0e [drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:819 - ch2 class=0x8397 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126660 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0x80000019 gpuobj=ffff880156126660 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x80000019 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000048 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch2 0x00000048: h=0x80000019, c=0x00100e20 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0x80000021 gpuobj=ffff880156126c60 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0x80000021 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000188 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch2 0x00000188: h=0x80000021, c=0x00000004 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch2 class=0x003d offset=0x20030040 size=0x20 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch2 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126cc0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch2 h=0xd8000004 gpuobj=ffff880156126cc0 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch2 handle=0xd8000004 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000f8 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch2 0x000000f8: h=0xd8000004, c=0x00000e22 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 4096 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x80 [drm] nouveau 0000:03:00.0: Allocating FIFO number 3 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x1080 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x1090 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init:944 - ch3 vram=0xbeef0201 tt=0xbeef0202 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_channel_init_pramin:894 - ch3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch-1 size=369664 align=4096 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126f00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:235 - global heap [drm] nouveau 0000:03:00.0: nv50_instmem_bind:435 - st=0x1f0000 sz=0x5b000 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:442 - pramin=0x1f0000, pte=992, pte_end=1174 [drm] nouveau 0000:03:00.0: nv50_instmem_bind:443 - first vram page: 0x00ae0000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff880156126f00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:562 - p_offset=0x001f0200 b_offset=0xffffffff size=0x00004000 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new_fake:567 - gpuobj ffff880156126720 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572a20 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff88015a572900 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch3 size=32768 align=16 flags=0x00000002 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126ea0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch3 h=0x00000000 gpuobj=ffff880156126ea0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch3 class=0x003d offset=0x0 size=0x60000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch3 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126780 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch3 h=0xbeef0201 gpuobj=ffff880156126780 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0xbeef0201 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000160 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch3 0x00000160: h=0xbeef0201, c=0x00000e00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch3 h=0xbeef0202 gpuobj=ffff880156126780 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0xbeef0202 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000178 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch3 0x00000178: h=0xbeef0202, c=0x00000e00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch3 class=0x003d offset=0x0 size=0x60000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=1 target=3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch3 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126ae0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch3 h=0x00000000 gpuobj=ffff880156126ae0 [drm] nouveau 0000:03:00.0: nv50_graph_create_context:213 - ch3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch3 size=307200 align=4096 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126c00 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff880156126c00 [drm] nouveau 0000:03:00.0: nv50_fifo_create_context:226 - ch3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch3 size=256 align=256 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126600 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff880156126600 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch3 size=4096 align=1024 flags=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff880156126b40 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch-1 h=0x00000000 gpuobj=ffff880156126b40 [drm] nouveau 0000:03:00.0: nv50_fifo_channel_enable:63 - ch3 [drm] nouveau 0000:03:00.0: nv50_fifo_playlist_update:39 - [drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:819 - ch3 class=0x5039 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch3 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572120 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch3 h=0x80000001 gpuobj=ffff88015a572120 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0x80000001 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000088 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch3 0x00000088: h=0x80000001, c=0x00100e04 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch3 h=0x8000000e gpuobj=ffff88015a5721e0 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0x8000000e [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000f0 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch3 0x000000f0: h=0x8000000e, c=0x00000004 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch3 class=0x003d offset=0x21090000 size=0x20 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch3 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015a572000 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch3 h=0x80000006 gpuobj=ffff88015a572000 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0x80000006 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000000b0 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch3 0x000000b0: h=0x80000006, c=0x00000e06 [drm] nouveau 0000:03:00.0: nouveau_channel_alloc: initialised FIFO 3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:819 - ch3 class=0x0030 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch3 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015635e120 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch3 h=0x00000000 gpuobj=ffff88015635e120 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000000 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch3 0x00000000: h=0x00000000, c=0x00100e08 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x10a0 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x10b0 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x10c0 [drm] nouveau 0000:03:00.0: nouveau_sgdma_populate:28 - num_pages = 16 [drm] nouveau 0000:03:00.0: nouveau_sgdma_bind:98 - pg=0x10d0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:819 - ch3 class=0x5039 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch3 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015635e300 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch3 h=0xbeef5039 gpuobj=ffff88015635e300 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0xbeef5039 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x000001e8 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch3 0x000001e8: h=0xbeef5039, c=0x00100e0a [drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:819 - ch3 class=0x502d [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch3 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015635e8a0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch3 h=0xbeef502d gpuobj=ffff88015635e8a0 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0xbeef502d [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000148 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch3 0x00000148: h=0xbeef502d, c=0x00100e0c [drm] nouveau 0000:03:00.0: nouveau_gpuobj_gr_new:819 - ch3 class=0x8397 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch3 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015635ede0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch3 h=0xbeef5097 gpuobj=ffff88015635ede0 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0xbeef5097 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000498 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch3 0x00000498: h=0xbeef5097, c=0x00100e0e [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:660 - ch3 class=0x003d offset=0x21090020 size=0x20 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_dma_new:661 - access=0 target=3 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:212 - ch3 size=24 align=16 flags=0x00000006 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:220 - gpuobj ffff88015635e3c0 [drm] nouveau 0000:03:00.0: nouveau_gpuobj_new:232 - channel heap [drm] nouveau 0000:03:00.0: nouveau_gpuobj_ref_add:439 - ch3 h=0xbeef0301 gpuobj=ffff88015635e3c0 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:75 - ch3 handle=0xbeef0301 [drm] nouveau 0000:03:00.0: nouveau_ramht_hash_handle:86 - hash=0x00000960 [drm] nouveau 0000:03:00.0: nouveau_ramht_insert:140 - insert ch3 0x00000960: h=0xbeef0301, c=0x00000e20 [drm:drm_mode_addfb], [FB:17] [drm:drm_mode_setcrtc], [CRTC:5] [drm:drm_mode_setcrtc], [CONNECTOR:7:LVDS-1] [drm:drm_crtc_helper_set_config], [drm:drm_crtc_helper_set_config], [CRTC:5] [FB:17] #connectors=1 (x y) (0 0) [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set [drm:drm_crtc_helper_set_config], modes are different, full mode set [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 [drm:drm_mode_debug_printmodeline], Modeline 25:"1280x800" 0 66090 1280 1320 1344 1360 800 803 809 812 0x0 0x9 [drm:drm_crtc_helper_set_config], encoder changed, full mode switch [drm:drm_crtc_helper_set_config], crtc changed, full mode switch [drm:drm_crtc_helper_set_config], [CONNECTOR:7:LVDS-1] to [CRTC:5] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace [drm:drm_mode_debug_printmodeline], Modeline 25:"1280x800" 0 66090 1280 1320 1344 1360 800 803 809 812 0x0 0x9 [drm] nouveau 0000:03:00.0: nv50_sor_mode_fixup:155 - or 0 [drm:drm_crtc_helper_set_mode], [CRTC:5] [drm] nouveau 0000:03:00.0: nv50_crtc_prepare:458 - index 0 [drm] nouveau 0000:03:00.0: nv50_crtc_blank:71 - index 0 [drm] nouveau 0000:03:00.0: nv50_crtc_blank:72 - blanked [drm] nouveau 0000:03:00.0: nv50_cursor_hide:79 - [drm] nouveau 0000:03:00.0: nv50_crtc_mode_set:620 - index 0 [drm] nouveau 0000:03:00.0: nv50_crtc_set_dither:142 - [drm] nouveau 0000:03:00.0: nv50_crtc_set_scale:196 - [drm] nouveau 0000:03:00.0: nv50_crtc_do_mode_set_base:505 - index 0 [drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - [drm:drm_crtc_helper_set_mode], [ENCODER:8:LVDS-8] set [MODE:25:1280x800] [drm] nouveau 0000:03:00.0: nv50_sor_mode_set:196 - or 0 type 3 -> crtc 0 [drm] nouveau 0000:03:00.0: nv50_sor_dpms:77 - or 0 type 3 mode 0 [drm] nouveau 0000:03:00.0: nv50_crtc_commit:472 - index 0 [drm] nouveau 0000:03:00.0: nv50_crtc_blank:71 - index 0 [drm] nouveau 0000:03:00.0: nv50_crtc_blank:72 - unblanked [drm] nouveau 0000:03:00.0: nv50_cursor_hide:79 - [drm] nouveau 0000:03:00.0: nv50_crtc_lut_load:48 - [drm] nouveau 0000:03:00.0: nv50_display_irq_handler:1084 - PDISPLAY_INTR 0x00000000 0x00000010 [drm] nouveau 0000:03:00.0: nv50_display_irq_handler:1084 - PDISPLAY_INTR 0x00000000 0x00000010 [drm] nouveau 0000:03:00.0: nv50_display_irq_handler_bh:974 - PDISPLAY_INTR_BH 0x00000000 0x00000010 [drm] nouveau 0000:03:00.0: nv50_display_unk10_handler:678 - 0x610030: 0x000002a0 [drm] nouveau 0000:03:00.0: nv50_display_unk10_handler:698 - DAC-0 mc: 0x00000000 [drm] nouveau 0000:03:00.0: nv50_display_unk10_handler:698 - DAC-1 mc: 0x00000000 [drm] nouveau 0000:03:00.0: nv50_display_unk10_handler:698 - DAC-2 mc: 0x00000000 [drm] nouveau 0000:03:00.0: nv50_display_unk10_handler:721 - SOR-0 mc: 0x00000000 [drm] nouveau 0000:03:00.0: nv50_display_unk10_handler:721 - SOR-1 mc: 0x00000000 [drm] nouveau 0000:03:00.0: nv50_display_unk10_handler:721 - SOR-2 mc: 0x00000000 [drm] nouveau 0000:03:00.0: nv50_display_unk10_handler:721 - SOR-3 mc: 0x00000000 [drm] nouveau 0000:03:00.0: nv50_display_irq_handler_bh:974 - PDISPLAY_INTR_BH 0x00000000 0x00000020 [drm] nouveau 0000:03:00.0: nv50_display_unk20_handler:800 - 0x610030: 0x000002b0 [drm] nouveau 0000:03:00.0: Loading PLL limits for reg 0x00614100 [drm] nouveau 0000:03:00.0: pll.vco1.minfreq: 250000 [drm] nouveau 0000:03:00.0: pll.vco1.maxfreq: 500000 [drm] nouveau 0000:03:00.0: pll.vco1.min_inputfreq: 4000 [drm] nouveau 0000:03:00.0: pll.vco1.max_inputfreq: 27000 [drm] nouveau 0000:03:00.0: pll.vco1.min_n: 20 [drm] nouveau 0000:03:00.0: pll.vco1.max_n: 255 [drm] nouveau 0000:03:00.0: pll.vco1.min_m: 1 [drm] nouveau 0000:03:00.0: pll.vco1.max_m: 255 [drm] nouveau 0000:03:00.0: pll.vco2.minfreq: 500000 [drm] nouveau 0000:03:00.0: pll.vco2.maxfreq: 1000000 [drm] nouveau 0000:03:00.0: pll.vco2.min_inputfreq: 14000 [drm] nouveau 0000:03:00.0: pll.vco2.max_inputfreq: 75000 [drm] nouveau 0000:03:00.0: pll.vco2.min_n: 14 [drm] nouveau 0000:03:00.0: pll.vco2.max_n: 255 [drm] nouveau 0000:03:00.0: pll.vco2.min_m: 1 [drm] nouveau 0000:03:00.0: pll.vco2.max_m: 255 [drm] nouveau 0000:03:00.0: pll.max_log2p: 6 [drm] nouveau 0000:03:00.0: pll.log2p_bias: 0 [drm] nouveau 0000:03:00.0: pll.refclk: 25000 [drm] nouveau 0000:03:00.0: nv50_crtc_set_clock:287 - pclk 66090 out 66091 NM1 115 6 NM2 32 29 P 3 [drm] nouveau 0000:03:00.0: nv50_display_unk20_handler:829 - DAC-0 mc: 0x00000000 [drm] nouveau 0000:03:00.0: nv50_display_unk20_handler:829 - DAC-1 mc: 0x00000000 [drm] nouveau 0000:03:00.0: nv50_display_unk20_handler:829 - DAC-2 mc: 0x00000000 [drm] nouveau 0000:03:00.0: nv50_display_unk20_handler:852 - SOR-0 mc: 0x00002001 [drm] nouveau 0000:03:00.0: Searching for output entry for 3 0 1 [drm] nouveau 0000:03:00.0: 0xC1D1: parsing clock script 0 [drm] nouveau 0000:03:00.0: 0xC1D1: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:03:00.0: 0xC1D1: Executing subroutine at 0xC2E5 [drm] nouveau 0000:03:00.0: 0xC2E5: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xC2E5: Reg: 0x4061C00C, Mask: 0xFFFFFFFE, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061C00C, Data: 0x01060200 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C00C, Data: 0x01060200 [drm] nouveau 0000:03:00.0: 0xC2F2: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xC2F2: Reg: 0x4061C00C, Mask: 0xFFFFFFFE, Data: 0x00000001 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061C00C, Data: 0x01060200 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C00C, Data: 0x01060201 [drm] nouveau 0000:03:00.0: 0xC2FF: [ (0x74) - INIT_TIME ] [drm] nouveau 0000:03:00.0: 0xC2FF: Sleeping for 0x3E80 microseconds [drm] nouveau 0000:03:00.0: 0xC302: [ (0x6E) - INIT_NV_REG ] [drm] nouveau 0000:03:00.0: 0xC302: Reg: 0x4061C00C, Mask: 0xFFFFFFFE, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Read: Reg: 0x0061C00C, Data: 0x01060201 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C00C, Data: 0x01060200 [drm] nouveau 0000:03:00.0: 0xC30F: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: 0xC1D1: End of 0xC2E5 subroutine [drm] nouveau 0000:03:00.0: 0xC1D4: [ (0x58) - INIT_ZM_REG_SEQUENCE ] [drm] nouveau 0000:03:00.0: 0xC1D4: BaseReg: 0x4061C00C, Count: 0x05 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C00C, Data: 0x01060200 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C010, Data: 0x0100000A [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C014, Data: 0x00000000 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C018, Data: 0x000F4AF8 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C01C, Data: 0x0001CAF8 [drm] nouveau 0000:03:00.0: 0xC1EE: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:03:00.0: 0xC1EE: Executing subroutine at 0xC33B [drm] nouveau 0000:03:00.0: 0xC33B: [ (0x58) - INIT_ZM_REG_SEQUENCE ] [drm] nouveau 0000:03:00.0: 0xC33B: BaseReg: 0x4061C118, Count: 0x02 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C118, Data: 0x0C0C0C0C [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C11C, Data: 0x0000000C [drm] nouveau 0000:03:00.0: 0xC349: [ (0x58) - INIT_ZM_REG_SEQUENCE ] [drm] nouveau 0000:03:00.0: 0xC349: BaseReg: 0x4061C198, Count: 0x02 [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C198, Data: 0x0C0C0C0C [drm] nouveau 0000:03:00.0: Write: Reg: 0x0061C19C, Data: 0x0000000C [drm] nouveau 0000:03:00.0: 0xC357: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: 0xC1EE: End of 0xC33B subroutine [drm] nouveau 0000:03:00.0: 0xC1F1: [ (0x5B) - INIT_SUB_DIRECT ] [drm] nouveau 0000:03:00.0: 0xC1F1: Executing subroutine at 0xC358 [drm] nouveau 0000:03:00.0: 0xC358: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: 0xC1F1: End of 0xC358 subroutine [drm] nouveau 0000:03:00.0: 0xC1F4: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: nv50_display_irq_handler_bh:974 - PDISPLAY_INTR_BH 0x00000000 0x00000000 [drm] nouveau 0000:03:00.0: nv50_display_irq_handler:1084 - PDISPLAY_INTR 0x00000000 0x00000044 [drm] nouveau 0000:03:00.0: nv50_display_irq_handler:1084 - PDISPLAY_INTR 0x00000000 0x00000040 [drm] nouveau 0000:03:00.0: nv50_display_irq_handler_bh:974 - PDISPLAY_INTR_BH 0x00000000 0x00000040 [drm] nouveau 0000:03:00.0: nv50_display_unk40_handler:949 - 0x610030: 0x000002b0 [drm] nouveau 0000:03:00.0: Searching for output entry for 3 0 1 [drm] nouveau 0000:03:00.0: 0xC359: parsing clock script 1 [drm] nouveau 0000:03:00.0: 0xC359: [ (0x71) - INIT_DONE ] [drm] nouveau 0000:03:00.0: nv50_display_irq_handler_bh:974 - PDISPLAY_INTR_BH 0x00000000 0x00000000 ath9k 0000:06:00.0: PCI INT A disabled ath9k: Driver unloaded cfg80211: Calling CRDA to update world regulatory domain cfg80211: World regulatory domain updated: (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp) (2402000 KHz - 2472000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) (2457000 KHz - 2482000 KHz @ 20000 KHz), (300 mBi, 2000 mBm) (2474000 KHz - 2494000 KHz @ 20000 KHz), (300 mBi, 2000 mBm) (5170000 KHz - 5250000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) (5735000 KHz - 5835000 KHz @ 40000 KHz), (300 mBi, 2000 mBm) ath9k 0000:06:00.0: PCI INT A -> Link[Z016] -> GSI 21 (level, low) -> IRQ 21 ath9k 0000:06:00.0: setting latency timer to 64 ath: EEPROM regdomain: 0x60 ath: EEPROM indicates we should expect a direct regpair map ath: Country alpha2 being used: 00 ath: Regpair used: 0x60 phy0: Selected rate control algorithm 'ath9k_rate_control' Registered led device: ath9k-phy0::radio Registered led device: ath9k-phy0::assoc Registered led device: ath9k-phy0::tx Registered led device: ath9k-phy0::rx phy0: Atheros AR9280 Rev:2 mem=0xffffc90001140000, irq=21 ADDRCONF(NETDEV_UP): wlan0: link is not ready wlan0: authenticate with 12:68:16:9a:85:0c (try 1) wlan0: authenticated wlan0: associate with 12:68:16:9a:85:0c (try 1) wlan0: RX AssocResp from 12:68:16:9a:85:0c (capab=0x411 status=0 aid=2) wlan0: associated ADDRCONF(NETDEV_CHANGE): wlan0: link becomes ready Intel AES-NI instructions are not detected. [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - padlock: VIA PadLock not detected. [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] [drm] nouveau 0000:03:00.0: nouveau_connector_native_mode:454 - native mode from preferred [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes : [drm:drm_mode_debug_printmodeline], Modeline 16:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9 [drm:drm_mode_debug_printmodeline], Modeline 18:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 19:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 21:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 20:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 22:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 23:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6 [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_mode_getconnector], [CONNECTOR:9:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] disconnected [drm:drm_mode_getconnector], [CONNECTOR:9:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] disconnected [drm:drm_mode_getconnector], [CONNECTOR:11:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] disconnected [drm:drm_mode_getconnector], [CONNECTOR:11:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] disconnected [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] [drm] nouveau 0000:03:00.0: nouveau_connector_native_mode:454 - native mode from preferred [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes : [drm:drm_mode_debug_printmodeline], Modeline 16:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9 [drm:drm_mode_debug_printmodeline], Modeline 18:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 19:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 21:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 20:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 22:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 23:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6 [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] [drm] nouveau 0000:03:00.0: nouveau_connector_native_mode:454 - native mode from preferred [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes : [drm:drm_mode_debug_printmodeline], Modeline 16:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9 [drm:drm_mode_debug_printmodeline], Modeline 18:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 19:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 21:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 20:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 22:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 23:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6 [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_mode_getconnector], [CONNECTOR:9:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] disconnected [drm:drm_mode_getconnector], [CONNECTOR:9:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] disconnected [drm:drm_mode_getconnector], [CONNECTOR:11:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] disconnected [drm:drm_mode_getconnector], [CONNECTOR:11:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] disconnected [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] [drm] nouveau 0000:03:00.0: nouveau_connector_native_mode:454 - native mode from preferred [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes : [drm:drm_mode_debug_printmodeline], Modeline 16:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9 [drm:drm_mode_debug_printmodeline], Modeline 18:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 19:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 21:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 20:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 22:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 23:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6 [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] [drm] nouveau 0000:03:00.0: nouveau_connector_native_mode:454 - native mode from preferred [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes : [drm:drm_mode_debug_printmodeline], Modeline 16:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9 [drm:drm_mode_debug_printmodeline], Modeline 18:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 19:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 21:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 20:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 22:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 23:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6 [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_mode_getconnector], [CONNECTOR:9:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] disconnected [drm:drm_mode_getconnector], [CONNECTOR:9:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-2] disconnected [drm:drm_mode_getconnector], [CONNECTOR:11:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] disconnected [drm:drm_mode_getconnector], [CONNECTOR:11:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:11:DisplayPort-1] disconnected [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] [drm] nouveau 0000:03:00.0: nouveau_connector_native_mode:454 - native mode from preferred [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes : [drm:drm_mode_debug_printmodeline], Modeline 16:"1280x800" 60 66090 1280 1320 1344 1360 800 803 809 812 0x48 0x9 [drm:drm_mode_debug_printmodeline], Modeline 18:"1024x768" 60 63500 1024 1072 1176 1328 768 771 775 798 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 19:"800x600" 60 38250 800 832 912 1024 600 603 607 624 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 21:"640x480" 59 23750 640 664 720 800 480 483 487 500 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 20:"720x400" 60 22250 720 744 808 896 400 403 413 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 22:"640x400" 60 20000 640 664 720 800 400 403 409 417 0x40 0x6 [drm:drm_mode_debug_printmodeline], Modeline 23:"640x350" 60 17500 640 664 720 800 350 353 363 366 0x40 0x6 [drm:drm_mode_getconnector], [CONNECTOR:7:?] [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 lo: Disabled Privacy Extensions [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_hide:79 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_cursor_set_offset:120 - [drm] nouveau 0000:03:00.0: nv50_cursor_show:44 - [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1 [drm] nouveau 0000:03:00.0: nv50_dac_detect:94 - Using bios provided load_pattern of 384 [drm] nouveau 0000:03:00.0: nv50_dac_detect:117 - Load was not detected on output with or 1 [drm] nouveau 0000:03:00.0: nouveau_dp_auxch:486 - ch 0 cmd 4 addr 0x50 len 1