diff -up linux-2.6.37-rc1_orig/drivers/gpu/drm/i915//intel_display.c linux-2.6.37-rc1/drivers/gpu/drm/i915//intel_display.c
--- linux-2.6.37-rc1_orig/drivers/gpu/drm/i915//intel_display.c	2010-11-01 12:54:12.000000000 +0100
+++ linux-2.6.37-rc1/drivers/gpu/drm/i915//intel_display.c	2010-11-08 12:03:55.929439001 +0100
@@ -1929,7 +1929,7 @@ static void ironlake_fdi_enable(struct d
 	/* Write the TU size bits so error detection works */
 	I915_WRITE(FDI_RX_TUSIZE1(pipe),
 		   I915_READ(PIPE_DATA_M1(pipe)) & TU_SIZE_MASK);
-
+	if (!HAS_eDP) {
 	/* enable PCH FDI RX PLL, wait warmup plus DMI latency */
 	reg = FDI_RX_CTL(pipe);
 	temp = I915_READ(reg);
@@ -1957,6 +1957,7 @@ static void ironlake_fdi_enable(struct d
 		POSTING_READ(reg);
 		udelay(100);
 	}
+		}
 }
 
 static void intel_flush_display_plane(struct drm_device *dev,
@@ -2055,7 +2056,7 @@ static void ironlake_crtc_enable(struct
 		I915_WRITE(reg, temp | DISPLAY_PLANE_ENABLE);
 		intel_flush_display_plane(dev, plane);
 	}
-
+	if (!HAS_eDP) {
 	/* For PCH output, training FDI link */
 	if (IS_GEN6(dev))
 		gen6_fdi_link_train(crtc);
@@ -2136,7 +2137,7 @@ static void ironlake_crtc_enable(struct
 	I915_WRITE(reg, temp | TRANS_ENABLE);
 	if (wait_for(I915_READ(reg) & TRANS_STATE_ENABLE, 100))
 		DRM_ERROR("failed to enable transcoder %d\n", pipe);
-
+	}
 	intel_crtc_load_lut(crtc);
 	intel_update_fbc(dev);
 	intel_crtc_update_cursor(crtc, true);
diff -up linux-2.6.37-rc1_orig/drivers/gpu/drm/i915//intel_dp.c linux-2.6.37-rc1/drivers/gpu/drm/i915//intel_dp.c
--- linux-2.6.37-rc1_orig/drivers/gpu/drm/i915//intel_dp.c	2010-11-01 12:54:12.000000000 +0100
+++ linux-2.6.37-rc1/drivers/gpu/drm/i915//intel_dp.c	2010-11-08 12:04:19.409693002 +0100
@@ -584,17 +584,6 @@ intel_dp_mode_fixup(struct drm_encoder *
 		mode->clock = dev_priv->panel_fixed_mode->clock;
 	}
 
-	/* Just use VBT values for eDP */
-	if (is_edp(intel_dp)) {
-		intel_dp->lane_count = dev_priv->edp.lanes;
-		intel_dp->link_bw = dev_priv->edp.rate;
-		adjusted_mode->clock = intel_dp_link_clock(intel_dp->link_bw);
-		DRM_DEBUG_KMS("eDP link bw %02x lane count %d clock %d\n",
-			      intel_dp->link_bw, intel_dp->lane_count,
-			      adjusted_mode->clock);
-		return true;
-	}
-
 	for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
 		for (clock = 0; clock <= max_clock; clock++) {
 			int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
@@ -613,6 +602,19 @@ intel_dp_mode_fixup(struct drm_encoder *
 		}
 	}
 
+	if (is_edp(intel_dp)) {
+		/* okay we failed just pick the highest */
+		intel_dp->lane_count = max_lane_count;
+		intel_dp->link_bw = bws[max_clock];
+		adjusted_mode->clock = intel_dp_link_clock(intel_dp->link_bw);
+		DRM_DEBUG_KMS("Force picking display port link bw %02x lane "
+			      "count %d clock %d\n",
+			      intel_dp->link_bw, intel_dp->lane_count,
+			      adjusted_mode->clock);
+
+		return true;
+	}
+
 	return false;
 }
 
@@ -1467,7 +1469,7 @@ ironlake_dp_detect(struct intel_dp *inte
 
 	/* Can't disconnect eDP */
 	if (is_edp(intel_dp))
-		return connector_status_connected;
+		ironlake_edp_panel_on(intel_dp);
 
 	status = connector_status_disconnected;
 	if (intel_dp_aux_native_read(intel_dp,
Alleen in linux-2.6.37-rc1/drivers/gpu/drm/i915/: intel_dp.c.orig