usage: objview file.obj
(using default bunny.obj)
r300: Initial vertex program
VERT
DCL IN[0]
DCL IN[1]
DCL OUT[0], POSITION
DCL OUT[1], GENERIC[0]
  0: MOV OUT[0], IN[0]
  1: MOV OUT[1], IN[1]
  2: END
Vertex Program: before compilation
# Radeon Compiler Program
  0: MOV temp[0], input[0];
  1: MOV output[1], input[1];
  2: MOV output[0], temp[0];
  3: MOV output[2], temp[0];
Vertex Program: after 'transform loops'
# Radeon Compiler Program
  0: MOV temp[0], input[0];
  1: MOV output[1], input[1];
  2: MOV output[0], temp[0];
  3: MOV output[2], temp[0];
Vertex Program: after 'emulate branches'
# Radeon Compiler Program
  0: MOV temp[0], input[0];
  1: MOV output[1], input[1];
  2: MOV output[0], temp[0];
  3: MOV output[2], temp[0];
Vertex Program: after 'emulate negative addressing'
# Radeon Compiler Program
  0: MOV temp[0], input[0];
  1: MOV output[1], input[1];
  2: MOV output[0], temp[0];
  3: MOV output[2], temp[0];
Vertex Program: after 'native rewrite'
# Radeon Compiler Program
  0: MOV temp[0], input[0];
  1: MOV output[1], input[1];
  2: MOV output[0], temp[0];
  3: MOV output[2], temp[0];
Vertex Program: after 'emulate modifiers'
# Radeon Compiler Program
  0: MOV temp[0], input[0];
  1: MOV output[1], input[1];
  2: MOV output[0], temp[0];
  3: MOV output[2], temp[0];
Vertex Program: after 'deadcode'
# Radeon Compiler Program
  0: MOV temp[0], input[0];
  1: MOV output[1], input[1];
  2: MOV output[0], temp[0];
  3: MOV output[2], temp[0];
Vertex Program: after 'dataflow optimize'
# Radeon Compiler Program
  0: MOV output[1], input[1];
  1: MOV output[0], input[0];
  2: MOV output[2], input[0];
Vertex Program: after 'source conflict resolve'
# Radeon Compiler Program
  0: MOV output[1], input[1];
  1: MOV output[0], input[0];
  2: MOV output[2], input[0];
Vertex Program: after 'register allocation'
# Radeon Compiler Program
  0: MOV output[1], input[1];
  1: MOV output[0], input[0];
  2: MOV output[2], input[0];
Vertex Program: after 'dead constants'
# Radeon Compiler Program
  0: MOV output[1], input[1];
  1: MOV output[0], input[0];
  2: MOV output[2], input[0];
Final vertex program code:
0: op: 0x00f02203 dst: 1o op:                    VE_ADD
 src0: 0x00d10021 reg: 1i swiz:  X/ Y/ Z/ W
 src1: 0x01248021 reg: 1i swiz:  0/ 0/ 0/ 0
 src2: 0x01248021 reg: 1i swiz:  0/ 0/ 0/ 0
1: op: 0x00f00203 dst: 0o op:                    VE_ADD
 src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
 src1: 0x01248001 reg: 0i swiz:  0/ 0/ 0/ 0
 src2: 0x01248001 reg: 0i swiz:  0/ 0/ 0/ 0
2: op: 0x00f04203 dst: 2o op:                    VE_ADD
 src0: 0x00d10001 reg: 0i swiz:  X/ Y/ Z/ W
 src1: 0x01248001 reg: 0i swiz:  0/ 0/ 0/ 0
 src2: 0x01248001 reg: 0i swiz:  0/ 0/ 0/ 0
Flow Control Ops: 0x00000000
r300: DRM version: 2.7.0, Name: ATI RV350, ID: 0x4152, GB: 1, Z: 1
r300: GART size: 253 MB, VRAM size: 128 MB
r300: AA compression RAM: YES, Z compression RAM: YES, HiZ RAM: NO
Generating normals.
glmVertexNormals(): 34905 normals generated
Load cube face 0x8515: alpine_east.rgb 1024 x 1024
r300: Initial fragment program
FRAG
DCL IN[0], GENERIC[0], LINEAR
DCL OUT[0], COLOR
DCL SAMP[0]
  0: TEX OUT[0], IN[0], SAMP[0], 2D
  1: END
Fragment Program: before compilation
# Radeon Compiler Program
  0: TEX output[0], input[0], 2D[0];
Fragment Program: after 'rewrite depth out'
# Radeon Compiler Program
  0: TEX output[0], input[0], 2D[0];
Fragment Program: after 'transform KILP'
# Radeon Compiler Program
  0: TEX output[0], input[0], 2D[0];
Fragment Program: after 'transform loops'
# Radeon Compiler Program
  0: TEX output[0], input[0], 2D[0];
Fragment Program: after 'emulate branches'
# Radeon Compiler Program
  0: TEX output[0], input[0], 2D[0];
Fragment Program: after 'transform TEX'
# Radeon Compiler Program
  0: TEX temp[1], input[0], 2D[0];
  1: MOV output[0], temp[1];
Fragment Program: after 'native rewrite'
# Radeon Compiler Program
  0: TEX temp[1], input[0], 2D[0];
  1: MOV output[0], temp[1];
Fragment Program: after 'deadcode'
# Radeon Compiler Program
  0: TEX temp[1], input[0].xy__, 2D[0];
  1: MOV output[0], temp[1];
Fragment Program: after 'emulate loops'
# Radeon Compiler Program
  0: TEX temp[1], input[0].xy__, 2D[0];
  1: MOV output[0], temp[1];
Fragment Program: after 'dataflow optimize'
# Radeon Compiler Program
  0: TEX temp[1], input[0].xy__, 2D[0];
  1: MOV output[0], temp[1];
Fragment Program: after 'dataflow swizzles'
# Radeon Compiler Program
  0: TEX temp[1], input[0].xy__, 2D[0];
  1: MOV output[0], temp[1];
Fragment Program: after 'dead constants'
# Radeon Compiler Program
  0: TEX temp[1], input[0].xy__, 2D[0];
  1: MOV output[0], temp[1];
Fragment Program: after 'register rename'
# Radeon Compiler Program
  0: TEX temp[0], input[0].xy__, 2D[0];
  1: MOV output[0], temp[0];
Fragment Program: after 'pair translate'
# Radeon Compiler Program
  0: TEX temp[0], input[0].xy__, 2D[0];
  1: src0.xyz = temp[0], src0.w = temp[0]
     MAD color[0].xyz, src0.xyz, src0.111, src0.000
     MAD color[0].w, src0.w, src0.1, src0.0
Fragment Program: after 'pair scheduling'
# Radeon Compiler Program
  0: BEGIN_TEX;
  1: TEX temp[0], input[0].xy__, 2D[0];
  2: src0.xyz = temp[0], src0.w = temp[0]
     MAD color[0].xyz, src0.xyz, src0.111, src0.000
     MAD color[0].w, src0.w, src0.1, src0.0
Fragment Program: after 'dead sources'
# Radeon Compiler Program
  0: BEGIN_TEX;
  1: TEX temp[0], input[0].xy__, 2D[0];
  2: src0.xyz = temp[0], src0.w = temp[0]
     MAD color[0].xyz, src0.xyz, src0.111, src0.000
     MAD color[0].w, src0.w, src0.1, src0.0
Fragment Program: after 'register allocation'
# Radeon Compiler Program
  0: BEGIN_TEX;
  1: TEX temp[0], input[0].xy__, 2D[0];
  2: src0.xyz = temp[0], src0.w = temp[0]
     MAD color[0].xyz, src0.xyz, src0.111, src0.000
     MAD color[0].w, src0.w, src0.1, src0.0
pc=0*************************************
Hardware program
----------------
NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400000)
  TEX:
    TEX t0, t0, texture[0]   (00008000)
  0: xyz:  t0  t0  t0  bias-> o0.xyz               (1c000000)
       w:  t0  t0  t0  bias-> o0.w                 (01000000)
     xyz:   t0.xyz      1.0      0.0    op: 00050a80 
       w:     t0.w      1.0      0.0    op: 00040889
Load cube face 0x8516: alpine_west.rgb 1024 x 1024
Load cube face 0x8517: alpine_up.rgb 1024 x 1024
Load cube face 0x8518: alpine_down.rgb 1024 x 1024
Load cube face 0x8519: alpine_south.rgb 1024 x 1024
Load cube face 0x851a: alpine_north.rgb 1024 x 1024
r300: Initial vertex program
VERT
DCL IN[0]
DCL IN[1]
DCL OUT[0], POSITION
DCL OUT[1], COLOR
DCL CONST[0..3]
DCL TEMP[0]
  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
  4: MOV OUT[1], IN[1]
  5: END
Vertex Program: before compilation
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'transform loops'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'emulate branches'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'emulate negative addressing'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'native rewrite'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'emulate modifiers'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'deadcode'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'dataflow optimize'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'source conflict resolve'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'register allocation'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[0], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[0];
  6: MOV output[2], temp[0];
Vertex Program: after 'dead constants'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[0], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[0];
  6: MOV output[2], temp[0];
Final vertex program code:
0: op: 0x00f00002 dst: 0t op:               VE_MULTIPLY
 src0: 0x00000001 reg: 0i swiz:  X/ X/ X/ X
 src1: 0x00d10002 reg: 0c swiz:  X/ Y/ Z/ W
 src2: 0x01248002 reg: 0c swiz:  0/ 0/ 0/ 0
1: op: 0x00f00004 dst: 0t op:           VE_MULTIPLY_ADD
 src0: 0x00492001 reg: 0i swiz:  Y/ Y/ Y/ Y
 src1: 0x00d10022 reg: 1c swiz:  X/ Y/ Z/ W
 src2: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
2: op: 0x00f00004 dst: 0t op:           VE_MULTIPLY_ADD
 src0: 0x00924001 reg: 0i swiz:  Z/ Z/ Z/ Z
 src1: 0x00d10042 reg: 2c swiz:  X/ Y/ Z/ W
 src2: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
3: op: 0x00f00004 dst: 0t op:           VE_MULTIPLY_ADD
 src0: 0x00db6001 reg: 0i swiz:  W/ W/ W/ W
 src1: 0x00d10062 reg: 3c swiz:  X/ Y/ Z/ W
 src2: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
4: op: 0x00f02203 dst: 1o op:                    VE_ADD
 src0: 0x00d10021 reg: 1i swiz:  X/ Y/ Z/ W
 src1: 0x01248021 reg: 1i swiz:  0/ 0/ 0/ 0
 src2: 0x01248021 reg: 1i swiz:  0/ 0/ 0/ 0
5: op: 0x00f00203 dst: 0o op:                    VE_ADD
 src0: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
 src1: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
 src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
6: op: 0x00f04203 dst: 2o op:                    VE_ADD
 src0: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
 src1: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
 src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
Flow Control Ops: 0x00000000
radeon: Acquired Hyper-Z.
r300: Initial fragment program
FRAG
DCL IN[0], GENERIC[0], LINEAR
DCL OUT[0], COLOR
  0: MOV OUT[0], IN[0]
  1: END
Fragment Program: before compilation
# Radeon Compiler Program
  0: MOV output[0], input[0];
Fragment Program: after 'rewrite depth out'
# Radeon Compiler Program
  0: MOV output[0], input[0];
Fragment Program: after 'transform KILP'
# Radeon Compiler Program
  0: MOV output[0], input[0];
Fragment Program: after 'transform loops'
# Radeon Compiler Program
  0: MOV output[0], input[0];
Fragment Program: after 'emulate branches'
# Radeon Compiler Program
  0: MOV output[0], input[0];
Fragment Program: after 'transform TEX'
# Radeon Compiler Program
  0: MOV output[0], input[0];
Fragment Program: after 'native rewrite'
# Radeon Compiler Program
  0: MOV output[0], input[0];
Fragment Program: after 'deadcode'
# Radeon Compiler Program
  0: MOV output[0], input[0];
Fragment Program: after 'emulate loops'
# Radeon Compiler Program
  0: MOV output[0], input[0];
Fragment Program: after 'dataflow optimize'
# Radeon Compiler Program
  0: MOV output[0], input[0];
Fragment Program: after 'dataflow swizzles'
# Radeon Compiler Program
  0: MOV output[0], input[0];
Fragment Program: after 'dead constants'
# Radeon Compiler Program
  0: MOV output[0], input[0];
Fragment Program: after 'register rename'
# Radeon Compiler Program
  0: MOV output[0], input[0];
Fragment Program: after 'pair translate'
# Radeon Compiler Program
  0: src0.xyz = input[0], src0.w = input[0]
     MAD color[0].xyz, src0.xyz, src0.111, src0.000
     MAD color[0].w, src0.w, src0.1, src0.0
Fragment Program: after 'pair scheduling'
# Radeon Compiler Program
  0: src0.xyz = input[0], src0.w = input[0]
     MAD color[0].xyz, src0.xyz, src0.111, src0.000
     MAD color[0].w, src0.w, src0.1, src0.0
Fragment Program: after 'dead sources'
# Radeon Compiler Program
  0: src0.xyz = input[0], src0.w = input[0]
     MAD color[0].xyz, src0.xyz, src0.111, src0.000
     MAD color[0].w, src0.w, src0.1, src0.0
Fragment Program: after 'register allocation'
# Radeon Compiler Program
  0: src0.xyz = input[0], src0.w = input[0]
     MAD color[0].xyz, src0.xyz, src0.111, src0.000
     MAD color[0].w, src0.w, src0.1, src0.0
pc=1*************************************
Hardware program
----------------
NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400000)
  0: xyz:  t0  t0  t0  bias-> o0.xyz               (1c000000)
       w:  t0  t0  t0  bias-> o0.w                 (01000000)
     xyz:   t0.xyz      1.0      0.0    op: 00050a80 
       w:     t0.w      1.0      0.0    op: 00040889
r300: Initial vertex program
VERT
DCL IN[0]
DCL IN[1]
DCL OUT[0], POSITION
DCL OUT[1], GENERIC[0]
DCL CONST[0..3]
DCL TEMP[0]
  0: MUL TEMP[0], IN[0].xxxx, CONST[0]
  1: MAD TEMP[0], IN[0].yyyy, CONST[1], TEMP[0]
  2: MAD TEMP[0], IN[0].zzzz, CONST[2], TEMP[0]
  3: MAD OUT[0], IN[0].wwww, CONST[3], TEMP[0]
  4: MOV OUT[1], IN[1]
  5: END
Vertex Program: before compilation
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'transform loops'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'emulate branches'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'emulate negative addressing'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'native rewrite'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'emulate modifiers'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'deadcode'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'dataflow optimize'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'source conflict resolve'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[1], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[1];
  6: MOV output[2], temp[1];
Vertex Program: after 'register allocation'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[0], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[0];
  6: MOV output[2], temp[0];
Vertex Program: after 'dead constants'
# Radeon Compiler Program
  0: MUL temp[0], input[0].xxxx, const[0];
  1: MAD temp[0], input[0].yyyy, const[1], temp[0];
  2: MAD temp[0], input[0].zzzz, const[2], temp[0];
  3: MAD temp[0], input[0].wwww, const[3], temp[0];
  4: MOV output[1], input[1];
  5: MOV output[0], temp[0];
  6: MOV output[2], temp[0];
Final vertex program code:
0: op: 0x00f00002 dst: 0t op:               VE_MULTIPLY
 src0: 0x00000001 reg: 0i swiz:  X/ X/ X/ X
 src1: 0x00d10002 reg: 0c swiz:  X/ Y/ Z/ W
 src2: 0x01248002 reg: 0c swiz:  0/ 0/ 0/ 0
1: op: 0x00f00004 dst: 0t op:           VE_MULTIPLY_ADD
 src0: 0x00492001 reg: 0i swiz:  Y/ Y/ Y/ Y
 src1: 0x00d10022 reg: 1c swiz:  X/ Y/ Z/ W
 src2: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
2: op: 0x00f00004 dst: 0t op:           VE_MULTIPLY_ADD
 src0: 0x00924001 reg: 0i swiz:  Z/ Z/ Z/ Z
 src1: 0x00d10042 reg: 2c swiz:  X/ Y/ Z/ W
 src2: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
3: op: 0x00f00004 dst: 0t op:           VE_MULTIPLY_ADD
 src0: 0x00db6001 reg: 0i swiz:  W/ W/ W/ W
 src1: 0x00d10062 reg: 3c swiz:  X/ Y/ Z/ W
 src2: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
4: op: 0x00f02203 dst: 1o op:                    VE_ADD
 src0: 0x00d10021 reg: 1i swiz:  X/ Y/ Z/ W
 src1: 0x01248021 reg: 1i swiz:  0/ 0/ 0/ 0
 src2: 0x01248021 reg: 1i swiz:  0/ 0/ 0/ 0
5: op: 0x00f00203 dst: 0o op:                    VE_ADD
 src0: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
 src1: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
 src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
6: op: 0x00f04203 dst: 2o op:                    VE_ADD
 src0: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
 src1: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
 src2: 0x01248000 reg: 0t swiz:  0/ 0/ 0/ 0
Flow Control Ops: 0x00000000
r300: Initial fragment program
FRAG
PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
DCL IN[0], GENERIC[0], PERSPECTIVE
DCL OUT[0], COLOR
DCL SAMP[0]
DCL CONST[0]
DCL TEMP[0]
  0: TXP TEMP[0], IN[0], SAMP[0], CUBE
  1: MOV OUT[0].xyz, TEMP[0]
  2: MOV OUT[0].w, CONST[0]
  3: END
Fragment Program: before compilation
# Radeon Compiler Program
  0: TXP temp[0], input[0], CUBE[0];
  1: MOV output[0].xyz, temp[0];
  2: MOV output[0].w, const[0];
Fragment Program: after 'rewrite depth out'
# Radeon Compiler Program
  0: TXP temp[0], input[0], CUBE[0];
  1: MOV output[0].xyz, temp[0];
  2: MOV output[0].w, const[0];
Fragment Program: after 'transform KILP'
# Radeon Compiler Program
  0: TXP temp[0], input[0], CUBE[0];
  1: MOV output[0].xyz, temp[0];
  2: MOV output[0].w, const[0];
Fragment Program: after 'transform loops'
# Radeon Compiler Program
  0: TXP temp[0], input[0], CUBE[0];
  1: MOV output[0].xyz, temp[0];
  2: MOV output[0].w, const[0];
Fragment Program: after 'emulate branches'
# Radeon Compiler Program
  0: TXP temp[0], input[0], CUBE[0];
  1: MOV output[0].xyz, temp[0];
  2: MOV output[0].w, const[0];
Fragment Program: after 'saturate output writes'
# Radeon Compiler Program
  0: TXP temp[0], input[0], CUBE[0];
  1: MOV_SAT output[0].xyz, temp[0];
  2: MOV_SAT output[0].w, const[0];
Fragment Program: after 'transform TEX'
# Radeon Compiler Program
  0: TXP temp[0], input[0], CUBE[0];
  1: MOV_SAT output[0].xyz, temp[0];
  2: MOV_SAT output[0].w, const[0];
Fragment Program: after 'native rewrite'
# Radeon Compiler Program
  0: TXP temp[0], input[0], CUBE[0];
  1: MOV_SAT output[0].xyz, temp[0];
  2: MOV_SAT output[0].w, const[0];
Fragment Program: after 'deadcode'
# Radeon Compiler Program
  0: TXP temp[0].xyz, input[0], CUBE[0];
  1: MOV_SAT output[0].xyz, temp[0].xyz_;
  2: MOV_SAT output[0].w, const[0].___w;
Fragment Program: after 'emulate loops'
# Radeon Compiler Program
  0: TXP temp[0].xyz, input[0], CUBE[0];
  1: MOV_SAT output[0].xyz, temp[0].xyz_;
  2: MOV_SAT output[0].w, const[0].___w;
Fragment Program: after 'dataflow optimize'
# Radeon Compiler Program
  0: TXP temp[0].xyz, input[0], CUBE[0];
  1: MOV_SAT output[0].xyz, temp[0].xyz_;
  2: MOV_SAT output[0].w, const[0].___w;
Fragment Program: after 'dataflow swizzles'
# Radeon Compiler Program
  0: TXP temp[0].xyz, input[0], CUBE[0];
  1: MOV_SAT output[0].xyz, temp[0].xyz_;
  2: MOV_SAT output[0].w, const[0].___w;
Fragment Program: after 'dead constants'
# Radeon Compiler Program
  0: TXP temp[0].xyz, input[0], CUBE[0];
  1: MOV_SAT output[0].xyz, temp[0].xyz_;
  2: MOV_SAT output[0].w, const[0].___w;
Fragment Program: after 'register rename'
# Radeon Compiler Program
  0: TXP temp[1].xyz, input[0], CUBE[0];
  1: MOV_SAT output[0].xyz, temp[1].xyz_;
  2: MOV_SAT output[0].w, const[0].___w;
Fragment Program: after 'pair translate'
# Radeon Compiler Program
  0: TXP temp[1].xyz, input[0], CUBE[0];
  1: src0.xyz = temp[1]
     MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000
  2: src0.w = const[0]
     MAD_SAT color[0].w, src0.w, src0.1, src0.0
Fragment Program: after 'pair scheduling'
# Radeon Compiler Program
  0: BEGIN_TEX;
  1: TXP temp[1].xyz, input[0], CUBE[0];
  2: src0.xyz = temp[1], src0.w = const[0]
     MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000
     MAD_SAT color[0].w, src0.w, src0.1, src0.0
Fragment Program: after 'dead sources'
# Radeon Compiler Program
  0: BEGIN_TEX;
  1: TXP temp[1].xyz, input[0], CUBE[0];
  2: src0.xyz = temp[1], src0.w = const[0]
     MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000
     MAD_SAT color[0].w, src0.w, src0.1, src0.0
Fragment Program: after 'register allocation'
# Radeon Compiler Program
  0: BEGIN_TEX;
  1: TXP temp[0].xyz, input[0], CUBE[0];
  2: src0.xyz = temp[0], src0.w = const[0]
     MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000
     MAD_SAT color[0].w, src0.w, src0.1, src0.0
pc=2*************************************
Hardware program
----------------
NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400000)
  TEX:
    TXP t0, t0, texture[0]   (00018000)
  0: xyz:  t0  t0  t0  bias-> o0.xyz               (1c000000)
       w:  c0  t0  t0  bias-> o0.w                 (01000020)
     xyz:   t0.xyz      1.0      0.0    op: 40050a80 
       w:     c0.w      1.0      0.0    op: 40040889
r300: Initial vertex program
VERT
DCL IN[0]
DCL IN[1]
DCL IN[2]
DCL OUT[0], POSITION
DCL OUT[1], GENERIC[0]
DCL OUT[2], GENERIC[10]
DCL CONST[0..6]
DCL TEMP[0..1]
  0: MUL TEMP[0], CONST[0], IN[0].xxxx
  1: MAD TEMP[1], CONST[1], IN[0].yyyy, TEMP[0]
  2: MAD TEMP[0], CONST[2], IN[0].zzzz, TEMP[1]
  3: MAD OUT[0], CONST[3], IN[0].wwww, TEMP[0]
  4: MUL TEMP[0].xyz, CONST[4].xyzz, IN[1].xxxx
  5: MAD TEMP[1].xyz, CONST[5].xyzz, IN[1].yyyy, TEMP[0].xyzz
  6: MAD OUT[2].xyz, CONST[6].xyzx, IN[1].zzzx, TEMP[1].xyzx
  7: MOV OUT[1], IN[2]
  8: END
Vertex Program: before compilation
# Radeon Compiler Program
  0: MUL temp[0], const[0], input[0].xxxx;
  1: MAD temp[1], const[1], input[0].yyyy, temp[0];
  2: MAD temp[0], const[2], input[0].zzzz, temp[1];
  3: MAD temp[2], const[3], input[0].wwww, temp[0];
  4: MUL temp[0].xyz, const[4].xyzz, input[1].xxxx;
  5: MAD temp[1].xyz, const[5].xyzz, input[1].yyyy, temp[0].xyzz;
  6: MAD output[2].xyz, const[6].xyzx, input[1].zzzx, temp[1].xyzx;
  7: MOV output[1], input[2];
  8: MOV output[0], temp[2];
  9: MOV output[3], temp[2];
Vertex Program: after 'transform loops'
# Radeon Compiler Program
  0: MUL temp[0], const[0], input[0].xxxx;
  1: MAD temp[1], const[1], input[0].yyyy, temp[0];
  2: MAD temp[0], const[2], input[0].zzzz, temp[1];
  3: MAD temp[2], const[3], input[0].wwww, temp[0];
  4: MUL temp[0].xyz, const[4].xyzz, input[1].xxxx;
  5: MAD temp[1].xyz, const[5].xyzz, input[1].yyyy, temp[0].xyzz;
  6: MAD output[2].xyz, const[6].xyzx, input[1].zzzx, temp[1].xyzx;
  7: MOV output[1], input[2];
  8: MOV output[0], temp[2];
  9: MOV output[3], temp[2];
Vertex Program: after 'emulate branches'
# Radeon Compiler Program
  0: MUL temp[0], const[0], input[0].xxxx;
  1: MAD temp[1], const[1], input[0].yyyy, temp[0];
  2: MAD temp[0], const[2], input[0].zzzz, temp[1];
  3: MAD temp[2], const[3], input[0].wwww, temp[0];
  4: MUL temp[0].xyz, const[4].xyzz, input[1].xxxx;
  5: MAD temp[1].xyz, const[5].xyzz, input[1].yyyy, temp[0].xyzz;
  6: MAD output[2].xyz, const[6].xyzx, input[1].zzzx, temp[1].xyzx;
  7: MOV output[1], input[2];
  8: MOV output[0], temp[2];
  9: MOV output[3], temp[2];
Vertex Program: after 'emulate negative addressing'
# Radeon Compiler Program
  0: MUL temp[0], const[0], input[0].xxxx;
  1: MAD temp[1], const[1], input[0].yyyy, temp[0];
  2: MAD temp[0], const[2], input[0].zzzz, temp[1];
  3: MAD temp[2], const[3], input[0].wwww, temp[0];
  4: MUL temp[0].xyz, const[4].xyzz, input[1].xxxx;
  5: MAD temp[1].xyz, const[5].xyzz, input[1].yyyy, temp[0].xyzz;
  6: MAD output[2].xyz, const[6].xyzx, input[1].zzzx, temp[1].xyzx;
  7: MOV output[1], input[2];
  8: MOV output[0], temp[2];
  9: MOV output[3], temp[2];
Vertex Program: after 'native rewrite'
# Radeon Compiler Program
  0: MUL temp[0], const[0], input[0].xxxx;
  1: MAD temp[1], const[1], input[0].yyyy, temp[0];
  2: MAD temp[0], const[2], input[0].zzzz, temp[1];
  3: MAD temp[2], const[3], input[0].wwww, temp[0];
  4: MUL temp[0].xyz, const[4].xyzz, input[1].xxxx;
  5: MAD temp[1].xyz, const[5].xyzz, input[1].yyyy, temp[0].xyzz;
  6: MAD output[2].xyz, const[6].xyzx, input[1].zzzx, temp[1].xyzx;
  7: MOV output[1], input[2];
  8: MOV output[0], temp[2];
  9: MOV output[3], temp[2];
Vertex Program: after 'emulate modifiers'
# Radeon Compiler Program
  0: MUL temp[0], const[0], input[0].xxxx;
  1: MAD temp[1], const[1], input[0].yyyy, temp[0];
  2: MAD temp[0], const[2], input[0].zzzz, temp[1];
  3: MAD temp[2], const[3], input[0].wwww, temp[0];
  4: MUL temp[0].xyz, const[4].xyzz, input[1].xxxx;
  5: MAD temp[1].xyz, const[5].xyzz, input[1].yyyy, temp[0].xyzz;
  6: MAD output[2].xyz, const[6].xyzx, input[1].zzzx, temp[1].xyzx;
  7: MOV output[1], input[2];
  8: MOV output[0], temp[2];
  9: MOV output[3], temp[2];
Vertex Program: after 'deadcode'
# Radeon Compiler Program
  0: MUL temp[0], const[0], input[0].xxxx;
  1: MAD temp[1], const[1], input[0].yyyy, temp[0];
  2: MAD temp[0], const[2], input[0].zzzz, temp[1];
  3: MAD temp[2], const[3], input[0].wwww, temp[0];
  4: MUL temp[0].xyz, const[4].xyz_, input[1].xxx_;
  5: MAD temp[1].xyz, const[5].xyz_, input[1].yyy_, temp[0].xyz_;
  6: MAD output[2].xyz, const[6].xyz_, input[1].zzz_, temp[1].xyz_;
  7: MOV output[1], input[2];
  8: MOV output[0], temp[2];
  9: MOV output[3], temp[2];
Vertex Program: after 'dataflow optimize'
# Radeon Compiler Program
  0: MUL temp[0], const[0], input[0].xxxx;
  1: MAD temp[1], const[1], input[0].yyyy, temp[0];
  2: MAD temp[0], const[2], input[0].zzzz, temp[1];
  3: MAD temp[2], const[3], input[0].wwww, temp[0];
  4: MUL temp[0].xyz, const[4].xyz_, input[1].xxx_;
  5: MAD temp[1].xyz, const[5].xyz_, input[1].yyy_, temp[0].xyz_;
  6: MAD output[2].xyz, const[6].xyz_, input[1].zzz_, temp[1].xyz_;
  7: MOV output[1], input[2];
  8: MOV output[0], temp[2];
  9: MOV output[3], temp[2];
Vertex Program: after 'source conflict resolve'
# Radeon Compiler Program
  0: MUL temp[0], const[0], input[0].xxxx;
  1: MAD temp[1], const[1], input[0].yyyy, temp[0];
  2: MAD temp[0], const[2], input[0].zzzz, temp[1];
  3: MAD temp[2], const[3], input[0].wwww, temp[0];
  4: MUL temp[0].xyz, const[4].xyz_, input[1].xxx_;
  5: MAD temp[1].xyz, const[5].xyz_, input[1].yyy_, temp[0].xyz_;
  6: MAD output[2].xyz, const[6].xyz_, input[1].zzz_, temp[1].xyz_;
  7: MOV output[1], input[2];
  8: MOV output[0], temp[2];
  9: MOV output[3], temp[2];
Vertex Program: after 'register allocation'
# Radeon Compiler Program
  0: MUL temp[0], const[0], input[0].xxxx;
  1: MAD temp[1], const[1], input[0].yyyy, temp[0];
  2: MAD temp[0], const[2], input[0].zzzz, temp[1];
  3: MAD temp[2], const[3], input[0].wwww, temp[0];
  4: MUL temp[0].xyz, const[4].xyz_, input[1].xxx_;
  5: MAD temp[1].xyz, const[5].xyz_, input[1].yyy_, temp[0].xyz_;
  6: MAD output[2].xyz, const[6].xyz_, input[1].zzz_, temp[1].xyz_;
  7: MOV output[1], input[2];
  8: MOV output[0], temp[2];
  9: MOV output[3], temp[2];
Vertex Program: after 'dead constants'
# Radeon Compiler Program
  0: MUL temp[0], const[0], input[0].xxxx;
  1: MAD temp[1], const[1], input[0].yyyy, temp[0];
  2: MAD temp[0], const[2], input[0].zzzz, temp[1];
  3: MAD temp[2], const[3], input[0].wwww, temp[0];
  4: MUL temp[0].xyz, const[4].xyz_, input[1].xxx_;
  5: MAD temp[1].xyz, const[5].xyz_, input[1].yyy_, temp[0].xyz_;
  6: MAD output[2].xyz, const[6].xyz_, input[1].zzz_, temp[1].xyz_;
  7: MOV output[1], input[2];
  8: MOV output[0], temp[2];
  9: MOV output[3], temp[2];
Final vertex program code:
0: op: 0x00f00002 dst: 0t op:               VE_MULTIPLY
 src0: 0x00d10002 reg: 0c swiz:  X/ Y/ Z/ W
 src1: 0x00000001 reg: 0i swiz:  X/ X/ X/ X
 src2: 0x01248001 reg: 0i swiz:  0/ 0/ 0/ 0
1: op: 0x00f02004 dst: 1t op:           VE_MULTIPLY_ADD
 src0: 0x00d10022 reg: 1c swiz:  X/ Y/ Z/ W
 src1: 0x00492001 reg: 0i swiz:  Y/ Y/ Y/ Y
 src2: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
2: op: 0x00f00004 dst: 0t op:           VE_MULTIPLY_ADD
 src0: 0x00d10042 reg: 2c swiz:  X/ Y/ Z/ W
 src1: 0x00924001 reg: 0i swiz:  Z/ Z/ Z/ Z
 src2: 0x00d10020 reg: 1t swiz:  X/ Y/ Z/ W
3: op: 0x00f04004 dst: 2t op:           VE_MULTIPLY_ADD
 src0: 0x00d10062 reg: 3c swiz:  X/ Y/ Z/ W
 src1: 0x00db6001 reg: 0i swiz:  W/ W/ W/ W
 src2: 0x00d10000 reg: 0t swiz:  X/ Y/ Z/ W
4: op: 0x00700002 dst: 0t op:               VE_MULTIPLY
 src0: 0x01d10082 reg: 4c swiz:  X/ Y/ Z/ U
 src1: 0x01c00021 reg: 1i swiz:  X/ X/ X/ U
 src2: 0x01248021 reg: 1i swiz:  0/ 0/ 0/ 0
5: op: 0x00702004 dst: 1t op:           VE_MULTIPLY_ADD
 src0: 0x01d100a2 reg: 5c swiz:  X/ Y/ Z/ U
 src1: 0x01c92021 reg: 1i swiz:  Y/ Y/ Y/ U
 src2: 0x01d10000 reg: 0t swiz:  X/ Y/ Z/ U
6: op: 0x00704204 dst: 2o op:           VE_MULTIPLY_ADD
 src0: 0x01d100c2 reg: 6c swiz:  X/ Y/ Z/ U
 src1: 0x01d24021 reg: 1i swiz:  Z/ Z/ Z/ U
 src2: 0x01d10020 reg: 1t swiz:  X/ Y/ Z/ U
7: op: 0x00f02203 dst: 1o op:                    VE_ADD
 src0: 0x00d10041 reg: 2i swiz:  X/ Y/ Z/ W
 src1: 0x01248041 reg: 2i swiz:  0/ 0/ 0/ 0
 src2: 0x01248041 reg: 2i swiz:  0/ 0/ 0/ 0
8: op: 0x00f00203 dst: 0o op:                    VE_ADD
 src0: 0x00d10040 reg: 2t swiz:  X/ Y/ Z/ W
 src1: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
 src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
9: op: 0x00f06203 dst: 3o op:                    VE_ADD
 src0: 0x00d10040 reg: 2t swiz:  X/ Y/ Z/ W
 src1: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
 src2: 0x01248040 reg: 2t swiz:  0/ 0/ 0/ 0
Flow Control Ops: 0x00000000
r300: Initial fragment program
FRAG
PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1
DCL IN[0], GENERIC[10], PERSPECTIVE
DCL OUT[0], COLOR
DCL SAMP[0]
DCL CONST[1..15]
DCL TEMP[0..4]
IMM FLT32 {    0.0000,     0.0000,     0.0000,     0.0000}
  0: DP3 TEMP[0].x, IN[0].xyzz, IN[0].xyzz
  1: RSQ TEMP[1].x, TEMP[0].xxxx
  2: MUL TEMP[0].xyz, IN[0].xyzz, TEMP[1].xxxx
  3: DP3 TEMP[1].x, CONST[11].xyzz, TEMP[0].xyzz
  4: MAX TEMP[0].x, TEMP[1].xxxx, IMM[0].xxxx
  5: DP3 TEMP[1].x, IN[0].xyzz, IN[0].xyzz
  6: RSQ TEMP[2].x, TEMP[1].xxxx
  7: MUL TEMP[1].xyz, IN[0].xyzz, TEMP[2].xxxx
  8: DP3 TEMP[2].x, -CONST[11].xyzz, TEMP[1].xyzz
  9: MAX TEMP[1].x, TEMP[2].xxxx, IMM[0].xxxx
 10: ADD TEMP[2].x, TEMP[0].xxxx, TEMP[1].xxxx
 11: MUL TEMP[0], CONST[5], CONST[2]
 12: POW TEMP[1].x, TEMP[2].xxxx, CONST[1].xxxx
 13: MUL TEMP[3], TEMP[0], TEMP[1].xxxx
 14: TEX TEMP[0], IN[0].xyzz, SAMP[0], CUBE
 15: MUL TEMP[1], TEMP[3], TEMP[0]
 16: MUL TEMP[0], CONST[6], CONST[3]
 17: MUL TEMP[3], CONST[7], CONST[4]
 18: MAD TEMP[4], TEMP[0], TEMP[2].xxxx, TEMP[3]
 19: ADD OUT[0], TEMP[4], TEMP[1]
 20: END
Fragment Program: before compilation
# Radeon Compiler Program
  0: DP3 temp[0].x, input[0].xyzz, input[0].xyzz;
  1: RSQ temp[1].x, temp[0].xxxx;
  2: MUL temp[0].xyz, input[0].xyzz, temp[1].xxxx;
  3: DP3 temp[1].x, const[11].xyzz, temp[0].xyzz;
  4: MAX temp[0].x, temp[1].xxxx, temp[0].0000;
  5: DP3 temp[1].x, input[0].xyzz, input[0].xyzz;
  6: RSQ temp[2].x, temp[1].xxxx;
  7: MUL temp[1].xyz, input[0].xyzz, temp[2].xxxx;
  8: DP3 temp[2].x, -const[11].xyzz, temp[1].xyzz;
  9: MAX temp[1].x, temp[2].xxxx, temp[0].0000;
 10: ADD temp[2].x, temp[0].xxxx, temp[1].xxxx;
 11: MUL temp[0], const[5], const[2];
 12: POW temp[1].x, temp[2].xxxx, const[1].xxxx;
 13: MUL temp[3], temp[0], temp[1].xxxx;
 14: TEX temp[0], input[0].xyzz, CUBE[0];
 15: MUL temp[1], temp[3], temp[0];
 16: MUL temp[0], const[6], const[3];
 17: MUL temp[3], const[7], const[4];
 18: MAD temp[4], temp[0], temp[2].xxxx, temp[3];
 19: ADD output[0], temp[4], temp[1];
Fragment Program: after 'rewrite depth out'
# Radeon Compiler Program
  0: DP3 temp[0].x, input[0].xyzz, input[0].xyzz;
  1: RSQ temp[1].x, temp[0].xxxx;
  2: MUL temp[0].xyz, input[0].xyzz, temp[1].xxxx;
  3: DP3 temp[1].x, const[11].xyzz, temp[0].xyzz;
  4: MAX temp[0].x, temp[1].xxxx, temp[0].0000;
  5: DP3 temp[1].x, input[0].xyzz, input[0].xyzz;
  6: RSQ temp[2].x, temp[1].xxxx;
  7: MUL temp[1].xyz, input[0].xyzz, temp[2].xxxx;
  8: DP3 temp[2].x, -const[11].xyzz, temp[1].xyzz;
  9: MAX temp[1].x, temp[2].xxxx, temp[0].0000;
 10: ADD temp[2].x, temp[0].xxxx, temp[1].xxxx;
 11: MUL temp[0], const[5], const[2];
 12: POW temp[1].x, temp[2].xxxx, const[1].xxxx;
 13: MUL temp[3], temp[0], temp[1].xxxx;
 14: TEX temp[0], input[0].xyzz, CUBE[0];
 15: MUL temp[1], temp[3], temp[0];
 16: MUL temp[0], const[6], const[3];
 17: MUL temp[3], const[7], const[4];
 18: MAD temp[4], temp[0], temp[2].xxxx, temp[3];
 19: ADD output[0], temp[4], temp[1];
Fragment Program: after 'transform KILP'
# Radeon Compiler Program
  0: DP3 temp[0].x, input[0].xyzz, input[0].xyzz;
  1: RSQ temp[1].x, temp[0].xxxx;
  2: MUL temp[0].xyz, input[0].xyzz, temp[1].xxxx;
  3: DP3 temp[1].x, const[11].xyzz, temp[0].xyzz;
  4: MAX temp[0].x, temp[1].xxxx, temp[0].0000;
  5: DP3 temp[1].x, input[0].xyzz, input[0].xyzz;
  6: RSQ temp[2].x, temp[1].xxxx;
  7: MUL temp[1].xyz, input[0].xyzz, temp[2].xxxx;
  8: DP3 temp[2].x, -const[11].xyzz, temp[1].xyzz;
  9: MAX temp[1].x, temp[2].xxxx, temp[0].0000;
 10: ADD temp[2].x, temp[0].xxxx, temp[1].xxxx;
 11: MUL temp[0], const[5], const[2];
 12: POW temp[1].x, temp[2].xxxx, const[1].xxxx;
 13: MUL temp[3], temp[0], temp[1].xxxx;
 14: TEX temp[0], input[0].xyzz, CUBE[0];
 15: MUL temp[1], temp[3], temp[0];
 16: MUL temp[0], const[6], const[3];
 17: MUL temp[3], const[7], const[4];
 18: MAD temp[4], temp[0], temp[2].xxxx, temp[3];
 19: ADD output[0], temp[4], temp[1];
Fragment Program: after 'transform loops'
# Radeon Compiler Program
  0: DP3 temp[0].x, input[0].xyzz, input[0].xyzz;
  1: RSQ temp[1].x, temp[0].xxxx;
  2: MUL temp[0].xyz, input[0].xyzz, temp[1].xxxx;
  3: DP3 temp[1].x, const[11].xyzz, temp[0].xyzz;
  4: MAX temp[0].x, temp[1].xxxx, temp[0].0000;
  5: DP3 temp[1].x, input[0].xyzz, input[0].xyzz;
  6: RSQ temp[2].x, temp[1].xxxx;
  7: MUL temp[1].xyz, input[0].xyzz, temp[2].xxxx;
  8: DP3 temp[2].x, -const[11].xyzz, temp[1].xyzz;
  9: MAX temp[1].x, temp[2].xxxx, temp[0].0000;
 10: ADD temp[2].x, temp[0].xxxx, temp[1].xxxx;
 11: MUL temp[0], const[5], const[2];
 12: POW temp[1].x, temp[2].xxxx, const[1].xxxx;
 13: MUL temp[3], temp[0], temp[1].xxxx;
 14: TEX temp[0], input[0].xyzz, CUBE[0];
 15: MUL temp[1], temp[3], temp[0];
 16: MUL temp[0], const[6], const[3];
 17: MUL temp[3], const[7], const[4];
 18: MAD temp[4], temp[0], temp[2].xxxx, temp[3];
 19: ADD output[0], temp[4], temp[1];
Fragment Program: after 'emulate branches'
# Radeon Compiler Program
  0: DP3 temp[0].x, input[0].xyzz, input[0].xyzz;
  1: RSQ temp[1].x, temp[0].xxxx;
  2: MUL temp[0].xyz, input[0].xyzz, temp[1].xxxx;
  3: DP3 temp[1].x, const[11].xyzz, temp[0].xyzz;
  4: MAX temp[0].x, temp[1].xxxx, temp[0].0000;
  5: DP3 temp[1].x, input[0].xyzz, input[0].xyzz;
  6: RSQ temp[2].x, temp[1].xxxx;
  7: MUL temp[1].xyz, input[0].xyzz, temp[2].xxxx;
  8: DP3 temp[2].x, -const[11].xyzz, temp[1].xyzz;
  9: MAX temp[1].x, temp[2].xxxx, temp[0].0000;
 10: ADD temp[2].x, temp[0].xxxx, temp[1].xxxx;
 11: MUL temp[0], const[5], const[2];
 12: POW temp[1].x, temp[2].xxxx, const[1].xxxx;
 13: MUL temp[3], temp[0], temp[1].xxxx;
 14: TEX temp[0], input[0].xyzz, CUBE[0];
 15: MUL temp[1], temp[3], temp[0];
 16: MUL temp[0], const[6], const[3];
 17: MUL temp[3], const[7], const[4];
 18: MAD temp[4], temp[0], temp[2].xxxx, temp[3];
 19: ADD output[0], temp[4], temp[1];
Fragment Program: after 'saturate output writes'
# Radeon Compiler Program
  0: DP3 temp[0].x, input[0].xyzz, input[0].xyzz;
  1: RSQ temp[1].x, temp[0].xxxx;
  2: MUL temp[0].xyz, input[0].xyzz, temp[1].xxxx;
  3: DP3 temp[1].x, const[11].xyzz, temp[0].xyzz;
  4: MAX temp[0].x, temp[1].xxxx, temp[0].0000;
  5: DP3 temp[1].x, input[0].xyzz, input[0].xyzz;
  6: RSQ temp[2].x, temp[1].xxxx;
  7: MUL temp[1].xyz, input[0].xyzz, temp[2].xxxx;
  8: DP3 temp[2].x, -const[11].xyzz, temp[1].xyzz;
  9: MAX temp[1].x, temp[2].xxxx, temp[0].0000;
 10: ADD temp[2].x, temp[0].xxxx, temp[1].xxxx;
 11: MUL temp[0], const[5], const[2];
 12: POW temp[1].x, temp[2].xxxx, const[1].xxxx;
 13: MUL temp[3], temp[0], temp[1].xxxx;
 14: TEX temp[0], input[0].xyzz, CUBE[0];
 15: MUL temp[1], temp[3], temp[0];
 16: MUL temp[0], const[6], const[3];
 17: MUL temp[3], const[7], const[4];
 18: MAD temp[4], temp[0], temp[2].xxxx, temp[3];
 19: ADD_SAT output[0], temp[4], temp[1];
Fragment Program: after 'transform TEX'
# Radeon Compiler Program
  0: DP3 temp[0].x, input[0].xyzz, input[0].xyzz;
  1: RSQ temp[1].x, temp[0].xxxx;
  2: MUL temp[0].xyz, input[0].xyzz, temp[1].xxxx;
  3: DP3 temp[1].x, const[11].xyzz, temp[0].xyzz;
  4: MAX temp[0].x, temp[1].xxxx, temp[0].0000;
  5: DP3 temp[1].x, input[0].xyzz, input[0].xyzz;
  6: RSQ temp[2].x, temp[1].xxxx;
  7: MUL temp[1].xyz, input[0].xyzz, temp[2].xxxx;
  8: DP3 temp[2].x, -const[11].xyzz, temp[1].xyzz;
  9: MAX temp[1].x, temp[2].xxxx, temp[0].0000;
 10: ADD temp[2].x, temp[0].xxxx, temp[1].xxxx;
 11: MUL temp[0], const[5], const[2];
 12: POW temp[1].x, temp[2].xxxx, const[1].xxxx;
 13: MUL temp[3], temp[0], temp[1].xxxx;
 14: TEX temp[0], input[0].xyzz, CUBE[0];
 15: MUL temp[1], temp[3], temp[0];
 16: MUL temp[0], const[6], const[3];
 17: MUL temp[3], const[7], const[4];
 18: MAD temp[4], temp[0], temp[2].xxxx, temp[3];
 19: ADD_SAT output[0], temp[4], temp[1];
Fragment Program: after 'native rewrite'
# Radeon Compiler Program
  0: DP3 temp[0].x, input[0].xyzz, input[0].xyzz;
  1: RSQ temp[1].x, |temp[0].xxxx|;
  2: MUL temp[0].xyz, input[0].xyzz, temp[1].xxxx;
  3: DP3 temp[1].x, const[11].xyzz, temp[0].xyzz;
  4: MAX temp[0].x, temp[1].xxxx, temp[0].0000;
  5: DP3 temp[1].x, input[0].xyzz, input[0].xyzz;
  6: RSQ temp[2].x, |temp[1].xxxx|;
  7: MUL temp[1].xyz, input[0].xyzz, temp[2].xxxx;
  8: DP3 temp[2].x, -const[11].xyzz, temp[1].xyzz;
  9: MAX temp[1].x, temp[2].xxxx, temp[0].0000;
 10: ADD temp[2].x, temp[0].xxxx, temp[1].xxxx;
 11: MUL temp[0], const[5], const[2];
 12: LG2 temp[1].w, temp[2].xxxx;
 13: MUL temp[1].w, temp[1].wwww, const[1].xxxx;
 14: EX2 temp[1].x, temp[1].wwww;
 15: MUL temp[3], temp[0], temp[1].xxxx;
 16: TEX temp[0], input[0].xyzz, CUBE[0];
 17: MUL temp[1], temp[3], temp[0];
 18: MUL temp[0], const[6], const[3];
 19: MUL temp[3], const[7], const[4];
 20: MAD temp[4], temp[0], temp[2].xxxx, temp[3];
 21: ADD_SAT output[0], temp[4], temp[1];
Fragment Program: after 'deadcode'
# Radeon Compiler Program
  0: DP3 temp[0].x, input[0].xyz_, input[0].xyz_;
  1: RSQ temp[1].x, |temp[0].x___|;
  2: MUL temp[0].xyz, input[0].xyz_, temp[1].xxx_;
  3: DP3 temp[1].x, const[11].xyz_, temp[0].xyz_;
  4: MAX temp[0].x, temp[1].x___, temp[0].0___;
  5: DP3 temp[1].x, input[0].xyz_, input[0].xyz_;
  6: RSQ temp[2].x, |temp[1].x___|;
  7: MUL temp[1].xyz, input[0].xyz_, temp[2].xxx_;
  8: DP3 temp[2].x, -const[11].xyz_, temp[1].xyz_;
  9: MAX temp[1].x, temp[2].x___, temp[0].0___;
 10: ADD temp[2].x, temp[0].x___, temp[1].x___;
 11: MUL temp[0], const[5], const[2];
 12: LG2 temp[1].w, temp[2].x___;
 13: MUL temp[1].w, temp[1].___w, const[1].___x;
 14: EX2 temp[1].x, temp[1].w___;
 15: MUL temp[3], temp[0], temp[1].xxxx;
 16: TEX temp[0], input[0].xyz_, CUBE[0];
 17: MUL temp[1], temp[3], temp[0];
 18: MUL temp[0], const[6], const[3];
 19: MUL temp[3], const[7], const[4];
 20: MAD temp[4], temp[0], temp[2].xxxx, temp[3];
 21: ADD_SAT output[0], temp[4], temp[1];
Fragment Program: after 'emulate loops'
# Radeon Compiler Program
  0: DP3 temp[0].x, input[0].xyz_, input[0].xyz_;
  1: RSQ temp[1].x, |temp[0].x___|;
  2: MUL temp[0].xyz, input[0].xyz_, temp[1].xxx_;
  3: DP3 temp[1].x, const[11].xyz_, temp[0].xyz_;
  4: MAX temp[0].x, temp[1].x___, temp[0].0___;
  5: DP3 temp[1].x, input[0].xyz_, input[0].xyz_;
  6: RSQ temp[2].x, |temp[1].x___|;
  7: MUL temp[1].xyz, input[0].xyz_, temp[2].xxx_;
  8: DP3 temp[2].x, -const[11].xyz_, temp[1].xyz_;
  9: MAX temp[1].x, temp[2].x___, temp[0].0___;
 10: ADD temp[2].x, temp[0].x___, temp[1].x___;
 11: MUL temp[0], const[5], const[2];
 12: LG2 temp[1].w, temp[2].x___;
 13: MUL temp[1].w, temp[1].___w, const[1].___x;
 14: EX2 temp[1].x, temp[1].w___;
 15: MUL temp[3], temp[0], temp[1].xxxx;
 16: TEX temp[0], input[0].xyz_, CUBE[0];
 17: MUL temp[1], temp[3], temp[0];
 18: MUL temp[0], const[6], const[3];
 19: MUL temp[3], const[7], const[4];
 20: MAD temp[4], temp[0], temp[2].xxxx, temp[3];
 21: ADD_SAT output[0], temp[4], temp[1];
Fragment Program: after 'dataflow optimize'
# Radeon Compiler Program
  0: DP3 temp[0].x, input[0].xyz_, input[0].xyz_;
  1: RSQ temp[1].x, |temp[0].x___|;
  2: MUL temp[0].xyz, input[0].xyz_, temp[1].xxx_;
  3: DP3 temp[1].x, const[11].xyz_, temp[0].xyz_;
  4: MAX temp[0].x, temp[1].x___, none.0___;
  5: DP3 temp[1].x, input[0].xyz_, input[0].xyz_;
  6: RSQ temp[2].x, |temp[1].x___|;
  7: MUL temp[1].xyz, input[0].xyz_, temp[2].xxx_;
  8: DP3 temp[2].x, -const[11].xyz_, temp[1].xyz_;
  9: MAX temp[1].x, temp[2].x___, none.0___;
 10: ADD temp[2].x, temp[0].x___, temp[1].x___;
 11: MUL temp[0], const[5], const[2];
 12: LG2 temp[1].w, temp[2].x___;
 13: MUL temp[1].w, temp[1].___w, const[1].___x;
 14: EX2 temp[1].x, temp[1].w___;
 15: MUL temp[3], temp[0], temp[1].xxxx;
 16: TEX temp[0], input[0].xyz_, CUBE[0];
 17: MUL temp[1], temp[3], temp[0];
 18: MUL temp[0], const[6], const[3];
 19: MUL temp[3], const[7], const[4];
 20: MAD temp[4], temp[0], temp[2].xxxx, temp[3];
 21: ADD_SAT output[0], temp[4], temp[1];
Fragment Program: after 'dataflow swizzles'
# Radeon Compiler Program
  0: DP3 temp[0].x, input[0].xyz_, input[0].xyz_;
  1: RSQ temp[1].x, |temp[0].x___|;
  2: MUL temp[0].xyz, input[0].xyz_, temp[1].xxx_;
  3: DP3 temp[1].x, const[11].xyz_, temp[0].xyz_;
  4: MAX temp[0].x, temp[1].x___, none.0___;
  5: DP3 temp[1].x, input[0].xyz_, input[0].xyz_;
  6: RSQ temp[2].x, |temp[1].x___|;
  7: MUL temp[1].xyz, input[0].xyz_, temp[2].xxx_;
  8: DP3 temp[2].x, -const[11].xyz_, temp[1].xyz_;
  9: MAX temp[1].x, temp[2].x___, none.0___;
 10: ADD temp[2].x, temp[0].x___, temp[1].x___;
 11: MUL temp[0], const[5], const[2];
 12: LG2 temp[1].w, temp[2].x___;
 13: MUL temp[1].w, temp[1].___w, const[1].___x;
 14: EX2 temp[1].x, temp[1].w___;
 15: MUL temp[3], temp[0], temp[1].xxxx;
 16: TEX temp[0], input[0].xyz_, CUBE[0];
 17: MUL temp[1], temp[3], temp[0];
 18: MUL temp[0], const[6], const[3];
 19: MUL temp[3], const[7], const[4];
 20: MAD temp[4], temp[0], temp[2].xxxx, temp[3];
 21: ADD_SAT output[0], temp[4], temp[1];
Fragment Program: after 'dead constants'
# Radeon Compiler Program
  0: DP3 temp[0].x, input[0].xyz_, input[0].xyz_;
  1: RSQ temp[1].x, |temp[0].x___|;
  2: MUL temp[0].xyz, input[0].xyz_, temp[1].xxx_;
  3: DP3 temp[1].x, const[7].xyz_, temp[0].xyz_;
  4: MAX temp[0].x, temp[1].x___, none.0___;
  5: DP3 temp[1].x, input[0].xyz_, input[0].xyz_;
  6: RSQ temp[2].x, |temp[1].x___|;
  7: MUL temp[1].xyz, input[0].xyz_, temp[2].xxx_;
  8: DP3 temp[2].x, -const[7].xyz_, temp[1].xyz_;
  9: MAX temp[1].x, temp[2].x___, none.0___;
 10: ADD temp[2].x, temp[0].x___, temp[1].x___;
 11: MUL temp[0], const[4], const[1];
 12: LG2 temp[1].w, temp[2].x___;
 13: MUL temp[1].w, temp[1].___w, const[0].___x;
 14: EX2 temp[1].x, temp[1].w___;
 15: MUL temp[3], temp[0], temp[1].xxxx;
 16: TEX temp[0], input[0].xyz_, CUBE[0];
 17: MUL temp[1], temp[3], temp[0];
 18: MUL temp[0], const[5], const[2];
 19: MUL temp[3], const[6], const[3];
 20: MAD temp[4], temp[0], temp[2].xxxx, temp[3];
 21: ADD_SAT output[0], temp[4], temp[1];
Fragment Program: after 'register rename'
# Radeon Compiler Program
  0: DP3 temp[5].x, input[0].xyz_, input[0].xyz_;
  1: RSQ temp[6].x, |temp[5].x___|;
  2: MUL temp[7].xyz, input[0].xyz_, temp[6].xxx_;
  3: DP3 temp[8].x, const[7].xyz_, temp[7].xyz_;
  4: MAX temp[9].x, temp[8].x___, none.0___;
  5: DP3 temp[10].x, input[0].xyz_, input[0].xyz_;
  6: RSQ temp[11].x, |temp[10].x___|;
  7: MUL temp[12].xyz, input[0].xyz_, temp[11].xxx_;
  8: DP3 temp[13].x, -const[7].xyz_, temp[12].xyz_;
  9: MAX temp[14].x, temp[13].x___, none.0___;
 10: ADD temp[15].x, temp[9].x___, temp[14].x___;
 11: MUL temp[16], const[4], const[1];
 12: LG2 temp[17].w, temp[15].x___;
 13: MUL temp[18].w, temp[17].___w, const[0].___x;
 14: EX2 temp[19].x, temp[18].w___;
 15: MUL temp[20], temp[16], temp[19].xxxx;
 16: TEX temp[21], input[0].xyz_, CUBE[0];
 17: MUL temp[22], temp[20], temp[21];
 18: MUL temp[23], const[5], const[2];
 19: MUL temp[24], const[6], const[3];
 20: MAD temp[25], temp[23], temp[15].xxxx, temp[24];
 21: ADD_SAT output[0], temp[25], temp[22];
Fragment Program: after 'pair translate'
# Radeon Compiler Program
  0: src0.xyz = input[0]
     DP3 temp[5].x, src0.xyz, src0.xyz
  1: src0.xyz = temp[5]
     REPL_ALPHA temp[6].x
     RSQ, |src0.x|
  2: src0.xyz = input[0], src1.xyz = temp[6]
     MAD temp[7].xyz, src0.xyz, src1.xxx, src0.000
  3: src0.xyz = const[7], src1.xyz = temp[7]
     DP3 temp[8].x, src0.xyz, src1.xyz
  4: src0.xyz = temp[8]
     MAX temp[9].x, src0.x__, src0.0__
  5: src0.xyz = input[0]
     DP3 temp[10].x, src0.xyz, src0.xyz
  6: src0.xyz = temp[10]
     REPL_ALPHA temp[11].x
     RSQ, |src0.x|
  7: src0.xyz = input[0], src1.xyz = temp[11]
     MAD temp[12].xyz, src0.xyz, src1.xxx, src0.000
  8: src0.xyz = const[7], src1.xyz = temp[12]
     DP3 temp[13].x, -src0.xyz, src1.xyz
  9: src0.xyz = temp[13]
     MAX temp[14].x, src0.x__, src0.0__
 10: src0.xyz = temp[9], src1.xyz = temp[14]
     MAD temp[15].x, src0.x__, src0.111, src1.x__
 11: src0.xyz = const[4], src0.w = const[4], src1.xyz = const[1], src1.w = const[1]
     MAD temp[16].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[16].w, src0.w, src1.w, src0.0
 12: src0.xyz = temp[15]
     LG2 temp[17].w, src0.x
 13: src0.xyz = const[0], src0.w = temp[17]
     MAD temp[18].w, src0.w, src0.x, src0.0
 14: src0.w = temp[18]
     REPL_ALPHA temp[19].x
     EX2, src0.w
 15: src0.xyz = temp[16], src0.w = temp[16], src1.xyz = temp[19]
     MAD temp[20].xyz, src0.xyz, src1.xxx, src0.000
     MAD temp[20].w, src0.w, src1.x, src0.0
 16: TEX temp[21], input[0].xyz_, CUBE[0];
 17: src0.xyz = temp[20], src0.w = temp[20], src1.xyz = temp[21], src1.w = temp[21]
     MAD temp[22].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[22].w, src0.w, src1.w, src0.0
 18: src0.xyz = const[5], src0.w = const[5], src1.xyz = const[2], src1.w = const[2]
     MAD temp[23].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[23].w, src0.w, src1.w, src0.0
 19: src0.xyz = const[6], src0.w = const[6], src1.xyz = const[3], src1.w = const[3]
     MAD temp[24].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[24].w, src0.w, src1.w, src0.0
 20: src0.xyz = temp[23], src0.w = temp[23], src1.xyz = temp[15], src1.w = temp[24], src2.xyz = temp[24]
     MAD temp[25].xyz, src0.xyz, src1.xxx, src2.xyz
     MAD temp[25].w, src0.w, src1.x, src1.w
 21: src0.xyz = temp[25], src0.w = temp[25], src1.xyz = temp[22], src1.w = temp[22]
     MAD_SAT color[0].xyz, src0.xyz, src0.111, src1.xyz
     MAD_SAT color[0].w, src0.w, src0.1, src1.w
Fragment Program: after 'pair scheduling'
# Radeon Compiler Program
  0: BEGIN_TEX;
  1: TEX temp[21], input[0].xyz_, CUBE[0];
  2: src0.xyz = const[6], src0.w = const[6], src1.xyz = const[3], src1.w = const[3]
     MAD temp[24].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[24].w, src0.w, src1.w, src0.0
  3: src0.xyz = const[5], src0.w = const[5], src1.xyz = const[2], src1.w = const[2]
     MAD temp[23].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[23].w, src0.w, src1.w, src0.0
  4: src0.xyz = const[4], src0.w = const[4], src1.xyz = const[1], src1.w = const[1]
     MAD temp[16].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[16].w, src0.w, src1.w, src0.0
  5: src0.xyz = input[0]
     DP3 temp[10].x, src0.xyz, src0.xyz
  6: src0.xyz = temp[10]
     REPL_ALPHA temp[11].x
     RSQ, |src0.x|
  7: src0.xyz = input[0], src1.xyz = temp[11]
     MAD temp[12].xyz, src0.xyz, src1.xxx, src0.000
  8: src0.xyz = const[7], src1.xyz = temp[12]
     DP3 temp[13].x, -src0.xyz, src1.xyz
  9: src0.xyz = input[0], src1.xyz = temp[13]
     DP3 temp[5].x, src0.xyz, src0.xyz
     MAX temp[14].w, src1.x, src0.0
 10: src0.xyz = temp[5]
     REPL_ALPHA temp[6].x
     RSQ, |src0.x|
 11: src0.xyz = input[0], src1.xyz = temp[6]
     MAD temp[7].xyz, src0.xyz, src1.xxx, src0.000
 12: src0.xyz = const[7], src1.xyz = temp[7]
     DP3 temp[8].x, src0.xyz, src1.xyz
 13: src0.xyz = temp[8]
     MAX temp[9].x, src0.x__, src0.0__
 14: src0.xyz = temp[9], src0.w = temp[14], src1.xyz = temp[14]
     MAD temp[15].x, src0.x__, src0.111, src0.w__
 15: src0.xyz = temp[23], src0.w = temp[23], src1.xyz = temp[15], src1.w = temp[24], src2.xyz = temp[24]
     MAD temp[25].xyz, src0.xyz, src1.xxx, src2.xyz
     MAD temp[25].w, src0.w, src1.x, src1.w
 16: src0.xyz = temp[15]
     LG2 temp[17].w, src0.x
 17: src0.xyz = const[0], src0.w = temp[17]
     MAD temp[18].w, src0.w, src0.x, src0.0
 18: src0.w = temp[18]
     REPL_ALPHA temp[19].x
     EX2, src0.w
 19: src0.xyz = temp[16], src0.w = temp[16], src1.xyz = temp[19]
     MAD temp[20].xyz, src0.xyz, src1.xxx, src0.000
     MAD temp[20].w, src0.w, src1.x, src0.0
 20: src0.xyz = temp[20], src0.w = temp[20], src1.xyz = temp[21], src1.w = temp[21]
     MAD temp[22].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[22].w, src0.w, src1.w, src0.0
 21: src0.xyz = temp[25], src0.w = temp[25], src1.xyz = temp[22], src1.w = temp[22]
     MAD_SAT color[0].xyz, src0.xyz, src0.111, src1.xyz
     MAD_SAT color[0].w, src0.w, src0.1, src1.w
Fragment Program: after 'dead sources'
# Radeon Compiler Program
  0: BEGIN_TEX;
  1: TEX temp[21], input[0].xyz_, CUBE[0];
  2: src0.xyz = const[6], src0.w = const[6], src1.xyz = const[3], src1.w = const[3]
     MAD temp[24].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[24].w, src0.w, src1.w, src0.0
  3: src0.xyz = const[5], src0.w = const[5], src1.xyz = const[2], src1.w = const[2]
     MAD temp[23].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[23].w, src0.w, src1.w, src0.0
  4: src0.xyz = const[4], src0.w = const[4], src1.xyz = const[1], src1.w = const[1]
     MAD temp[16].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[16].w, src0.w, src1.w, src0.0
  5: src0.xyz = input[0]
     DP3 temp[10].x, src0.xyz, src0.xyz
  6: src0.xyz = temp[10]
     REPL_ALPHA temp[11].x
     RSQ, |src0.x|
  7: src0.xyz = input[0], src1.xyz = temp[11]
     MAD temp[12].xyz, src0.xyz, src1.xxx, src0.000
  8: src0.xyz = const[7], src1.xyz = temp[12]
     DP3 temp[13].x, -src0.xyz, src1.xyz
  9: src0.xyz = input[0], src1.xyz = temp[13]
     DP3 temp[5].x, src0.xyz, src0.xyz
     MAX temp[14].w, src1.x, src0.0
 10: src0.xyz = temp[5]
     REPL_ALPHA temp[6].x
     RSQ, |src0.x|
 11: src0.xyz = input[0], src1.xyz = temp[6]
     MAD temp[7].xyz, src0.xyz, src1.xxx, src0.000
 12: src0.xyz = const[7], src1.xyz = temp[7]
     DP3 temp[8].x, src0.xyz, src1.xyz
 13: src0.xyz = temp[8]
     MAX temp[9].x, src0.x__, src0.0__
 14: src0.xyz = temp[9], src0.w = temp[14]
     MAD temp[15].x, src0.x__, src0.111, src0.w__
 15: src0.xyz = temp[23], src0.w = temp[23], src1.xyz = temp[15], src1.w = temp[24], src2.xyz = temp[24]
     MAD temp[25].xyz, src0.xyz, src1.xxx, src2.xyz
     MAD temp[25].w, src0.w, src1.x, src1.w
 16: src0.xyz = temp[15]
     LG2 temp[17].w, src0.x
 17: src0.xyz = const[0], src0.w = temp[17]
     MAD temp[18].w, src0.w, src0.x, src0.0
 18: src0.w = temp[18]
     REPL_ALPHA temp[19].x
     EX2, src0.w
 19: src0.xyz = temp[16], src0.w = temp[16], src1.xyz = temp[19]
     MAD temp[20].xyz, src0.xyz, src1.xxx, src0.000
     MAD temp[20].w, src0.w, src1.x, src0.0
 20: src0.xyz = temp[20], src0.w = temp[20], src1.xyz = temp[21], src1.w = temp[21]
     MAD temp[22].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[22].w, src0.w, src1.w, src0.0
 21: src0.xyz = temp[25], src0.w = temp[25], src1.xyz = temp[22], src1.w = temp[22]
     MAD_SAT color[0].xyz, src0.xyz, src0.111, src1.xyz
     MAD_SAT color[0].w, src0.w, src0.1, src1.w
Fragment Program: after 'register allocation'
# Radeon Compiler Program
  0: BEGIN_TEX;
  1: TEX temp[1], input[0].xyz_, CUBE[0];
  2: src0.xyz = const[6], src0.w = const[6], src1.xyz = const[3], src1.w = const[3]
     MAD temp[2].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[0].w, src0.w, src1.w, src0.0
  3: src0.xyz = const[5], src0.w = const[5], src1.xyz = const[2], src1.w = const[2]
     MAD temp[3].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[2].w, src0.w, src1.w, src0.0
  4: src0.xyz = const[4], src0.w = const[4], src1.xyz = const[1], src1.w = const[1]
     MAD temp[4].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[3].w, src0.w, src1.w, src0.0
  5: src0.xyz = input[0]
     DP3 temp[5].x, src0.xyz, src0.xyz
  6: src0.xyz = temp[5]
     REPL_ALPHA temp[5].x
     RSQ, |src0.x|
  7: src0.xyz = input[0], src1.xyz = temp[5]
     MAD temp[5].xyz, src0.xyz, src1.xxx, src0.000
  8: src0.xyz = const[7], src1.xyz = temp[5]
     DP3 temp[5].x, -src0.xyz, src1.xyz
  9: src0.xyz = input[0], src1.xyz = temp[5]
     DP3 temp[5].x, src0.xyz, src0.xyz
     MAX temp[4].w, src1.x, src0.0
 10: src0.xyz = temp[5]
     REPL_ALPHA temp[5].x
     RSQ, |src0.x|
 11: src0.xyz = input[0], src1.xyz = temp[5]
     MAD temp[0].xyz, src0.xyz, src1.xxx, src0.000
 12: src0.xyz = const[7], src1.xyz = temp[0]
     DP3 temp[0].x, src0.xyz, src1.xyz
 13: src0.xyz = temp[0]
     MAX temp[0].x, src0.x__, src0.0__
 14: src0.xyz = temp[0], src0.w = temp[4]
     MAD temp[0].x, src0.x__, src0.1__, src0.w__
 15: src0.xyz = temp[3], src0.w = temp[2], src1.xyz = temp[0], src1.w = temp[0], src2.xyz = temp[2]
     MAD temp[2].xyz, src0.xyz, src1.xxx, src2.xyz
     MAD temp[0].w, src0.w, src1.x, src1.w
 16: src0.xyz = temp[0]
     LG2 temp[2].w, src0.x
 17: src0.xyz = const[0], src0.w = temp[2]
     MAD temp[2].w, src0.w, src0.x, src0.0
 18: src0.w = temp[2]
     REPL_ALPHA temp[0].x
     EX2, src0.w
 19: src0.xyz = temp[4], src0.w = temp[3], src1.xyz = temp[0]
     MAD temp[0].xyz, src0.xyz, src1.xxx, src0.000
     MAD temp[2].w, src0.w, src1.x, src0.0
 20: src0.xyz = temp[0], src0.w = temp[2], src1.xyz = temp[1], src1.w = temp[1]
     MAD temp[0].xyz, src0.xyz, src1.xyz, src0.000
     MAD temp[1].w, src0.w, src1.w, src0.0
 21: src0.xyz = temp[2], src0.w = temp[0], src1.xyz = temp[0], src1.w = temp[1]
     MAD_SAT color[0].xyz, src0.xyz, src0.111, src1.xyz
     MAD_SAT color[0].w, src0.w, src0.1, src1.w
pc=3*************************************
Hardware program
----------------
NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 19, tex_end: 0  (code_addr: 004004c0)
  TEX:
    TEX t1, t0, texture[0]   (00008040)
  0: xyz:  c6  c3  t0  bias-> t2.xyz               (038808e6)
       w:  c6  c3  t0  bias-> t0.w                 (008008e6)
     xyz:   c6.xyz   c3.xyz      0.0    op: 00050200 
       w:     c6.w     c3.w      0.0    op: 00040509
  1: xyz:  c5  c2  t0  bias-> t3.xyz               (038c08a5)
       w:  c5  c2  t0  bias-> t2.w                 (008808a5)
     xyz:   c5.xyz   c2.xyz      0.0    op: 00050200 
       w:     c5.w     c2.w      0.0    op: 00040509
  2: xyz:  c4  c1  t0  bias-> t4.xyz               (03900864)
       w:  c4  c1  t0  bias-> t3.w                 (008c0864)
     xyz:   c4.xyz   c1.xyz      0.0    op: 00050200 
       w:     c4.w     c1.w      0.0    op: 00040509
  3: xyz:  t0  t0  t0  bias-> t5.x                 (00940000)
       w:  t0  t0  t0  bias->                      (00000000)
     xyz:   t0.xyz   t0.xyz   t0.xxx    op: 00804000 
       w:     t0.x     t0.x     t0.x    op: 00000000
  4: xyz:  t5  t0  t0  bias-> t5.x                 (00940005)
       w:  t0  t0  t0  bias->                      (00000000)
     xyz:   t5.xxx   t5.xxx   t5.xxx    op: 05004081 
       w:   |t5.x|     t5.x     t5.x    op: 05800040
  5: xyz:  t0  t5  t0  bias-> t5.xyz               (03940140)
       w:  t0  t0  t0  bias->                      (00000000)
     xyz:   t0.xyz   t5.xxx      0.0    op: 00050280 
       w:     t0.x     t0.x     t0.x    op: 00000000
  6: xyz:  c7  t5  t0  bias-> t5.x                 (00940167)
       w:  t0  t0  t0  bias->                      (00000000)
     xyz:  -c7.xyz   t5.xyz   c7.xxx    op: 00804220 
       w:     c7.x     c7.x     c7.x    op: 00000000
  7: xyz:  t0  t5  t0  bias-> t5.x                 (00940140)
       w:  t0  t0  t0  bias-> t4.w                 (00900000)
     xyz:   t0.xyz   t0.xyz   t0.xxx    op: 00804000 
       w:     t5.x      0.0     t0.x    op: 01800803
  8: xyz:  t5  t0  t0  bias-> t5.x                 (00940005)
       w:  t0  t0  t0  bias->                      (00000000)
     xyz:   t5.xxx   t5.xxx   t5.xxx    op: 05004081 
       w:   |t5.x|     t5.x     t5.x    op: 05800040
  9: xyz:  t0  t5  t0  bias-> t0.xyz               (03800140)
       w:  t0  t0  t0  bias->                      (00000000)
     xyz:   t0.xyz   t5.xxx      0.0    op: 00050280 
       w:     t0.x     t0.x     t0.x    op: 00000000
 10: xyz:  c7  t0  t0  bias-> t0.x                 (00800027)
       w:  t0  t0  t0  bias->                      (00000000)
     xyz:   c7.xyz   t0.xyz   c7.xxx    op: 00804200 
       w:     c7.x     c7.x     c7.x    op: 00000000
 11: xyz:  t0  t0  t0  bias-> t0.x                 (00800000)
       w:  t0  t0  t0  bias->                      (00000000)
     xyz:   t0.xyz      0.0   t0.xxx    op: 02804a00 
       w:     t0.x     t0.x     t0.x    op: 00000000
 12: xyz:  t0  t0  t0  bias-> t0.x                 (00800000)
       w:  t4  t0  t0  bias->                      (00000004)
     xyz:   t0.xyz      1.0   t4.www    op: 00030a80 
       w:     t0.x     t0.x     t0.x    op: 00000000
 13: xyz:  t3  t0  t2  bias-> t2.xyz               (03882003)
       w:  t2  t0  t0  bias-> t0.w                 (00800002)
     xyz:   t3.xyz   t0.xxx   t2.xyz    op: 00020280 
       w:     t2.w     t0.x     t0.w    op: 00028189
 14: xyz:  t0  t0  t0  bias->                      (00000000)
       w:  t0  t0  t0  bias-> t2.w                 (00880000)
     xyz:   t0.xxx   t0.xxx   t0.xxx    op: 00004081 
       w:     t0.x     t0.x     t0.x    op: 04800000
 15: xyz:  c0  t0  t0  bias->                      (00000020)
       w:  t2  t0  t0  bias-> t2.w                 (00880002)
     xyz:   c0.xxx   c0.xxx   c0.xxx    op: 00004081 
       w:     t2.w     c0.x      0.0    op: 00040009
 16: xyz:  t0  t0  t0  bias-> t0.x                 (00800000)
       w:  t2  t0  t0  bias->                      (00000002)
     xyz:   t0.xxx   t0.xxx   t0.xxx    op: 05004081 
       w:     t2.w     t0.x     t0.x    op: 04000009
 17: xyz:  t4  t0  t0  bias-> t0.xyz               (03800004)
       w:  t3  t0  t0  bias-> t2.w                 (00880003)
     xyz:   t4.xyz   t0.xxx      0.0    op: 00050280 
       w:     t3.w     t0.x      0.0    op: 00040189
 18: xyz:  t0  t1  t0  bias-> t0.xyz               (03800040)
       w:  t2  t1  t0  bias-> t1.w                 (00840042)
     xyz:   t0.xyz   t1.xyz      0.0    op: 00050200 
       w:     t2.w     t1.w      0.0    op: 00040509
 19: xyz:  t2  t0  t0  bias-> o0.xyz               (1c000002)
       w:  t0  t1  t0  bias-> o0.w                 (01000040)
     xyz:   t2.xyz      1.0   t0.xyz    op: 40010a80 
       w:     t0.w      1.0     t1.w    op: 40028889