#PPCI magic: [0] 7318.535999 MMIO32 W 0x088004 0x00100403 PPCI.CMD_STA <= { COMMAND = { IO | MEMORY | INTX_DISABLE } | STATUS = { CAP_LIST | DEVSEL = FAST } } [0] 7318.536258 MMIO32 W 0x088004 0x00100407 PPCI.CMD_STA <= { COMMAND = { IO | MEMORY | MASTER | INTX_DISABLE } | STATUS = { CAP_LIST | DEVSEL = FAST } } [0] 7318.540810 MMIO32 W 0x088138 0x30000000 PPCI+0x138 <= 0x30000000 [0] 7318.540968 MMIO32 W 0x088460 0x30601222 PPCI+0x460 <= 0x30601222 [0] 7318.541489 MMIO32 W 0x08800c 0x0000f800 PPCI.MISC0C <= { CACHE_LINE_SIZE = 0 | LATENCY_TIMER = 0xf8 | HEADER_TYPE = NORMAL | BIST = { CODE = 0 } } [0] 7326.254357 MMIO32 W 0x088114 0x80000001 PPCI+0x114 <= 0x80000001 [0] 7326.254622 MMIO32 W 0x088004 0x00100407 PPCI.CMD_STA <= { COMMAND = { IO | MEMORY | MASTER | INTX_DISABLE } | STATUS = { CAP_LIST | DEVSEL = FAST } } [0] 7326.254809 MMIO32 W 0x088144 0x00000010 PPCI+0x144 <= 0x10 [0] 7326.257602 MMIO32 W 0x088190 0x11101010 PPCI+0x190 <= 0x11101010 [0] 7326.258177 MMIO32 W 0x088138 0x30000000 PPCI+0x138 <= 0x30000000 [0] 7326.258438 MMIO32 W 0x088460 0x30601222 PPCI+0x460 <= 0x30601222 [0] 7326.258607 MMIO32 W 0x088484 0x00000001 PPCI+0x484 <= 0x1 [0] 7326.258798 MMIO32 W 0x088488 0x00000024 PPCI+0x488 <= 0x24 [0] 7326.259328 MMIO32 W 0x088488 0x00000024 PPCI+0x488 <= 0x24 [0] 7326.259516 MMIO32 W 0x08841c 0x000004d8 PPCI+0x41c <= 0x4d8 [0] 7326.259703 MMIO32 W 0x08841c 0x000004d8 PPCI+0x41c <= 0x4d8 [0] 7326.260044 MMIO32 W 0x088150 0x6000fe10 PPCI+0x150 <= 0x6000fe10 [0] 7326.260496 MMIO32 W 0x08814c 0x8b00001b PPCI+0x14c <= 0x8b00001b [0] 7326.260871 MMIO32 W 0x088080 0x00002910 PPCI.EXP_DEV_CMD_STA <= { CMD = { RELAX_EN | MAX_PAYLOAD = 0 | EXT_TAG | NOSNOOP | READRQ = 0x2 } | STA = { 0 } } #[0] 7326.261058 MMIO32 W 0x088138 0x30000000 PPCI+0x138 <= 0x30000000 #GPIO magic [0] 7319.451272 MMIO32 W 0x00e104 0x02266000 PNVIO.GPIO_0 <= { 0 = { 0 } | 1 = { 0 } | 2 = { 0 } | 3 = { WR_EN | RD_VAL } | 4 = { WR_EN | RD_VAL } | 5 = { WR_EN } | 6 = { WR_EN } | 7 = { 0 } } [0] 7319.451293 MMIO32 W 0x00e050 0x00000000 PNVIO.GPIO_INTR_EN_0 <= { PLUG_MASK_0 = 0 | UNPLUG_MASK_0 = 0 } [0] 7319.451471 MMIO32 W 0x00e100 0x00180100 PNVIO.GPIO_CTL_0 <= { UNK1_MASK_0 = 0x100 | UNK2_MASK_0 = 0x18 } # enable everything in PMC.ENABLE - VPE bit decreases power usage dramaticly [0] 1226.455757 MMIO32 W 0x000200 0xffffffff PMC.ENABLE <= everything (current: 0xdff3d113 result: 0xdff3d113) # some power magic [0] 1226.458120 MMIO32 W 0x001098 0x21ca003c PBUS.DEBUG_6 <= 0x21ca003c (current: 0x21ca0004 result: 0x21ca003c) [0] 1226.458299 MMIO32 W 0x001588 0x00000001 PBUS+0x588 <= 0x1 (current: 0x00000000 result: 0x00000001) # disable VC2 xtensa clock - blob instead sets it to lower clock, then does some magic on VP2,PCRYPT,etc # that probaly puts it in idle mode #these are after reclock values minus VC2 #[0] 1226.471062 MMIO32 W 0x00c040 0x2ae0d2a3 PCONTROL+0x40 <= # these are boot values minus VC2 [0] 1226.471062 MMIO32 W 0x00c040 0x2ee01233 PCONTROL+0x40 <= # disable secondary DAC [0] 1226.425262 MMIO32 W 0x61a010 0x80000002 PDISPLAY.DAC_REGS[0].CLK_CTRL1 <= { CONNECTED = 0 | 0x80000002 } (current: 0x00000001 result: 0x80000002) [0] 1226.425394 MMIO32 W 0x61a004 0xd0150000 PDISPLAY.DAC_REGS[0].DPMS_CTRL <= { PENDING | 0x50150000 } (current: 0x10550000 result: 0x10150000) [0] 1226.425610 MMIO32 W 0x61a810 0x00000003 PDISPLAY.DAC_REGS[0x1].CLK_CTRL1 <= { CONNECTED = 0 | 0x3 } (current: 0x00000001 result: 0x00000003) [0] 1226.425717 MMIO32 W 0x61a804 0xd0150000 PDISPLAY.DAC_REGS[0x1].DPMS_CTRL <= { PENDING | 0x50150000 } (current: 0x10550000 result: 0x10150000) #PFB magic - some dram optimization ??? [0] 1226.423318 MMIO32 W 0x100000 0x0000c042 PFB+0 <= 0xc042 (current: 0x00f00002 result: 0x0000c042) [0] 1226.423388 MMIO32 W 0x100004 0x0000c042 PFB+0x4 <= 0xc042 (current: 0x00f00002 result: 0x0000c042) [0] 1226.423457 MMIO32 W 0x100008 0x0000c042 PFB+0x8 <= 0xc042 (current: 0x00f00002 result: 0x0000c042) [0] 1226.423527 MMIO32 W 0x100b78 0x0000c042 PFB+0xb78 <= 0xc042 (current: 0x00f00002 result: 0x0000c042) [0] 1226.423596 MMIO32 W 0x100c0c 0x0000c042 PFB+0xc0c <= 0xc042 (current: 0x00f00002 result: 0x0000c042) [0] 1226.423735 MMIO32 W 0x100d04 0x0000c042 PFB+0xd04 <= 0xc042 (current: 0x00f00002 result: 0x0000c042) [0] 1226.423804 MMIO32 W 0x100e0c 0x0000c042 PFB+0xe0c <= 0xc042 (current: 0x00f00002 result: 0x0000c042)