#From 21 to 16W, the easy steps:

#PPCI magic - clocks - idle mode - anything ???
[0] 7326.260044 MMIO32 W 0x088150 0x6000fe10 PPCI+0x150 <= 0x6000fe10
[0] 7326.260496 MMIO32 W 0x08814c 0x8b00001b PPCI+0x14c <= 0x8b00001b

#Disable GPIO ports
[0] 7319.451272 MMIO32 W 0x00e104 0x02266000 PNVIO.GPIO_0 <= { 0 = { 0 } | 1 = { 0 } | 2 = { 0 } | 3 = { WR_EN | RD_VAL } | 4 = { WR_EN | RD_VAL } | 5 = { WR_EN } | 6 = { WR_EN } | 7 = { 0 } }

# enable everything in PMC.ENABLE - VPE bit decreases power usage
[0] 1226.455757 MMIO32 W 0x000200 0xffffffff PMC.ENABLE <= everything (current: 0xdff3d113 result: 0xdff3d113)

# some power magic
[0] 1226.458120 MMIO32 W 0x001098 0x21ca003c PBUS.DEBUG_6 <= 0x21ca003c (current: 0x21ca0004 result: 0x21ca003c)
[0] 1226.458299 MMIO32 W 0x001588 0x00000001 PBUS+0x588 <= 0x1 (current: 0x00000000 result: 0x00000001)

# disable VC2 xtensa clock - blob instead sets it to lower clock, then does some magic on VP2,PCRYPT,etc
# that probaly puts it in idle mode - these are boot values minus VC2
[0] 1226.471062 MMIO32 W 0x00c040 0x2ee01233 PCONTROL+0x40

# disable secondary DAC
[0] 1226.425262 MMIO32 W 0x61a010 0x80000002 PDISPLAY.DAC_REGS[0].CLK_CTRL1 <= { CONNECTED = 0 | 0x80000002 } (current: 0x00000001 result: 0x80000002)
[0] 1226.425394 MMIO32 W 0x61a004 0xd0150000 PDISPLAY.DAC_REGS[0].DPMS_CTRL <= { PENDING | 0x50150000 } (current: 0x10550000 result: 0x10150000)
[0] 1226.425610 MMIO32 W 0x61a810 0x00000003 PDISPLAY.DAC_REGS[0x1].CLK_CTRL1 <= { CONNECTED = 0 | 0x3 } (current: 0x00000001 result: 0x00000003)
[0] 1226.425717 MMIO32 W 0x61a804 0xd0150000 PDISPLAY.DAC_REGS[0x1].DPMS_CTRL <= { PENDING | 0x50150000 } (current: 0x10550000 result: 0x10150000)

#PFB magic - some dram optimization ???
[0] 1226.423318 MMIO32 W 0x100000 0x0000c042 PFB+0 <= 0xc042 (current: 0x00f00002 result: 0x0000c042)
[0] 1226.423388 MMIO32 W 0x100004 0x0000c042 PFB+0x4 <= 0xc042 (current: 0x00f00002 result: 0x0000c042)
[0] 1226.423457 MMIO32 W 0x100008 0x0000c042 PFB+0x8 <= 0xc042 (current: 0x00f00002 result: 0x0000c042)
[0] 1226.423527 MMIO32 W 0x100b78 0x0000c042 PFB+0xb78 <= 0xc042 (current: 0x00f00002 result: 0x0000c042)
[0] 1226.423596 MMIO32 W 0x100c0c 0x0000c042 PFB+0xc0c <= 0xc042 (current: 0x00f00002 result: 0x0000c042)
[0] 1226.423735 MMIO32 W 0x100d04 0x0000c042 PFB+0xd04 <= 0xc042 (current: 0x00f00002 result: 0x0000c042)
[0] 1226.423804 MMIO32 W 0x100e0c 0x0000c042 PFB+0xe0c <= 0xc042 (current: 0x00f00002 result: 0x0000c042)