From fa3028f4c2ebb24c7aba835d9a4dc10cfb7a95b2 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 24 Oct 2011 09:29:23 -0400 Subject: [PATCH] drm/radeon/kms/cayman: explicitly program CP_COHER_CNTL2 in blit code This is automatically programmed when using the SURFACE_SYNC packet via an IB, but not when using the ring directly. May fix: https://bugs.freedesktop.org/show_bug.cgi?id=40221 Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/evergreen_blit_kms.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/radeon/evergreen_blit_kms.c b/drivers/gpu/drm/radeon/evergreen_blit_kms.c index 879f733..9ebbdc5 100644 --- a/drivers/gpu/drm/radeon/evergreen_blit_kms.c +++ b/drivers/gpu/drm/radeon/evergreen_blit_kms.c @@ -596,6 +596,11 @@ set_default_state(struct radeon_device *rdev) radeon_ring_write(rdev, upper_32_bits(gpu_addr) & 0xFF); radeon_ring_write(rdev, dwords); + if (rdev->family >= CHIP_CAYMAN) { + radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1)); + radeon_ring_write(rdev, (0x85e8 - PACKET3_SET_CONFIG_REG_START) >> 2); + radeon_ring_write(rdev, 0); /* CP_COHER_CNTL2 */ + } } int evergreen_blit_init(struct radeon_device *rdev) -- 1.7.1.1