From 0d7c73642b67f5e3a99ccc2076b878e3901478b8 Mon Sep 17 00:00:00 2001
From: Ben Widawsky <ben@bwidawsk.net>
Date: Fri, 4 Nov 2011 20:17:14 -0700
Subject: [PATCH] drm/i915: drpc debugfs update

This is a work in progress patch. I couldn't find enough info to properly
update this debugfs entry
---
 drivers/gpu/drm/i915/i915_debugfs.c |   63 ++++++++++++++++++++++++++++++++++-
 drivers/gpu/drm/i915/i915_reg.h     |   13 +++++++-
 2 files changed, 74 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 8e95d66..770f495 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -971,7 +971,7 @@ static int i915_inttoext_table(struct seq_file *m, void *unused)
 	return 0;
 }
 
-static int i915_drpc_info(struct seq_file *m, void *unused)
+static int gen5_drpc_info(struct seq_file *m)
 {
 	struct drm_info_node *node = (struct drm_info_node *) m->private;
 	struct drm_device *dev = node->minor->dev;
@@ -1028,6 +1028,67 @@ static int i915_drpc_info(struct seq_file *m, void *unused)
 	return 0;
 }
 
+static int gen6_drpc_info(struct seq_file *m)
+{
+
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	u32 rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
+	//u32 gt_thread_p_req = I915_READ(GEN6_GT_THREAD_P_REQ);
+	u32 gt_core_status = I915_READ(GEN6_GT_CORE_STATUS);
+
+	/* XXX: are these at all right? */
+	seq_printf(m, "HD boost: %s\n",
+		   rpmodectl1 & GEN6_RP_MEDIA_TURBO ? "yes" : "no");
+	seq_printf(m, "Boost freq: NA\n");
+	seq_printf(m, "HW control enabled: %s\n",
+		   rpmodectl1 & GEN6_RP_ENABLE ? "yes" : "no");
+	seq_printf(m, "SW control enabled: %s\n",
+		   (rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
+		   GEN6_RP_MEDIA_SW_MODE ? "yes" : "no");
+	seq_printf(m, "Gated voltage change: NA\n");
+	seq_printf(m, "Starting frequency: NA\n");
+	seq_printf(m, "Max P-state: NA\n");
+	seq_printf(m, "Min P-state: NA\n");
+	seq_printf(m, "RS1 VID: NA\n");
+	seq_printf(m, "RS2 VID: NA\n");
+	seq_printf(m, "Render standby enabled: NA\n");
+	seq_printf(m, "Current RC state: ");
+	switch (gt_core_status & GEN6_RCn_MASK) {
+	case GEN6_RC0:
+		seq_printf(m, "on\n");
+		break;
+	case GEN6_RC3:
+		seq_printf(m, "RC3\n");
+		break;
+	case GEN6_RC6:
+		seq_printf(m, "RC6\n");
+		break;
+	case GEN6_RC7:
+		seq_printf(m, "RC7\n");
+		break;
+	default:
+		seq_printf(m, "Unknown\n");
+		break;
+	}
+
+	seq_printf(m, "Core Power Down: %s\n",
+		   (gt_core_status & GEN6_CORE_CPD_STATE_MASK) ? "yes" : "no");
+	return 0;
+}
+
+static int i915_drpc_info(struct seq_file *m, void *unused)
+{
+	struct drm_info_node *node = (struct drm_info_node *) m->private;
+	struct drm_device *dev = node->minor->dev;
+
+	if (IS_GEN6(dev) || IS_GEN7(dev))
+		return gen6_drpc_info(m);
+	else
+		return gen5_drpc_info(m);
+}
+
 static int i915_fbc_status(struct seq_file *m, void *unused)
 {
 	struct drm_info_node *node = (struct drm_info_node *) m->private;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1f295cd..9dc5716 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3445,8 +3445,11 @@
 #define    GT_FIFO_NUM_RESERVED_ENTRIES		20
 
 #define GEN6_RPNSWREQ				0xA008
+#define GEN6_GT_THREAD_P_REQ			0x13807C
 #define   GEN6_TURBO_DISABLE			(1<<31)
-#define   GEN6_FREQUENCY(x)			((x)<<25)
+#define   GEN6_FREQUENCY_SHIFT			25
+#define   GEN6_FREQUENCY_MASK			0x3f
+#define   GEN6_FREQUENCY(x)			((x)<<GEN6_FREQUENCY_SHIFT)
 #define   GEN6_OFFSET(x)			((x)<<19)
 #define   GEN6_AGGRESSIVE_TURBO			(0<<15)
 #define GEN6_RC_VIDEO_FREQ			0xA00C
@@ -3526,6 +3529,14 @@
 #define GEN6_PCODE_DATA				0x138128
 #define   GEN6_PCODE_FREQ_IA_RATIO_SHIFT	8
 
+#define GEN6_GT_CORE_STATUS		0x138060
+#define   GEN6_CORE_CPD_STATE_MASK	(7<<4)
+#define   GEN6_RCn_MASK			7
+#define   GEN6_RC0			0
+#define   GEN6_RC3			2
+#define   GEN6_RC6			3
+#define   GEN6_RC7			4
+
 #define G4X_AUD_VID_DID			0x62020
 #define INTEL_AUDIO_DEVCL		0x808629FB
 #define INTEL_AUDIO_DEVBLC		0x80862801
-- 
1.7.7.2