From 14a7679c36ef2d83df07424fad3008f3de02dfd0 Mon Sep 17 00:00:00 2001 From: Simon Farnsworth Date: Wed, 23 Nov 2011 10:47:19 +0000 Subject: [PATCH] Initial enablement of color tiling on Evergreen --- src/drmmode_display.c | 32 ++++++++------------------------ src/radeon_dri2.c | 36 ++++++------------------------------ src/radeon_kms.c | 17 +++++------------ 3 files changed, 19 insertions(+), 66 deletions(-) diff --git a/src/drmmode_display.c b/src/drmmode_display.c index 02968d5..fcea59e 100644 --- a/src/drmmode_display.c +++ b/src/drmmode_display.c @@ -224,12 +224,8 @@ void drmmode_copy_fb(ScrnInfoPtr pScrn, drmmode_ptr drmmode) if (!src) return; - if (info->allowColorTiling) { - if (info->ChipFamily >= CHIP_FAMILY_R600) - tiling_flags |= RADEON_TILING_MICRO; - else - tiling_flags |= RADEON_TILING_MACRO; - } + if (info->allowColorTiling) + tiling_flags |= RADEON_TILING_MACRO; pitch = RADEON_ALIGN(pScrn->displayWidth, drmmode_get_pitch_align(pScrn, info->CurrentLayout.pixel_bytes, tiling_flags)) * @@ -282,12 +278,8 @@ drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode, uint32_t tiling_flags = 0; int height; - if (info->allowColorTiling) { - if (info->ChipFamily >= CHIP_FAMILY_R600) - tiling_flags |= RADEON_TILING_MICRO; - else - tiling_flags |= RADEON_TILING_MACRO; - } + if (info->allowColorTiling) + tiling_flags |= RADEON_TILING_MACRO; pitch = RADEON_ALIGN(pScrn->displayWidth, drmmode_get_pitch_align(pScrn, info->CurrentLayout.pixel_bytes, tiling_flags)) * info->CurrentLayout.pixel_bytes; @@ -1219,12 +1211,8 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height) if (front_bo) radeon_bo_wait(front_bo); - if (info->allowColorTiling) { - if (info->ChipFamily >= CHIP_FAMILY_R600) - tiling_flags |= RADEON_TILING_MICRO; - else - tiling_flags |= RADEON_TILING_MACRO; - } + if (info->allowColorTiling) + tiling_flags |= RADEON_TILING_MACRO; pitch = RADEON_ALIGN(width, drmmode_get_pitch_align(scrn, cpp, tiling_flags)) * cpp; height = RADEON_ALIGN(height, drmmode_get_height_align(scrn, tiling_flags)); @@ -1661,12 +1649,8 @@ Bool radeon_do_pageflip(ScrnInfoPtr scrn, struct radeon_bo *new_front, void *dat drmmode_flipdata_ptr flipdata; drmmode_flipevtcarrier_ptr flipcarrier; - if (info->allowColorTiling) { - if (info->ChipFamily >= CHIP_FAMILY_R600) - tiling_flags |= RADEON_TILING_MICRO; - else - tiling_flags |= RADEON_TILING_MACRO; - } + if (info->allowColorTiling) + tiling_flags |= RADEON_TILING_MACRO; pitch = RADEON_ALIGN(scrn->displayWidth, drmmode_get_pitch_align(scrn, info->CurrentLayout.pixel_bytes, tiling_flags)) * info->CurrentLayout.pixel_bytes; diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c index 8789d73..67b1920 100644 --- a/src/radeon_dri2.c +++ b/src/radeon_dri2.c @@ -115,19 +115,13 @@ radeon_dri2_create_buffers(DrawablePtr drawable, switch(attachments[i]) { case DRI2BufferDepth: if (info->ChipFamily >= CHIP_FAMILY_R600) - /* macro is the preferred setting, but the 2D detiling for software - * fallbacks in mesa still has issues on some configurations - */ - flags = RADEON_CREATE_PIXMAP_TILING_MICRO; + flags = RADEON_CREATE_PIXMAP_TILING_MACRO; else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; break; case DRI2BufferDepthStencil: if (info->ChipFamily >= CHIP_FAMILY_R600) { - /* macro is the preferred setting, but the 2D detiling for software - * fallbacks in mesa still has issues on some configurations - */ - flags = RADEON_CREATE_PIXMAP_TILING_MICRO; + flags = RADEON_CREATE_PIXMAP_TILING_MACRO; if (info->ChipFamily >= CHIP_FAMILY_CEDAR) need_enlarge = 1; } else @@ -137,13 +131,7 @@ radeon_dri2_create_buffers(DrawablePtr drawable, case DRI2BufferBackRight: case DRI2BufferFakeFrontLeft: case DRI2BufferFakeFrontRight: - if (info->ChipFamily >= CHIP_FAMILY_R600) - /* macro is the preferred setting, but the 2D detiling for software - * fallbacks in mesa still has issues on some configurations - */ - flags = RADEON_CREATE_PIXMAP_TILING_MICRO; - else - flags = RADEON_CREATE_PIXMAP_TILING_MACRO; + flags = RADEON_CREATE_PIXMAP_TILING_MACRO; break; default: flags = 0; @@ -264,20 +252,14 @@ radeon_dri2_create_buffer(DrawablePtr drawable, /* tile the back buffer */ switch(attachment) { case DRI2BufferDepth: - /* macro is the preferred setting, but the 2D detiling for software - * fallbacks in mesa still has issues on some configurations - */ if (info->ChipFamily >= CHIP_FAMILY_R600) - flags = RADEON_CREATE_PIXMAP_TILING_MICRO; + flags = RADEON_CREATE_PIXMAP_TILING_MACRO; else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; break; case DRI2BufferDepthStencil: - /* macro is the preferred setting, but the 2D detiling for software - * fallbacks in mesa still has issues on some configurations - */ if (info->ChipFamily >= CHIP_FAMILY_R600) { - flags = RADEON_CREATE_PIXMAP_TILING_MICRO; + flags = RADEON_CREATE_PIXMAP_TILING_MACRO; if (info->ChipFamily >= CHIP_FAMILY_CEDAR) need_enlarge = 1; } else @@ -287,13 +269,7 @@ radeon_dri2_create_buffer(DrawablePtr drawable, case DRI2BufferBackRight: case DRI2BufferFakeFrontLeft: case DRI2BufferFakeFrontRight: - if (info->ChipFamily >= CHIP_FAMILY_R600) - /* macro is the preferred setting, but the 2D detiling for software - * fallbacks in mesa still has issues on some configurations - */ - flags = RADEON_CREATE_PIXMAP_TILING_MICRO; - else - flags = RADEON_CREATE_PIXMAP_TILING_MACRO; + flags = RADEON_CREATE_PIXMAP_TILING_MACRO; break; default: flags = 0; diff --git a/src/radeon_kms.c b/src/radeon_kms.c index 1604f25..710b945 100644 --- a/src/radeon_kms.c +++ b/src/radeon_kms.c @@ -781,12 +781,8 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags) "EXA: Driver will not allow EXA pixmaps in VRAM\n"); /* no tiled scanout on r6xx+ yet */ - if (info->allowColorTiling) { - if (info->ChipFamily >= CHIP_FAMILY_R600) - tiling |= RADEON_TILING_MICRO; - else - tiling |= RADEON_TILING_MACRO; - } + if (info->allowColorTiling) + tiling |= RADEON_TILING_MACRO; cpp = pScrn->bitsPerPixel / 8; pScrn->displayWidth = RADEON_ALIGN(pScrn->virtualX, drmmode_get_pitch_align(pScrn, cpp, tiling)); @@ -1220,12 +1216,9 @@ static Bool radeon_setup_kernel_mem(ScreenPtr pScreen) return FALSE; } - if (info->allowColorTiling) { - if (info->ChipFamily >= CHIP_FAMILY_R600) - tiling_flags |= RADEON_TILING_MICRO; - else - tiling_flags |= RADEON_TILING_MACRO; - } + if (info->allowColorTiling) + tiling_flags |= RADEON_TILING_MACRO; + pitch = RADEON_ALIGN(pScrn->displayWidth, drmmode_get_pitch_align(pScrn, cpp, tiling_flags)) * cpp; screen_size = RADEON_ALIGN(pScrn->virtualY, drmmode_get_height_align(pScrn, tiling_flags)) * pitch; base_align = drmmode_get_base_align(pScrn, cpp, tiling_flags); -- 1.7.6