From 7699f27fd8e87e5be17a9d5dd454008ecd002c46 Mon Sep 17 00:00:00 2001 From: Alban Browaeys Date: Thu, 2 Feb 2012 19:20:22 +0100 Subject: [PATCH] dri/i915: the max are exclusive The max are exclusive at least when they comes from X drawable region (x2,y2). The current code send those exclusive (one pixel above max) coordinates to BATCH_OUT. Thus when requesting the max framebuffer as drawable size attached to the context we in fact request above max. This patch fixes gen2 useage I have encountered. This let gnome-shell - which cogl atlas are 2048 (the max framebuffer size) when resolution is above or equal to 1024 - works. --- src/mesa/drivers/dri/i915/i830_vtbl.c | 4 ++-- src/mesa/drivers/dri/intel/intel_blit.c | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c index 8b25596..98b90c5 100644 --- a/src/mesa/drivers/dri/i915/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915/i830_vtbl.c @@ -692,8 +692,8 @@ i830_set_draw_region(struct intel_context *intel, state->Buffer[I830_DESTREG_DRAWRECT1] = 0; state->Buffer[I830_DESTREG_DRAWRECT2] = (draw_y << 16) | draw_x; state->Buffer[I830_DESTREG_DRAWRECT3] = - ((ctx->DrawBuffer->Width + draw_x) & 0xffff) | - ((ctx->DrawBuffer->Height + draw_y) << 16); + ((ctx->DrawBuffer->Width + draw_x - 1) & 0xffff) | + ((ctx->DrawBuffer->Height + draw_y - 1) << 16); state->Buffer[I830_DESTREG_DRAWRECT4] = (draw_y << 16) | draw_x; state->Buffer[I830_DESTREG_DRAWRECT5] = MI_NOOP; diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c index 9eacadd..79f64f5 100644 --- a/src/mesa/drivers/dri/intel/intel_blit.c +++ b/src/mesa/drivers/dri/intel/intel_blit.c @@ -199,7 +199,7 @@ intelEmitCopyBlit(struct intel_context *intel, OUT_BATCH(CMD); OUT_BATCH(BR13 | (uint16_t)dst_pitch); OUT_BATCH((dst_y << 16) | dst_x); - OUT_BATCH((dst_y2 << 16) | dst_x2); + OUT_BATCH(((dst_y2 - 1) << 16) | (dst_x2 - 1)); OUT_RELOC_FENCED(dst_buffer, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, dst_offset); @@ -373,7 +373,7 @@ intelClearWithBlit(struct gl_context *ctx, GLbitfield mask) OUT_BATCH(CMD); OUT_BATCH(BR13); OUT_BATCH((y1 << 16) | x1); - OUT_BATCH((y2 << 16) | x2); + OUT_BATCH(((y2 - 1) << 16) | (x2 - 1)); OUT_RELOC_FENCED(region->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); @@ -592,7 +592,7 @@ intel_set_teximage_alpha_to_one(struct gl_context *ctx, OUT_BATCH(CMD); OUT_BATCH(BR13); OUT_BATCH((y1 << 16) | x1); - OUT_BATCH((y2 << 16) | x2); + OUT_BATCH(((y2 - 1) << 16) | (x2 - 1)); OUT_RELOC_FENCED(region->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); -- 1.7.9