From c5c9f5a73cbdfc523888391f5d7df081a0470026 Mon Sep 17 00:00:00 2001 From: Thomas Courbon Date: Thu, 16 Feb 2012 10:00:10 +0100 Subject: [PATCH 1/1] drm/i915: Disable deep RC6 By default when RC6 was enabled both RC6 and RC6p were active which cause some machine geared with sandy bridge chip to crash. As it seems RC6p is involved this patch prevent its activation and just enable shallow RC6 when the kernel is given i915.i915_enable_rc6=1. Signed-off-by: Thomas Courbon --- drivers/gpu/drm/i915/intel_display.c | 3 +-- 1 files changed, 1 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 2a3f707..2ecae56e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -8179,8 +8179,7 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv) I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */ if (intel_enable_rc6(dev_priv->dev)) - rc6_mask = GEN6_RC_CTL_RC6p_ENABLE | - GEN6_RC_CTL_RC6_ENABLE; + rc6_mask = GEN6_RC_CTL_RC6_ENABLE; I915_WRITE(GEN6_RC_CONTROL, rc6_mask | -- 1.7.9.1