From 7f7483603a77042e7e065ca04eb2d95267623f4c Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Wed, 23 Mar 2011 09:40:00 +0000 Subject: [PATCH] drm/i915: Maintain fenced gpu access until we flush the fence We only want to mark the transition from unfenced GPU access by an execbuffer, so that we are forced to flush any pending writes through the fence before updating the register. In applying this fix for a corruption bug, we do lose the ability to detect the earliest end of GPU fenced access, thus disabling the inherent optimization. Signed-off-by: Chris Wilson Reviewed-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 20a4cc5..a07911f 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -911,7 +911,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *objects, obj->base.read_domains = obj->base.pending_read_domains; obj->base.write_domain = obj->base.pending_write_domain; - obj->fenced_gpu_access = obj->pending_fenced_gpu_access; + obj->fenced_gpu_access |= obj->pending_fenced_gpu_access; i915_gem_object_move_to_active(obj, ring, seqno); if (obj->base.write_domain) { -- 1.7.9