From 3f8b1470af7297c505f0fd994c49ed82f0d4364d Mon Sep 17 00:00:00 2001 From: Simon Farnsworth Date: Tue, 8 May 2012 11:25:17 +0100 Subject: [PATCH] Always spin for one complete round before deciding to wait in-kernel --- src/gallium/drivers/r600/r600_pipe.c | 13 +++++++------ 1 files changed, 7 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c index 008a0b9..efcea43 100644 --- a/src/gallium/drivers/r600/r600_pipe.c +++ b/src/gallium/drivers/r600/r600_pipe.c @@ -611,12 +611,6 @@ static boolean r600_fence_finish(struct pipe_screen *pscreen, } while (rscreen->fences.data[rfence->index] == 0) { - /* Special-case infinite timeout - wait for the dummy BO to become idle */ - if (timeout == PIPE_TIMEOUT_INFINITE) { - rscreen->ws->buffer_wait(rfence->sleep_bo->buf, RADEON_USAGE_READWRITE); - break; - } - /* The dummy BO will be busy until the CS including the fence has completed, or * the GPU is reset. Don't bother continuing to spin when the BO is idle. */ if (!rscreen->ws->buffer_is_busy(rfence->sleep_bo->buf, RADEON_USAGE_READWRITE)) @@ -624,6 +618,13 @@ static boolean r600_fence_finish(struct pipe_screen *pscreen, if (++spins % 256) continue; + + /* Special-case infinite timeout - wait for the dummy BO to become idle */ + if (timeout == PIPE_TIMEOUT_INFINITE) { + rscreen->ws->buffer_wait(rfence->sleep_bo->buf, RADEON_USAGE_READWRITE); + break; + } + #ifdef PIPE_OS_UNIX sched_yield(); #else -- 1.7.7.6