r300: DRM version: 2.15.0, Name: ATI RV530, ID: 0x71c5, GB: 1, Z: 2 r300: GART size: 509 MB, VRAM size: 256 MB r300: AA compression RAM: YES, Z compression RAM: YES, HiZ RAM: YES r300: Initial fragment program FRAG DCL IN[0], GENERIC[0], LINEAR DCL OUT[0], COLOR 0: MOV OUT[0], IN[0] 1: END Fragment Program: before compilation # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'rewrite depth out' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'transform KILP' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'unroll loops' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'transform TEX' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'transform IF' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'native rewrite' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'deadcode' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'register rename' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'dataflow optimize' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'inline literals' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'dataflow swizzles' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'dead constants' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'pair translate' # Radeon Compiler Program 0: src0.xyz = input[0], src0.w = input[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'pair scheduling' # Radeon Compiler Program 0: src0.xyz = input[0], src0.w = input[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'dead sources' # Radeon Compiler Program 0: src0.xyz = input[0], src0.w = input[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'register allocation' # Radeon Compiler Program 0: src0.xyz = input[0], src0.w = input[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 R500 Fragment Program: -------- 0 0:CMN_INST 0x00078005:OUT TEX_WAIT wmask: NONE omask: ARGB 1:RGB_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 r300: Initial fragment program FRAG PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1 DCL OUT[0], COLOR DCL CONST[0..1] DCL TEMP[0], LOCAL DCL TEMP[1], LOCAL DCL TEMP[2], LOCAL IMM FLT32 { 0.0000, 1.0000, 0.0000, 0.0000} 0: MOV TEMP[0].x, IMM[0].xxxx 1: BGNLOOP :0 2: SGE TEMP[1].x, TEMP[0].xxxx, CONST[1].xxxx 3: IF TEMP[1].xxxx :0 4: BRK 5: ENDIF 6: SLT TEMP[2].x, CONST[0].xxxx, TEMP[0].xxxx 7: IF TEMP[2].xxxx :0 8: ADD TEMP[0].x, TEMP[0].xxxx, IMM[0].yyyy 9: ELSE :0 10: KILP 11: ADD TEMP[0].x, TEMP[0].xxxx, IMM[0].yyyy 12: ENDIF 13: ENDLOOP :0 14: MOV_SAT OUT[0], IMM[0].xyxx 15: END Fragment Program: before compilation # Radeon Compiler Program 0: MOV temp[0].x, temp[0].0000; 1: BGNLOOP; 2: SGE temp[1].x, temp[0].xxxx, const[1].xxxx; 3: IF temp[1].xxxx; 4: BRK; 5: ENDIF; 6: SLT temp[2].x, const[0].xxxx, temp[0].xxxx; 7: IF temp[2].xxxx; 8: ADD temp[0].x, temp[0].xxxx, temp[0].1111; 9: ELSE; 10: KILP; 11: ADD temp[0].x, temp[0].xxxx, temp[0].1111; 12: ENDIF; 13: ENDLOOP; 14: MOV_SAT output[0], temp[0].0100; Fragment Program: after 'rewrite depth out' # Radeon Compiler Program 0: MOV temp[0].x, temp[0].0000; 1: BGNLOOP; 2: SGE temp[1].x, temp[0].xxxx, const[1].xxxx; 3: IF temp[1].xxxx; 4: BRK; 5: ENDIF; 6: SLT temp[2].x, const[0].xxxx, temp[0].xxxx; 7: IF temp[2].xxxx; 8: ADD temp[0].x, temp[0].xxxx, temp[0].1111; 9: ELSE; 10: KILP; 11: ADD temp[0].x, temp[0].xxxx, temp[0].1111; 12: ENDIF; 13: ENDLOOP; 14: MOV_SAT output[0], temp[0].0100; Fragment Program: after 'transform KILP' # Radeon Compiler Program 0: MOV temp[0].x, temp[0].0000; 1: BGNLOOP; 2: SGE temp[1].x, temp[0].xxxx, const[1].xxxx; 3: IF temp[1].xxxx; 4: BRK; 5: ENDIF; 6: SLT temp[2].x, const[0].xxxx, temp[0].xxxx; 7: IF temp[2].xxxx; 8: ADD temp[0].x, temp[0].xxxx, temp[0].1111; 9: KIL -|temp[2].xxxx|; 10: ENDIF; 11: ENDLOOP; 12: MOV_SAT output[0], temp[0].0100; Fragment Program: after 'unroll loops' # Radeon Compiler Program 0: MOV temp[0].x, temp[0].0000; 1: BGNLOOP; 2: SGE temp[1].x, temp[0].xxxx, const[1].xxxx; 3: IF temp[1].xxxx; 4: BRK; 5: ENDIF; 6: SLT temp[2].x, const[0].xxxx, temp[0].xxxx; 7: IF temp[2].xxxx; 8: ADD temp[0].x, temp[0].xxxx, temp[0].1111; 9: KIL -|temp[2].xxxx|; 10: ENDIF; 11: ENDLOOP; 12: MOV_SAT output[0], temp[0].0100; Fragment Program: after 'transform TEX' # Radeon Compiler Program 0: MOV temp[0].x, temp[0].0000; 1: BGNLOOP; 2: SGE temp[1].x, temp[0].xxxx, const[1].xxxx; 3: IF temp[1].xxxx; 4: BRK; 5: ENDIF; 6: SLT temp[2].x, const[0].xxxx, temp[0].xxxx; 7: IF temp[2].xxxx; 8: ADD temp[0].x, temp[0].xxxx, temp[0].1111; 9: KIL -|temp[2].xxxx|; 10: ENDIF; 11: ENDLOOP; 12: MOV_SAT output[0], temp[0].0100; Fragment Program: after 'transform IF' # Radeon Compiler Program 0: MOV temp[0].x, temp[0].0000; 1: BGNLOOP; 2: SUB none., temp[0].xxxx, const[1].xxxx; [aluresult = (x >= 0)] 3: IF aluresult.x___; 4: BRK; 5: ENDIF; 6: SLT temp[2].x, const[0].xxxx, temp[0].xxxx; 7: MOV none., temp[2].x___; [aluresult = (x != 0)] 8: IF aluresult.x___; 9: ADD temp[0].x, temp[0].xxxx, temp[0].1111; 10: KIL -|temp[2].xxxx|; 11: ENDIF; 12: ENDLOOP; 13: MOV_SAT output[0], temp[0].0100; Fragment Program: after 'native rewrite' # Radeon Compiler Program 0: MOV temp[0].x, temp[0].0000; 1: BGNLOOP; 2: ADD none., temp[0].xxxx, -const[1].xxxx; [aluresult = (x >= 0)] 3: IF aluresult.x___; 4: BRK; 5: ENDIF; 6: ADD temp[2].x, const[0].xxxx, -temp[0].xxxx; 7: CMP temp[2].x, temp[2], none.1111, none.0000; 8: MOV none., temp[2].x___; [aluresult = (x != 0)] 9: IF aluresult.x___; 10: ADD temp[0].x, temp[0].xxxx, temp[0].1111; 11: KIL -|temp[2].xxxx|; 12: ENDIF; 13: ENDLOOP; 14: MOV_SAT output[0], temp[0].0100; Fragment Program: after 'deadcode' # Radeon Compiler Program 0: MOV temp[0].x, temp[0].0___; 1: BGNLOOP; 2: ADD none., temp[0].x___, -const[1].x___; [aluresult = (x >= 0)] 3: IF aluresult.x___; 4: BRK; 5: ENDIF; 6: ADD temp[2].x, const[0].x___, -temp[0].x___; 7: CMP temp[2].x, temp[2].x___, none.1___, none.0___; 8: MOV none., temp[2].x___; [aluresult = (x != 0)] 9: IF aluresult.x___; 10: ADD temp[0].x, temp[0].x___, temp[0].1___; 11: KIL -|temp[2].xxxx|; 12: ENDIF; 13: ENDLOOP; 14: MOV_SAT output[0], temp[0].0100; Fragment Program: after 'register rename' # Radeon Compiler Program 0: MOV temp[0].x, temp[0].0___; 1: BGNLOOP; 2: ADD none., temp[0].x___, -const[1].x___; [aluresult = (x >= 0)] 3: IF aluresult.x___; 4: BRK; 5: ENDIF; 6: ADD temp[2].x, const[0].x___, -temp[0].x___; 7: CMP temp[2].x, temp[2].x___, none.1___, none.0___; 8: MOV none., temp[2].x___; [aluresult = (x != 0)] 9: IF aluresult.x___; 10: ADD temp[0].x, temp[0].x___, temp[0].1___; 11: KIL -|temp[2].xxxx|; 12: ENDIF; 13: ENDLOOP; 14: MOV_SAT output[0], temp[0].0100; Fragment Program: after 'dataflow optimize' # Radeon Compiler Program 0: MOV temp[0].x, none.0___; 1: BGNLOOP; 2: ADD none., temp[0].x___, -const[1].x___; [aluresult = (x >= 0)] 3: IF aluresult.x___; 4: BRK; 5: ENDIF; 6: CMP temp[2].x, (const[0] - temp[0]).x___, none.1___, none.0___; 7: MOV none., temp[2].x___; [aluresult = (x != 0)] 8: IF aluresult.x___; 9: ADD temp[0].x, temp[0].x___, none.1___; 10: KIL -|temp[2].xxxx|; 11: ENDIF; 12: ENDLOOP; 13: MOV_SAT output[0], none.0100; Fragment Program: after 'inline literals' # Radeon Compiler Program 0: MOV temp[0].x, none.0___; 1: BGNLOOP; 2: ADD none., temp[0].x___, -const[1].x___; [aluresult = (x >= 0)] 3: IF aluresult.x___; 4: BRK; 5: ENDIF; 6: CMP temp[2].x, (const[0] - temp[0]).x___, none.1___, none.0___; 7: MOV none., temp[2].x___; [aluresult = (x != 0)] 8: IF aluresult.x___; 9: ADD temp[0].x, temp[0].x___, none.1___; 10: KIL -|temp[2].xxxx|; 11: ENDIF; 12: ENDLOOP; 13: MOV_SAT output[0], none.0100; Fragment Program: after 'dataflow swizzles' # Radeon Compiler Program 0: MOV temp[0].x, none.0___; 1: BGNLOOP; 2: ADD none., temp[0].x___, -const[1].x___; [aluresult = (x >= 0)] 3: IF aluresult.x___; 4: BRK; 5: ENDIF; 6: CMP temp[2].x, (const[0] - temp[0]).x___, none.1___, none.0___; 7: MOV none., temp[2].x___; [aluresult = (x != 0)] 8: IF aluresult.x___; 9: ADD temp[0].x, temp[0].x___, none.1___; 10: MOV temp[1], -|temp[2].xxxx|; 11: KIL temp[1]; 12: ENDIF; 13: ENDLOOP; 14: MOV_SAT output[0], none.0100; Fragment Program: after 'dead constants' # Radeon Compiler Program 0: MOV temp[0].x, none.0___; 1: BGNLOOP; 2: ADD none., temp[0].x___, -const[1].x___; [aluresult = (x >= 0)] 3: IF aluresult.x___; 4: BRK; 5: ENDIF; 6: CMP temp[2].x, (const[0] - temp[0]).x___, none.1___, none.0___; 7: MOV none., temp[2].x___; [aluresult = (x != 0)] 8: IF aluresult.x___; 9: ADD temp[0].x, temp[0].x___, none.1___; 10: MOV temp[1], -|temp[2].xxxx|; 11: KIL temp[1]; 12: ENDIF; 13: ENDLOOP; 14: MOV_SAT output[0], none.0100; Fragment Program: after 'pair translate' # Radeon Compiler Program 0: MAD temp[0].x, src0.0__, src0.111, src0.000 1: BGNLOOP; 2: src0.xyz = temp[0], src1.xyz = const[1] MAD aluresult, src0.x__, src0.111, -src1.x__ [aluresult = (result >= 0)] 3: IF aluresult.x___; 4: BRK; 5: ENDIF; 6: src0.xyz = temp[0], src1.xyz = const[0], srcp.xyz = (src1 - src0) CMP temp[2].x, src0.0__, src0.1__, srcp.x__ 7: src0.xyz = temp[2] MAD aluresult, src0.x__, src0.111, src0.000 [aluresult = (result != 0)] 8: IF aluresult.x___; 9: src0.xyz = temp[0] MAD temp[0].x, src0.x__, src0.111, src0.1__ 10: src0.xyz = temp[2] MAD temp[1].xyz, -|src0.xxx|, src0.111, src0.000 MAD temp[1].w, -|src0.x|, src0.1, src0.0 11: KIL temp[1]; 12: ENDIF; 13: ENDLOOP; 14: MAD_SAT color[0].xyz, src0.010, src0.111, src0.000 MAD_SAT color[0].w, src0.0, src0.1, src0.0 Fragment Program: after 'pair scheduling' # Radeon Compiler Program 0: MAD temp[0].x, src0.0__, src0.111, src0.000 1: BGNLOOP; 2: src0.xyz = temp[0], src1.xyz = const[1] MAD aluresult, src0.x__, src0.111, -src1.x__ [aluresult = (result >= 0)] 3: IF aluresult.x___; 4: BRK; 5: ENDIF; 6: src0.xyz = temp[0], src1.xyz = const[0], srcp.xyz = (src1 - src0) CMP temp[2].x, src0.0__, src0.1__, srcp.x__ 7: src0.xyz = temp[2] MAD aluresult, src0.x__, src0.111, src0.000 [aluresult = (result != 0)] 8: IF aluresult.x___; 9: src0.xyz = temp[2] MAD temp[1].xyz, -|src0.xxx|, src0.111, src0.000 MAD temp[1].w, -|src0.x|, src0.1, src0.0 10: BEGIN_TEX; 11: KIL temp[1]; 12: src0.xyz = temp[0] MAD temp[0].x, src0.x__, src0.111, src0.1__ 13: ENDIF; 14: ENDLOOP; 15: SEM_WAIT MAD_SAT color[0].xyz, src0.010, src0.111, src0.000 MAD_SAT color[0].w, src0.0, src0.1, src0.0 Fragment Program: after 'dead sources' # Radeon Compiler Program 0: MAD temp[0].x, src0.0__, src0.111, src0.000 1: BGNLOOP; 2: src0.xyz = temp[0], src1.xyz = const[1] MAD aluresult, src0.x__, src0.111, -src1.x__ [aluresult = (result >= 0)] 3: IF aluresult.x___; 4: BRK; 5: ENDIF; 6: src0.xyz = temp[0], src1.xyz = const[0], srcp.xyz = (src1 - src0) CMP temp[2].x, src0.0__, src0.1__, srcp.x__ 7: src0.xyz = temp[2] MAD aluresult, src0.x__, src0.111, src0.000 [aluresult = (result != 0)] 8: IF aluresult.x___; 9: src0.xyz = temp[2] MAD temp[1].xyz, -|src0.xxx|, src0.111, src0.000 MAD temp[1].w, -|src0.x|, src0.1, src0.0 10: BEGIN_TEX; 11: KIL temp[1]; 12: src0.xyz = temp[0] MAD temp[0].x, src0.x__, src0.111, src0.1__ 13: ENDIF; 14: ENDLOOP; 15: SEM_WAIT MAD_SAT color[0].xyz, src0.010, src0.111, src0.000 MAD_SAT color[0].w, src0.0, src0.1, src0.0 Fragment Program: after 'register allocation' # Radeon Compiler Program 0: MAD temp[0].x, src0.0__, src0.1__, src0.0__ 1: BGNLOOP; 2: src0.xyz = temp[0], src1.xyz = const[1] MAD aluresult, src0.x__, src0.111, -src1.x__ [aluresult = (result >= 0)] 3: IF aluresult.x___; 4: BRK; 5: ENDIF; 6: src0.xyz = temp[0], src1.xyz = const[0], srcp.xyz = (src1 - src0) CMP temp[0].y, src0._0_, src0._1_, srcp._x_ 7: src0.xyz = temp[0] MAD aluresult, src0.y__, src0.111, src0.000 [aluresult = (result != 0)] 8: IF aluresult.x___; 9: src0.xyz = temp[0] MAD temp[1].xyz, -|src0.yyy|, src0.111, src0.000 MAD temp[1].w, -|src0.y|, src0.1, src0.0 10: BEGIN_TEX; 11: KIL temp[1]; 12: src0.xyz = temp[0] MAD temp[0].x, src0.x__, src0.1__, src0.1__ 13: ENDIF; 14: ENDLOOP; 15: SEM_WAIT MAD_SAT color[0].xyz, src0.010, src0.111, src0.000 MAD_SAT color[0].w, src0.0, src0.1, src0.0 R500 Fragment Program: -------- 0 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00930490:rgb_A_src:0 0/0/0 0 rgb_B_src:0 1/0/0 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 1 0:CMN_INST 0x00000402:FC ALU WAIT wmask: NONE omask: NONE 2:FC_INST 0x10000001:0x00 0 LOOP NONE NONE NONE 0 0 13 IGN_UNC 3:FC_ADDR 0x000d0000:BOOL: 0x00, INT: 0x00, JUMP_ADDR: 13, JMP_GLBL: 0 2 0:CMN_INST 0x01000000:ALU wmask: NONE omask: NONE 1:RGB_ADDR 0x08040400:Addr0: 0t, Addr1: 1c, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x80db0480:rgb_A_src:0 R/0/0 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00c81010:MAD dest:1 rgb_C_src:1 R/0/0 1 alp_C_src:0 R 0 3 0:CMN_INST 0x00000402:FC ALU WAIT wmask: NONE omask: NONE 2:FC_INST 0x12000f00:0x0f 0 JUMP NONE INCR NONE 0 0 6 IGN_UNC 3:FC_ADDR 0x00060000:BOOL: 0x00, INT: 0x00, JUMP_ADDR: 6, JMP_GLBL: 0 4 0:CMN_INST 0x00000402:FC ALU WAIT wmask: NONE omask: NONE 2:FC_INST 0x1401ff05:0xff 0 BREAKLOOP NONE NONE DECR 1 0 14 IGN_UNC 3:FC_ADDR 0x000e0000:BOOL: 0x00, INT: 0x00, JUMP_ADDR: 14, JMP_GLBL: 0 5 0:CMN_INST 0x00000402:FC ALU WAIT wmask: NONE omask: NONE 2:FC_INST 0x01010020:0x00 1 JUMP NONE DECR NONE 1 0 6 3:FC_ADDR 0x00060000:BOOL: 0x00, INT: 0x00, JUMP_ADDR: 6, JMP_GLBL: 0 6 0:CMN_INST 0x00001000:ALU wmask: G omask: NONE 1:RGB_ADDR 0x48040000:Addr0: 0t, Addr1: 0c, Addr2: 128t, srcp:1 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x009a0490:rgb_A_src:0 0/0/0 0 rgb_B_src:0 0/1/0 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00413008:CMP dest:0 rgb_C_src:3 0/R/0 0 alp_C_src:0 R 0 7 0:CMN_INST 0x01800000:ALU wmask: NONE omask: NONE 1:RGB_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x80db0484:rgb_A_src:0 G/0/0 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 8 0:CMN_INST 0x00000402:FC ALU WAIT wmask: NONE omask: NONE 2:FC_INST 0x12000f00:0x0f 0 JUMP NONE INCR NONE 0 0 13 IGN_UNC 3:FC_ADDR 0x000d0000:BOOL: 0x00, INT: 0x00, JUMP_ADDR: 13, JMP_GLBL: 0 9 0:CMN_INST 0x00007800:ALU wmask: ARGB omask: NONE 1:RGB_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db1924:rgb_A_src:0 G/G/G 3 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c64010:MAD dest:1 alp_A_src:0 G 3 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490010:MAD dest:1 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 10 0:CMN_INST 0x00007807:TEX TEX_WAIT wmask: ARGB omask: NONE 1:TEX_INST: 0x02800000: id: 0 op:TEXKILL, ACQ, SCALED 2:TEX_ADDR: 0x0000e401: src: 1 R/G/B/A dst: 0 R/R/R/R 3:TEX_DXDY: 0x00000000 11 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00930480:rgb_A_src:0 R/0/0 0 rgb_B_src:0 1/0/0 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00498000:MAD dest:0 rgb_C_src:0 1/0/0 0 alp_C_src:0 R 0 12 0:CMN_INST 0x00000402:FC ALU WAIT wmask: NONE omask: NONE 2:FC_INST 0x01010020:0x00 1 JUMP NONE DECR NONE 1 0 13 3:FC_ADDR 0x000d0000:BOOL: 0x00, INT: 0x00, JUMP_ADDR: 13, JMP_GLBL: 0 13 0:CMN_INST 0x00000402:FC ALU WAIT wmask: NONE omask: NONE 2:FC_INST 0x1000ff22:0xff 1 ENDLOOP NONE NONE NONE 0 0 2 IGN_UNC 3:FC_ADDR 0x00020000:BOOL: 0x00, INT: 0x00, JUMP_ADDR: 2, JMP_GLBL: 0 14 0:CMN_INST 0x001f8005:OUT TEX_WAIT wmask: NONE omask: ARGB 1:RGB_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db04d0:rgb_A_src:0 0/1/0 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c10000:MAD dest:0 alp_A_src:0 0 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 r300: Initial fragment program FRAG DCL IN[0], GENERIC[0], LINEAR DCL OUT[0], COLOR DCL SAMP[0] 0: TEX OUT[0], IN[0], SAMP[0], 2D 1: END Fragment Program: before compilation # Radeon Compiler Program 0: TEX output[0], input[0], 2D[0]; Fragment Program: after 'rewrite depth out' # Radeon Compiler Program 0: TEX output[0], input[0], 2D[0]; Fragment Program: after 'transform KILP' # Radeon Compiler Program 0: TEX output[0], input[0], 2D[0]; Fragment Program: after 'unroll loops' # Radeon Compiler Program 0: TEX output[0], input[0], 2D[0]; Fragment Program: after 'transform TEX' # Radeon Compiler Program 0: TEX temp[1], input[0], 2D[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'transform IF' # Radeon Compiler Program 0: TEX temp[1], input[0], 2D[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'native rewrite' # Radeon Compiler Program 0: TEX temp[1], input[0], 2D[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'deadcode' # Radeon Compiler Program 0: TEX temp[1], input[0].xy__, 2D[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'register rename' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'dataflow optimize' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'inline literals' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'dataflow swizzles' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'dead constants' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'pair translate' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: src0.xyz = temp[0], src0.w = temp[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'pair scheduling' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[0], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'dead sources' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[0], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'register allocation' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[0], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 R500 Fragment Program: -------- 0 0:CMN_INST 0x00007807:TEX TEX_WAIT wmask: ARGB omask: NONE 1:TEX_INST: 0x02400000: id: 0 op:LD, ACQ, SCALED 2:TEX_ADDR: 0xe400f400: src: 0 R/G/A/A dst: 0 R/G/B/A 3:TEX_DXDY: 0x00000000 1 0:CMN_INST 0x00078005:OUT TEX_WAIT wmask: NONE omask: ARGB 1:RGB_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 Probe at (0,0) Expected: 0.000000 1.000000 0.000000 0.000000 Observed: 1.000000 0.000000 0.000000 0.000000 PIGLIT: {'result': 'fail' }