diff -urN a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c
--- a/src/mesa/drivers/dri/r200/r200_state_init.c	2012-03-22 17:10:07.000000000 +0000
+++ b/src/mesa/drivers/dri/r200/r200_state_init.c	2012-06-10 02:38:45.632318848 +0100
@@ -924,7 +924,7 @@
    rmesa->hw.ptp.cmd[PTP_CMD_1] =
       cmdvec( R200_VS_PNT_SPRITE_ATT_CONST, 1, 12 );
 
-   /* Initial Harware state:
+   /* Initial Hardware state:
     */
    rmesa->hw.ctx.cmd[CTX_PP_MISC] = (R200_ALPHA_TEST_PASS
 				     /* | R200_RIGHT_HAND_CUBE_OGL*/);
diff -urN a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c
--- a/src/mesa/drivers/dri/r200/r200_texstate.c	2012-03-22 17:10:07.000000000 +0000
+++ b/src/mesa/drivers/dri/r200/r200_texstate.c	2012-04-26 17:19:26.198907001 +0100
@@ -1035,11 +1035,9 @@
                                 R200_CLAMP_Q_MASK | 		\
                                 R200_VOLUME_FILTER_MASK)
 
-
 static void disable_tex_obj_state( r200ContextPtr rmesa, 
 				   int unit )
 {
-   
    R200_STATECHANGE( rmesa, vtx );
    rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_VTXFMT_1] &= ~(7 << (unit * 3));
 
@@ -1067,6 +1065,7 @@
       }
    }
 }
+
 static void import_tex_obj_state( r200ContextPtr rmesa,
 				  int unit,
 				  radeonTexObjPtr texobj )
@@ -1095,7 +1094,6 @@
          to not include that command when new drm is used */
       cmd[TEX_PP_CUBIC_FACES] = texobj->pp_cubic_faces;
    }
-
 }
 
 static void set_texgen_matrix( r200ContextPtr rmesa, 
@@ -1379,7 +1377,7 @@
  * Compute the cached hardware register values for the given texture object.
  *
  * \param rmesa Context pointer
- * \param t the r300 texture object
+ * \param t the r200 texture object
  */
 static void setup_hardware_state(r200ContextPtr rmesa, radeonTexObj *t)
 {
@@ -1397,9 +1395,9 @@
    texelBytes = _mesa_get_format_bytes(firstImage->TexFormat);
 
    radeon_print(RADEON_TEXTURE, RADEON_TRACE,
-	"%s(%p, tex %p) log2(w %d, h %d, d %d), texelBytes %d. format %d\n",
-	__func__, rmesa, t, log2Width, log2Height,
-	log2Depth, texelBytes, firstImage->TexFormat);
+       "%s(%p, tex %p) log2(w %d, h %d, d %d), texelBytes %d. texFormat %s\n",
+       __func__, rmesa, t, log2Width, log2Height,
+       log2Depth, texelBytes, _mesa_get_format_name(firstImage->TexFormat));
 
    if (!t->image_override) {
       if (VALID_FORMAT(firstImage->TexFormat)) {
@@ -1415,7 +1413,7 @@
 
 
       } else {
-	 _mesa_problem(NULL, "unexpected texture format in %s",
+	 _mesa_problem(NULL, "unexpected texture format %s in %s", _mesa_get_format_name(firstImage->TexFormat), 
 		       __FUNCTION__);
 	 return;
       }
@@ -1477,7 +1475,7 @@
        */
       t->pp_txformat_x |= R200_TEXCOORD_PROJ;
    }
-   /* FIXME: NPOT sizes, Is it correct realy? */
+   /* FIXME: NPOT sizes, Is it correct really? */
    t->pp_txsize = (((firstImage->Width - 1) << R200_PP_TX_WIDTHMASK_SHIFT)
 		   | ((firstImage->Height - 1) << R200_PP_TX_HEIGHTMASK_SHIFT));
 
@@ -1516,7 +1514,7 @@
       set_re_cntl_d3d( ctx, unit, GL_TRUE );
    R200_STATECHANGE( rmesa, ctx );
    rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= R200_TEX_0_ENABLE << unit;
-   
+
    R200_STATECHANGE( rmesa, vtx );
    rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_VTXFMT_1] &= ~(7 << (unit * 3));
    rmesa->hw.vtx.cmd[VTX_TCL_OUTPUT_VTXFMT_1] |= 4 << (unit * 3);
diff -urN a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c
--- a/src/mesa/drivers/dri/radeon/radeon_common.c	2012-03-22 17:10:07.000000000 +0000
+++ b/src/mesa/drivers/dri/radeon/radeon_common.c	2012-04-29 18:36:30.398511226 +0100
@@ -228,7 +228,7 @@
 
 /**
  * Check if we're about to draw into the front color buffer.
- * If so, set the intel->front_buffer_dirty field to true.
+ * If so, set the radeon->front_buffer_dirty field to true.
  */
 void
 radeon_check_front_buffer_rendering(struct gl_context *ctx)
@@ -706,7 +706,7 @@
 	int ret = 0;
 
 	if (rmesa->cmdbuf.flushing) {
-		fprintf(stderr, "Recursive call into r300FlushCmdBufLocked!\n");
+		fprintf(stderr, "Recursive call into %s!\n", __func__);
 		exit(-1);
 	}
 	rmesa->cmdbuf.flushing = 1;
diff -urN a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c	2012-03-22 17:10:07.000000000 +0000
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c	2012-06-01 19:41:41.777420659 +0100
@@ -462,7 +462,7 @@
 		case __DRI_BUFFER_ACCUM:
 		default:
 			fprintf(stderr,
-				"unhandled buffer attach event, attacment type %d\n",
+				"unhandled buffer attach event, attachment type %d\n",
 				buffers[i].attachment);
 			return;
 		}
diff -urN a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.h	2012-03-22 17:10:07.000000000 +0000
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h	2012-04-24 06:08:21.162532513 +0100
@@ -204,7 +204,7 @@
 	GLboolean validated;
 	/* Minimum LOD to be used during rendering */
 	unsigned minLod;
-	/* Miximum LOD to be used during rendering */
+	/* Maximum LOD to be used during rendering */
 	unsigned maxLod;
 
 	GLuint override_offset;
diff -urN a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c	2012-03-22 17:10:07.000000000 +0000
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c	2012-06-09 00:13:44.284921449 +0100
@@ -690,7 +690,7 @@
     rb->ClassID = RADEON_RB_CLASS;
     rb->Format = format;
     rb->_BaseFormat = _mesa_get_format_base_format(format);
-    rb->InternalFormat = _mesa_get_format_base_format(format);
+    rb->InternalFormat = rb->_BaseFormat;
 
     rrb->dPriv = driDrawPriv;
 
@@ -866,7 +866,7 @@
        att->Texture->Name, newImage->Width, newImage->Height,
        rrb->base.Base.RefCount);
 
-   /* point the renderbufer's region to the texture image region */
+   /* point the renderbuffer's region to the texture image region */
    if (rrb->bo != radeon_image->mt->bo) {
       if (rrb->bo)
   	radeon_bo_unref(rrb->bo);
diff -urN a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c	2012-03-22 17:10:07.000000000 +0000
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c	2012-06-01 19:36:47.805436524 +0100
@@ -445,7 +445,7 @@
 		 * a segfault when mapping textures during software fallbacks.
 		 */
 		radeon_print(RADEON_FALLBACKS, RADEON_IMPORTANT,
-				"%s Trying to map texture in sowftware fallback.\n",
+				"%s Trying to map texture in software fallback.\n",
 				__func__);
 		const uint32_t srcrowstride = _mesa_format_row_stride(image->base.Base.TexFormat, image->base.Base.Width);
 		uint32_t rows = image->base.Base.Height * image->base.Base.Depth;
diff -urN a/src/mesa/main/formats.c b/src/mesa/main/formats.c
--- a/src/mesa/main/formats.c	2012-05-18 05:27:14.000000000 +0100
+++ b/src/mesa/main/formats.c	2012-06-10 02:30:45.052331310 +0100
@@ -2514,7 +2514,7 @@
 }
 
 /**
- * Check if a gl_format exactly matches a GL formaat/type combination
+ * Check if a gl_format exactly matches a GL format/type combination
  * such that we can use memcpy() from one to the other.
  *
  * Note: this matching assumes that GL_PACK/UNPACK_SWAP_BYTES is unset.