Index: src/mesa/drivers/dri/i915/i915_context.h
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/i915/i915_context.h,v
retrieving revision 1.7
diff -r1.7 i915_context.h
31a32
> #include "i915_reg.h"
105a107,108
> #define I915_MAX_INSN          (I915_MAX_TEX_INSN+I915_MAX_ALU_INSN)
> 
155c158,161
< 
---
>    /* Track which R registers are needed for each line.
>     * A register is needed between the time it's written to and the last time
>     * it's read. */
>    GLuint neededRegs[I915_MAX_INSN];
Index: src/mesa/drivers/dri/i915/i915_debug.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/i915/i915_debug.c,v
retrieving revision 1.3
diff -r1.3 i915_debug.c
250c250
<    print_dest_reg(program[0] | A0_DEST_CHANNEL_ALL);
---
>    print_dest_reg(program[0]);
Index: src/mesa/drivers/dri/i915/i915_fragprog.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/i915/i915_fragprog.c,v
retrieving revision 1.18
diff -r1.18 i915_fragprog.c
210c210
<    i915_emit_texld( p,						\
---
>    i915_emit_texld( p, inst,					\
233d232
< 
248a248,250
>    const struct prog_instruction *instStart = inst;
>    int nInstr = 0;
>    GLuint regsNeeded = 0xffff0000;
264a267,337
>    
>    /* Scan over all ops and collect which registers are "needed". */
>    while (inst->Opcode != OPCODE_END) {
>       nInstr++;
>       if (nInstr > I915_MAX_INSN)
>       {
> 	 i915_program_error( p, "Exceeded max instructions" );
> 	 return;
>       }
>       inst++;
>    }
>    do
>    {
>       int opArgs = 0;
>    
>       inst--;
>       nInstr--;
>       switch (inst->Opcode)
>       {
>       case OPCODE_ABS:
>       case OPCODE_COS:
>       case OPCODE_EX2: 
>       case OPCODE_FLR: 
>       case OPCODE_FRC: 
>       case OPCODE_KIL:
>       case OPCODE_LG2: 
>       case OPCODE_LIT: 
>       case OPCODE_MOV: 
>       case OPCODE_RCP: 
>       case OPCODE_RSQ: 
>       case OPCODE_SCS:
>       case OPCODE_SIN:
>       case OPCODE_SWZ: 
>       case OPCODE_TEX: 
>       case OPCODE_TXB: 
>       case OPCODE_TXP: 
>         opArgs = 1;
>         break; 
>       case OPCODE_ADD:
>       case OPCODE_DP3: 
>       case OPCODE_DP4: 
>       case OPCODE_DPH:  
>       case OPCODE_DST: 
>       case OPCODE_MAX:
>       case OPCODE_MIN: 
>       case OPCODE_MUL: 
>       case OPCODE_POW: 
>       case OPCODE_SGE: 
>       case OPCODE_SLT: 
>       case OPCODE_SUB: 
>       case OPCODE_XPD:
>         opArgs = 2;
>         break; 
>       case OPCODE_CMP: 
>       case OPCODE_LRP: 
>       case OPCODE_MAD:
>         opArgs = 3;
>         break;
>       default:
>         break;
>       }
>       for (int a = 0; a < opArgs; a++)
>       {
>          if (inst->SrcReg[a].File == PROGRAM_TEMPORARY)
>             regsNeeded |= 1 << inst->SrcReg[a].Index;
>       }
>       p->neededRegs[nInstr] = regsNeeded;
>       if (inst->DstReg.File == PROGRAM_TEMPORARY)
>          regsNeeded &= ~(1 << inst->DstReg.Index);
>    }
>    while (inst > instStart);
413c486
< 	 i915_emit_texld( p,
---
> 	 i915_emit_texld( p, inst,
Index: src/mesa/drivers/dri/i915/i915_program.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/i915/i915_program.c,v
retrieving revision 1.6
diff -r1.6 i915_program.c
40a41
> #include "program_instruction.h"
196a198,211
> static GLuint get_free_rreg (struct i915_fragment_program *p, 
>                              const struct prog_instruction *inst)
> {
>    const struct gl_fragment_program *program = p->ctx->FragmentProgram._Current;
>    const struct prog_instruction *instStart = program->Base.Instructions;
>    int instn = inst - instStart;
>    int bit = ffs (~p->neededRegs[instn]);
>    if (!bit) {
>       i915_program_error(p, "Can't find free R reg");
>       return 0;
>    }
>    return UREG(REG_TYPE_R, bit - 1);
> }
> 
197a213
>                         const struct prog_instruction *inst,
205,210c221,226
<       /* No real way to work around this in the general case - need to
<        * allocate and declare a new temporary register (a utemp won't
<        * do).  Will fallback for now.
<        */
<       i915_program_error(p, "Can't (yet) swizzle TEX arguments");
<       return 0;
---
>       /* With the help of the "needed registers" table created earlier, pick
>        * a register we can MOV the swizzled TC to (since TEX doesn't support
>        * swizzled sources) */
>       GLuint swizCoord = get_free_rreg (p, inst);
>       i915_emit_arith( p, A0_MOV, swizCoord, A0_DEST_CHANNEL_ALL, 0, coord, 0, 0 );
>       coord = swizCoord;
217c233
<       i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, op );
---
>       i915_emit_texld( p, inst, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, op );
Index: src/mesa/drivers/dri/i915/i915_program.h
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/i915/i915_program.h,v
retrieving revision 1.3
diff -r1.3 i915_program.h
112a113
>                               const struct prog_instruction *inst,
Index: src/mesa/drivers/dri/i915/i915_texprog.c
===================================================================
RCS file: /cvs/mesa/Mesa/src/mesa/drivers/dri/i915/i915_texprog.c,v
retrieving revision 1.6
diff -r1.6 i915_texprog.c
72c72
< 	 p->src_texture = i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, 
---
> 	 p->src_texture = i915_emit_texld( p, 0, tmp, A0_DEST_CHANNEL_ALL,