From 997fabdf2ffd6715e92f2269369c57ed7b0bb236 Mon Sep 17 00:00:00 2001 From: Jerome Glisse Date: Wed, 12 Dec 2012 16:39:19 -0500 Subject: [PATCH] drm/radeon: place write back buffer into vram when wb is disabled This is a safety precaution as some code path will use the write back buffer no matter what (such as dma) thus needs reliable write to this area. Place it in vram if it's disabled. Signed-off-by: Jerome Glisse --- drivers/gpu/drm/radeon/radeon_device.c | 56 ++++++++++++++++++---------------- 1 file changed, 30 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index e2f5f88..277cb2c 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -248,11 +248,39 @@ void radeon_wb_fini(struct radeon_device *rdev) */ int radeon_wb_init(struct radeon_device *rdev) { + unsigned domain = RADEON_GEM_DOMAIN_GTT; int r; + /* disabled via module param */ + if (radeon_no_wb == 1) { + rdev->wb.enabled = false; + } else { + if (rdev->flags & RADEON_IS_AGP) { + /* often unreliable on AGP */ + rdev->wb.enabled = false; + } else if (rdev->family < CHIP_R300) { + /* often unreliable on pre-r300 */ + rdev->wb.enabled = false; + } else { + rdev->wb.enabled = true; + /* event_write fences are only available on r600+ */ + if (rdev->family >= CHIP_R600) { + rdev->wb.use_event = true; + } + } + } + /* always use writeback/events on NI, APUs */ + if (rdev->family >= CHIP_PALM) { + rdev->wb.enabled = true; + rdev->wb.use_event = true; + } + if (!rdev->wb.enabled) { + domain = RADEON_GEM_DOMAIN_VRAM; + } + if (rdev->wb.wb_obj == NULL) { r = radeon_bo_create(rdev, RADEON_GPU_PAGE_SIZE, PAGE_SIZE, true, - RADEON_GEM_DOMAIN_GTT, NULL, &rdev->wb.wb_obj); + domain, NULL, &rdev->wb.wb_obj); if (r) { dev_warn(rdev->dev, "(%d) create WB bo failed\n", r); return r; @@ -263,8 +291,7 @@ int radeon_wb_init(struct radeon_device *rdev) radeon_wb_fini(rdev); return r; } - r = radeon_bo_pin(rdev->wb.wb_obj, RADEON_GEM_DOMAIN_GTT, - &rdev->wb.gpu_addr); + r = radeon_bo_pin(rdev->wb.wb_obj, domain, &rdev->wb.gpu_addr); if (r) { radeon_bo_unreserve(rdev->wb.wb_obj); dev_warn(rdev->dev, "(%d) pin WB bo failed\n", r); @@ -283,29 +310,6 @@ int radeon_wb_init(struct radeon_device *rdev) memset((char *)rdev->wb.wb, 0, RADEON_GPU_PAGE_SIZE); /* disable event_write fences */ rdev->wb.use_event = false; - /* disabled via module param */ - if (radeon_no_wb == 1) { - rdev->wb.enabled = false; - } else { - if (rdev->flags & RADEON_IS_AGP) { - /* often unreliable on AGP */ - rdev->wb.enabled = false; - } else if (rdev->family < CHIP_R300) { - /* often unreliable on pre-r300 */ - rdev->wb.enabled = false; - } else { - rdev->wb.enabled = true; - /* event_write fences are only available on r600+ */ - if (rdev->family >= CHIP_R600) { - rdev->wb.use_event = true; - } - } - } - /* always use writeback/events on NI, APUs */ - if (rdev->family >= CHIP_PALM) { - rdev->wb.enabled = true; - rdev->wb.use_event = true; - } dev_info(rdev->dev, "WB %sabled\n", rdev->wb.enabled ? "en" : "dis"); -- 1.8.0