PGETBL_CTL: 0x7ffc0001 PGTBL_ER: 0x00000000 EXCC: 0x00000000 HWS_PGA: 0x362a4000 IPEIR: 0x00000000 IPEHR: 0x01000000 INST_DONE: 0x7fffffc0 NOP_ID: 0x00000000 HWSTAM: 0xffffeffe SCPD0: 0x00000200 IER: 0x00028053 IIR: 0x00000000 IMR: 0xfffd73ae ISR: 0x00000000 EIR: 0x00000000 EMR: 0xffffffed ESR: 0x00000001 INST_PM: 0x00000000 ECOSKPD: 0x00000306 DCC: 0x000f0400 (single channel, XOR randomization: disabled, XOR bit: 11) CHDECMISC: 0x22b97420 (XOR bank/rank, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present) C0DRB0: 0x000f0400 (0x0400) C0DRB1: 0x0000000f (0x000f) C0DRB2: 0x00000000 (0x0000) C0DRB3: 0x01080000 (0x0000) C1DRB0: 0x0e0d0d0c (0x0d0c) C1DRB1: 0x0f0e0e0d (0x0e0d) C1DRB2: 0x100f0f0e (0x0f0e) C1DRB3: 0x0e0d100f (0x100f) C0DRA01: 0x04020108 (0x0108) C0DRA23: 0x00000402 (0x0402) C1DRA01: 0x100f0e0d (0x0e0d) C1DRA23: 0x1211100f (0x100f) PGETBL_CTL: 0x7ffc0001 VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) DPLL_TEST: 0x00010001 () CACHE_MODE_0: 0x00006820 D_STATE: 0x0000000b DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT) RENCLK_GATE_D1: 0x00000000 RENCLK_GATE_D2: 0x00000000 SDVOB: 0x00480000 (disabled, pipe A, stall disabled, not detected) SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected) SDVOUDI: 0x0000006a DSPARB: 0x00001d9c DSPFW1: 0x00000000 DSPFW2: 0x00000000 DSPFW3: 0x00000000 ADPA: 0x80000010 (enabled, pipe A, -hsync, +vsync) LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel) DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOB: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync) DVOC: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync) DVOA_SRCDIM: 0x00000000 DVOB_SRCDIM: 0x00000000 DVOC_SRCDIM: 0x00000000 BLC_PWM_CTL: 0x01390138 BLC_PWM_CTL2: 0x00000000 PP_CONTROL: 0xabcd0001 (power target: on) PP_STATUS: 0xc0000008 (on, ready, sequencing idle) PP_ON_DELAYS: 0x01c008ca PP_OFF_DELAYS: 0x01c008ca PP_DIVISOR: 0x00270f05 PFIT_CONTROL: 0x00000008 PFIT_PGM_RATIOS: 0x00000000 PORT_HOTPLUG_EN: 0x00000220 PORT_HOTPLUG_STAT: 0x00000300 DSPACNTR: 0xd9000000 (enabled, pipe B) DSPASTRIDE: 0x00002000 (8192 bytes) DSPAPOS: 0x00000000 (0, 0) DSPASIZE: 0x031f04ff (1280, 800) DSPABASE: 0x0c834000 DSPASURF: 0x00000000 DSPATILEOFF: 0x00000000 PIPEACONF: 0x80000000 (enabled, single-wide) PIPEASRC: 0x068f0419 (1680, 1050) PIPEASTAT: 0x00020000 (status: VBLANK_INT_ENABLE) PIPEA_GMCH_DATA_M: 0x00000000 PIPEA_GMCH_DATA_N: 0x00000000 PIPEA_DP_LINK_M: 0x00000000 PIPEA_DP_LINK_N: 0x00000000 CURSOR_A_BASE: 0x34ce4000 CURSOR_A_CONTROL: 0x04000027 CURSOR_A_POSITION: 0x028601db FPA0: 0x00040f05 (n = 4, m1 = 15, m2 = 5) FPA1: 0x00040f05 (n = 4, m1 = 15, m2 = 5) DPLL_A: 0x94010000 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 1, p2 = 10, SDVO mult 1) DPLL_A_MD: 0x00000000 HTOTAL_A: 0x08cf068f (1680 active, 2256 total) HBLANK_A: 0x08cf068f (1680 start, 2256 end) HSYNC_A: 0x07af06f7 (1784 start, 1968 end) VTOTAL_A: 0x043e0419 (1050 active, 1087 total) VBLANK_A: 0x043e0419 (1050 start, 1087 end) VSYNC_A: 0x041d041a (1051 start, 1054 end) BCLRPAT_A: 0x00000000 VSYNCSHIFT_A: 0x00000000 DSPBCNTR: 0xd8000000 (enabled, pipe A) DSPBSTRIDE: 0x00002000 (8192 bytes) DSPBPOS: 0x00000000 (0, 0) DSPBSIZE: 0x0419068f (1680, 1050) DSPBBASE: 0x0c000000 DSPBSURF: 0x00000000 DSPBTILEOFF: 0x00000000 PIPEBCONF: 0x80000000 (enabled, single-wide) PIPEBSRC: 0x04ff031f (1280, 800) PIPEBSTAT: 0x00020000 (status: VBLANK_INT_ENABLE) PIPEB_GMCH_DATA_M: 0x00000000 PIPEB_GMCH_DATA_N: 0x00000000 PIPEB_DP_LINK_M: 0x00000000 PIPEB_DP_LINK_N: 0x00000000 CURSOR_B_BASE: 0x00000000 CURSOR_B_CONTROL: 0x10000000 CURSOR_B_POSITION: 0x8032025b FPB0: 0x00020d06 (n = 2, m1 = 13, m2 = 6) FPB1: 0x00020d06 (n = 2, m1 = 13, m2 = 6) DPLL_B: 0x98020000 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14, SDVO mult 1) DPLL_B_MD: 0x00000000 HTOTAL_B: 0x059f04ff (1280 active, 1440 total) HBLANK_B: 0x059f04ff (1280 start, 1440 end) HSYNC_B: 0x054f052f (1328 start, 1360 end) VTOTAL_B: 0x0336031f (800 active, 823 total) VBLANK_B: 0x0336031f (800 start, 823 end) VSYNC_B: 0x03280322 (803 start, 809 end) BCLRPAT_B: 0x00000000 VSYNCSHIFT_B: 0x00000000 VCLK_DIVISOR_VGA0: 0x00031108 VCLK_DIVISOR_VGA1: 0x00031406 VCLK_POST_DIV: 0x00020002 VGACNTRL: 0x80000000 (disabled) TV_CTL: 0x00000000 TV_DAC: 0x70000000 TV_CSC_Y: 0x00000000 TV_CSC_Y2: 0x00000000 TV_CSC_U: 0x00000000 TV_CSC_U2: 0x00000000 TV_CSC_V: 0x00000000 TV_CSC_V2: 0x00000000 TV_CLR_KNOBS: 0x00000000 TV_CLR_LEVEL: 0x00000000 TV_H_CTL_1: 0x00000000 TV_H_CTL_2: 0x00000000 TV_H_CTL_3: 0x00000000 TV_V_CTL_1: 0x00000000 TV_V_CTL_2: 0x00000000 TV_V_CTL_3: 0x00000000 TV_V_CTL_4: 0x00000000 TV_V_CTL_5: 0x00000000 TV_V_CTL_6: 0x00000000 TV_V_CTL_7: 0x00000000 TV_SC_CTL_1: 0x00000000 TV_SC_CTL_2: 0x00000000 TV_SC_CTL_3: 0x00000000 TV_WIN_POS: 0x00000000 TV_WIN_SIZE: 0x00000000 TV_FILTER_CTL_1: 0x00000000 TV_FILTER_CTL_2: 0x00000000 TV_FILTER_CTL_3: 0x00000000 TV_CC_CONTROL: 0x00000000 TV_CC_DATA: 0x00000000 TV_H_LUMA_0: 0x00000000 TV_H_LUMA_59: 0x00000000 TV_H_CHROMA_0: 0x00000000 TV_H_CHROMA_59: 0x00000000 FBC_CFB_BASE: 0x00000000 FBC_LL_BASE: 0x00000000 FBC_CONTROL: 0x00000000 FBC_COMMAND: 0x00000000 FBC_STATUS: 0x20000000 FBC_CONTROL2: 0x00000000 FBC_FENCE_OFF: 0x00000000 FBC_MOD_NUM: 0x00000000 MI_MODE: 0x00000200 MI_ARB_STATE: 0x00000840 MI_RDRET_STATE: 0x00000000 ECOSKPD: 0x00000306 DP_B: 0x00000000 DPB_AUX_CH_CTL: 0x00000000 DPB_AUX_CH_DATA1: 0x00000000 DPB_AUX_CH_DATA2: 0x00000000 DPB_AUX_CH_DATA3: 0x00000000 DPB_AUX_CH_DATA4: 0x00000000 DPB_AUX_CH_DATA5: 0x00000000 DP_C: 0x00000000 DPC_AUX_CH_CTL: 0x00000000 DPC_AUX_CH_DATA1: 0x00000000 DPC_AUX_CH_DATA2: 0x00000000 DPC_AUX_CH_DATA3: 0x00000000 DPC_AUX_CH_DATA4: 0x00000000 DPC_AUX_CH_DATA5: 0x00000000 DP_D: 0x00000000 DPD_AUX_CH_CTL: 0x00000000 DPD_AUX_CH_DATA1: 0x00000000 DPD_AUX_CH_DATA2: 0x00000000 DPD_AUX_CH_DATA3: 0x00000000 DPD_AUX_CH_DATA4: 0x00000000 DPD_AUX_CH_DATA5: 0x00000000 AUD_CONFIG: 0x00000000 AUD_HDMIW_STATUS: 0x00000000 AUD_CONV_CHCNT: 0x00000000 VIDEO_DIP_CTL: 0x00000000 AUD_PINW_CNTR: 0x00000000 AUD_CNTL_ST: 0x00000000 AUD_PIN_CAP: 0x00000000 AUD_PINW_CAP: 0x00000000 AUD_PINW_UNSOLRESP: 0x00000000 AUD_OUT_DIG_CNVT: 0x00000000 AUD_OUT_CWCAP: 0x00000000 AUD_GRP_CAP: 0x00000000 FENCE 0: 0x00700001 (enabled, X tiled, 512 pitch, 0x00700000 - 0x00800000 (1024kb)) FENCE 1: 0x07400131 (enabled, X tiled, 4096 pitch, 0x07400000 - 0x07600000 (2048kb)) FENCE 2: 0x05000441 (enabled, X tiled, 8192 pitch, 0x05000000 - 0x06000000 (16384kb)) FENCE 3: 0x00000000 (disabled) FENCE 4: 0x0b000441 (enabled, X tiled, 8192 pitch, 0x0b000000 - 0x0c000000 (16384kb)) FENCE 5: 0x00500011 (enabled, X tiled, 1024 pitch, 0x00500000 - 0x00600000 (1024kb)) FENCE 6: 0x00000000 (disabled) FENCE 7: 0x0c000441 (enabled, X tiled, 8192 pitch, 0x0c000000 - 0x0d000000 (16384kb)) FENCE 8: 0x0ac00231 (enabled, X tiled, 4096 pitch, 0x0ac00000 - 0x0b000000 (4096kb)) FENCE 9: 0x0d000441 (enabled, X tiled, 8192 pitch, 0x0d000000 - 0x0e000000 (16384kb)) FENCE 10: 0x07100011 (enabled, X tiled, 1024 pitch, 0x07100000 - 0x07200000 (1024kb)) FENCE 11: 0x00000000 (disabled) FENCE 12: 0x00000000 (disabled) FENCE 13: 0x00000000 (disabled) FENCE 14: 0x00000000 (disabled) FENCE 15: 0x07600131 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 0: 0x0ac00231 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 0: 0x0d000441 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 1: 0x07100011 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 1: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 2: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 2: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 3: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 3: 0x07600131 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 4: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 4: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 5: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 5: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 6: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 6: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 7: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 7: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 8: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 8: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 9: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 9: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 10: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 10: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 11: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 11: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 12: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 12: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 13: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 13: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 14: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 14: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE START 15: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) FENCE END 15: 0x00000000 (enabled, X tiled, 4096 pitch, 0x07600000 - 0x07800000 (2048kb)) INST_PM: 0x00000000 pipe A dot 147200 n 4 m1 15 m2 5 p1 1 p2 10 pipe B dot 71142 n 2 m1 13 m2 6 p1 2 p2 14