[ 88.033221] [drm:i915_driver_open], [ 88.033269] [drm:intel_crtc_set_config], [CRTC:3] [NOFB] [ 88.033279] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] [ 88.033286] [drm:intel_crtc_set_config], [CRTC:4] [FB:14] #connectors=1 (x y) (0 0) [ 88.033294] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] [ 88.033315] [drm:i915_driver_open], [ 88.033735] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[2] ENCODERS[2] [ 88.033767] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[2] ENCODERS[2] [ 88.033813] [drm:drm_mode_getconnector], [CONNECTOR:5:?] [ 88.033824] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] [ 88.033853] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : [ 88.033862] [drm:drm_mode_debug_printmodeline], Modeline 13:"1024x600" 60 54200 1024 1048 1184 1438 600 603 604 628 0x48 0xa [ 88.033895] [drm:drm_mode_getconnector], [CONNECTOR:5:?] [ 88.033995] [drm:drm_mode_getconnector], [CONNECTOR:5:?] [ 88.034352] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] [ 88.034381] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:5:LVDS-1] probed modes : [ 88.034390] [drm:drm_mode_debug_printmodeline], Modeline 13:"1024x600" 60 54200 1024 1048 1184 1438 600 603 604 628 0x48 0xa [ 88.034415] [drm:drm_mode_getconnector], [CONNECTOR:5:?] [ 88.079664] [drm:drm_mode_addfb], [FB:15] [ 88.105821] [drm:drm_mode_addfb], [FB:16] [ 88.105941] [drm:drm_mode_setcrtc], [CRTC:4] [ 88.105957] [drm:drm_mode_setcrtc], [CONNECTOR:5:LVDS-1] [ 88.105964] [drm:intel_crtc_set_config], [CRTC:4] [FB:15] #connectors=1 (x y) (0 0) [ 88.105976] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] [ 88.106411] [drm:i9xx_update_plane], Writing base 00740000 00000000 0 0 4096 [ 91.140847] [drm:intel_crtc_set_config], [CRTC:4] [NOFB] [ 91.140862] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [NOCRTC] [ 91.140867] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch [ 91.140872] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch [ 91.140877] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 2 [ 91.140885] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0 [ 91.437069] [drm:pineview_update_wm], Self-refresh is disabled [ 91.437083] [drm:intel_modeset_check_state], [ENCODER:6:LVDS-6] [ 91.437090] [drm:intel_modeset_check_state], [ENCODER:12:DAC-12] [ 91.437095] [drm:intel_modeset_check_state], [CRTC:3] [ 91.437099] [drm:intel_modeset_check_state], [CRTC:4] [ 91.440337] [drm:intel_crtc_set_config], [CRTC:3] [NOFB] [ 91.440348] [drm:intel_crtc_set_config], [CRTC:4] [FB:14] #connectors=1 (x y) (0 0) [ 91.440355] [drm:intel_set_config_compute_mode_changes], crtc has no fb, full mode set [ 91.440360] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch [ 91.440366] [drm:intel_modeset_stage_output_state], [CONNECTOR:5:LVDS-1] to [CRTC:4] [ 91.440371] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch [ 91.440375] [drm:intel_crtc_set_config], attempting to set mode from userspace [ 91.440380] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x600" 60 54200 1024 1048 1184 1438 600 603 604 628 0x48 0xa [ 91.440389] [drm:intel_set_mode], set mode pipe masks: modeset: 2, prepare: 2, disable: 0 [ 91.440400] [drm:intel_modeset_adjusted_mode], [CRTC:4] [ 91.440408] [drm:i9xx_get_refclk], using SSC reference clock of 100 MHz [ 91.441850] [drm:i9xx_crtc_mode_set], Mode for pipe B: [ 91.441857] [drm:drm_mode_debug_printmodeline], Modeline 8:"1024x600" 60 54200 1024 1048 1184 1438 600 603 604 628 0x48 0xa [ 91.459070] [drm:i9xx_update_plane], Writing base 00030000 00000000 0 0 4096 [ 91.459089] [drm:pineview_update_wm], Self-refresh is disabled [ 91.459095] [drm:intel_crtc_mode_set], [ENCODER:6:LVDS-6] set [MODE:8:1024x600] [ 91.459102] [drm:intel_calculate_wm], FIFO entries required for mode: 12 [ 91.459106] [drm:intel_calculate_wm], FIFO watermark level: 490 [ 91.459111] [drm:pineview_update_wm], DSPFW1 register is f5030f0f [ 91.459116] [drm:intel_calculate_wm], FIFO entries required for mode: 14 [ 91.459120] [drm:intel_calculate_wm], FIFO watermark level: 493 [ 91.459125] [drm:intel_calculate_wm], FIFO entries required for mode: 113 [ 91.459129] [drm:intel_calculate_wm], FIFO watermark level: 389 [ 91.459134] [drm:intel_calculate_wm], FIFO entries required for mode: 115 [ 91.459138] [drm:intel_calculate_wm], FIFO watermark level: 392 [ 91.459143] [drm:pineview_update_wm], DSPFW3 register is 3f3f0185 [ 91.459148] [drm:pineview_update_wm], Self-refresh is enabled [ 91.477141] [drm:intel_enable_lvds], applying panel-fitter: 8, 0 [ 91.899066] [drm:intel_panel_actually_set_backlight], set backlight PWM = 13046 [ 91.899088] [drm:intel_connector_check_state], [CONNECTOR:5:LVDS-1] [ 91.899095] [drm:intel_modeset_check_state], [ENCODER:6:LVDS-6] [ 91.899101] [drm:intel_modeset_check_state], [ENCODER:12:DAC-12] [ 91.899106] [drm:intel_modeset_check_state], [CRTC:3] [ 91.899111] [drm:intel_modeset_check_state], [CRTC:4]