r300: DRM version: 2.24.0, Name: ATI RV530, ID: 0x71c5, GB: 1, Z: 2 r300: GART size: 509 MB, VRAM size: 256 MB r300: AA compression RAM: YES, Z compression RAM: NO, HiZ RAM: NO r300: DRM version: 2.24.0, Name: ATI RV530, ID: 0x71c5, GB: 1, Z: 2 r300: GART size: 509 MB, VRAM size: 256 MB r300: AA compression RAM: YES, Z compression RAM: NO, HiZ RAM: NO radeon: Acquired access to AA optimizations. r300: Initial fragment program FRAG DCL IN[0], GENERIC[0], LINEAR DCL OUT[0], COLOR 0: MOV OUT[0], IN[0] 1: END Fragment Program: before compilation # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'rewrite depth out' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'transform KILP' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'unroll loops' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'transform TEX' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'transform IF' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'native rewrite' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'deadcode' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'register rename' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'dataflow optimize' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'dataflow swizzles' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'dead constants' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'pair translate' # Radeon Compiler Program 0: src0.xyz = input[0], src0.w = input[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'pair scheduling' # Radeon Compiler Program 0: src0.xyz = input[0], src0.w = input[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'dead sources' # Radeon Compiler Program 0: src0.xyz = input[0], src0.w = input[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'register allocation' # Radeon Compiler Program 0: src0.xyz = input[0], src0.w = input[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 R500 Fragment Program: -------- 0 0:CMN_INST 0x00078005:OUT TEX_WAIT wmask: NONE omask: ARGB 1:RGB_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 radeon: Released access to AA optimizations. r300: DRM version: 2.24.0, Name: ATI RV530, ID: 0x71c5, GB: 1, Z: 2 r300: GART size: 509 MB, VRAM size: 256 MB r300: AA compression RAM: YES, Z compression RAM: NO, HiZ RAM: NO radeon: Acquired access to AA optimizations. r300: Initial fragment program FRAG DCL IN[0], GENERIC[0], LINEAR DCL OUT[0], COLOR 0: MOV OUT[0], IN[0] 1: END Fragment Program: before compilation # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'rewrite depth out' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'transform KILP' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'unroll loops' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'transform TEX' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'transform IF' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'native rewrite' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'deadcode' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'register rename' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'dataflow optimize' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'dataflow swizzles' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'dead constants' # Radeon Compiler Program 0: MOV output[0], input[0]; Fragment Program: after 'pair translate' # Radeon Compiler Program 0: src0.xyz = input[0], src0.w = input[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'pair scheduling' # Radeon Compiler Program 0: src0.xyz = input[0], src0.w = input[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'dead sources' # Radeon Compiler Program 0: src0.xyz = input[0], src0.w = input[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'register allocation' # Radeon Compiler Program 0: src0.xyz = input[0], src0.w = input[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 R500 Fragment Program: -------- 0 0:CMN_INST 0x00078005:OUT TEX_WAIT wmask: NONE omask: ARGB 1:RGB_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 r300: Initial fragment program FRAG DCL IN[0], GENERIC[0], LINEAR DCL OUT[0], COLOR DCL SAMP[0] 0: TEX OUT[0], IN[0], SAMP[0], 2D 1: END Fragment Program: before compilation # Radeon Compiler Program 0: TEX output[0], input[0], 2D[0]; Fragment Program: after 'rewrite depth out' # Radeon Compiler Program 0: TEX output[0], input[0], 2D[0]; Fragment Program: after 'transform KILP' # Radeon Compiler Program 0: TEX output[0], input[0], 2D[0]; Fragment Program: after 'unroll loops' # Radeon Compiler Program 0: TEX output[0], input[0], 2D[0]; Fragment Program: after 'transform TEX' # Radeon Compiler Program 0: TEX temp[1], input[0], 2D[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'transform IF' # Radeon Compiler Program 0: TEX temp[1], input[0], 2D[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'native rewrite' # Radeon Compiler Program 0: TEX temp[1], input[0], 2D[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'deadcode' # Radeon Compiler Program 0: TEX temp[1], input[0].xy__, 2D[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'register rename' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'dataflow optimize' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'dataflow swizzles' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'dead constants' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'pair translate' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: src0.xyz = temp[0], src0.w = temp[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'pair scheduling' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[0], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'dead sources' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[0], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'register allocation' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[0], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 R500 Fragment Program: -------- 0 0:CMN_INST 0x00007807:TEX TEX_WAIT wmask: ARGB omask: NONE 1:TEX_INST: 0x02400000: id: 0 op:LD, ACQ, SCALED 2:TEX_ADDR: 0xe400f400: src: 0 R/G/A/A dst: 0 R/G/B/A 3:TEX_DXDY: 0x00000000 1 0:CMN_INST 0x00078005:OUT TEX_WAIT wmask: NONE omask: ARGB 1:RGB_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 r300: Initial fragment program FRAG PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1 DCL IN[0], GENERIC[12], PERSPECTIVE DCL OUT[0], COLOR DCL SAMP[0] DCL CONST[1..2] DCL TEMP[0], LOCAL DCL TEMP[1], LOCAL 0: MOV TEMP[0].xyz, CONST[2].xyzx 1: MOV TEMP[0].w, CONST[1].xxxx 2: TEX TEMP[1], IN[0].xyyy, SAMP[0], 2D 3: MUL TEMP[0], TEMP[0], TEMP[1] 4: MOV_SAT OUT[0], TEMP[0] 5: END Fragment Program: before compilation # Radeon Compiler Program 0: MOV temp[0].xyz, const[2].xyzx; 1: MOV temp[0].w, const[1].xxxx; 2: TEX temp[1], input[0].xyyy, 2D[0]; 3: MUL temp[0], temp[0], temp[1]; 4: MOV_SAT output[0], temp[0]; Fragment Program: after 'rewrite depth out' # Radeon Compiler Program 0: MOV temp[0].xyz, const[2].xyzx; 1: MOV temp[0].w, const[1].xxxx; 2: TEX temp[1], input[0].xyyy, 2D[0]; 3: MUL temp[0], temp[0], temp[1]; 4: MOV_SAT output[0], temp[0]; Fragment Program: after 'transform KILP' # Radeon Compiler Program 0: MOV temp[0].xyz, const[2].xyzx; 1: MOV temp[0].w, const[1].xxxx; 2: TEX temp[1], input[0].xyyy, 2D[0]; 3: MUL temp[0], temp[0], temp[1]; 4: MOV_SAT output[0], temp[0]; Fragment Program: after 'unroll loops' # Radeon Compiler Program 0: MOV temp[0].xyz, const[2].xyzx; 1: MOV temp[0].w, const[1].xxxx; 2: TEX temp[1], input[0].xyyy, 2D[0]; 3: MUL temp[0], temp[0], temp[1]; 4: MOV_SAT output[0], temp[0]; Fragment Program: after 'transform TEX' # Radeon Compiler Program 0: MOV temp[0].xyz, const[2].xyzx; 1: MOV temp[0].w, const[1].xxxx; 2: TEX temp[1], input[0].xyyy, 2D[0]; 3: MUL temp[0], temp[0], temp[1]; 4: MOV_SAT output[0], temp[0]; Fragment Program: after 'transform IF' # Radeon Compiler Program 0: MOV temp[0].xyz, const[2].xyzx; 1: MOV temp[0].w, const[1].xxxx; 2: TEX temp[1], input[0].xyyy, 2D[0]; 3: MUL temp[0], temp[0], temp[1]; 4: MOV_SAT output[0], temp[0]; Fragment Program: after 'native rewrite' # Radeon Compiler Program 0: MOV temp[0].xyz, const[2].xyzx; 1: MOV temp[0].w, const[1].xxxx; 2: TEX temp[1], input[0].xyyy, 2D[0]; 3: MUL temp[0], temp[0], temp[1]; 4: MOV_SAT output[0], temp[0]; Fragment Program: after 'deadcode' # Radeon Compiler Program 0: MOV temp[0].xyz, const[2].xyz_; 1: MOV temp[0].w, const[1].___x; 2: TEX temp[1], input[0].xy__, 2D[0]; 3: MUL temp[0], temp[0], temp[1]; 4: MOV_SAT output[0], temp[0]; Fragment Program: after 'register rename' # Radeon Compiler Program 0: MOV temp[2].xyz, const[2].xyz_; 1: MOV temp[2].w, const[1].___x; 2: TEX temp[3], input[0].xy__, 2D[0]; 3: MUL temp[4], temp[2], temp[3]; 4: MOV_SAT output[0], temp[4]; Fragment Program: after 'dataflow optimize' # Radeon Compiler Program 0: MOV temp[2].xyz, const[2].xyz_; 1: MOV temp[2].w, const[1].___x; 2: TEX temp[3], input[0].xy__, 2D[0]; 3: MUL temp[4], temp[2], temp[3]; 4: MOV_SAT output[0], temp[4]; Fragment Program: after 'dataflow swizzles' # Radeon Compiler Program 0: MOV temp[2].xyz, const[2].xyz_; 1: MOV temp[2].w, const[1].___x; 2: TEX temp[3], input[0].xy__, 2D[0]; 3: MUL temp[4], temp[2], temp[3]; 4: MOV_SAT output[0], temp[4]; Fragment Program: after 'dead constants' # Radeon Compiler Program 0: MOV temp[2].xyz, const[2].xyz_; 1: MOV temp[2].w, const[1].___x; 2: TEX temp[3], input[0].xy__, 2D[0]; 3: MUL temp[4], temp[2], temp[3]; 4: MOV_SAT output[0], temp[4]; Fragment Program: after 'pair translate' # Radeon Compiler Program 0: src0.xyz = const[2] MAD temp[2].xyz, src0.xyz, src0.111, src0.000 1: src0.xyz = const[1] MAD temp[2].w, src0.x, src0.1, src0.0 2: TEX temp[3], input[0].xy__, 2D[0]; 3: src0.xyz = temp[2], src0.w = temp[2], src1.xyz = temp[3], src1.w = temp[3] MAD temp[4].xyz, src0.xyz, src1.xyz, src0.000 MAD temp[4].w, src0.w, src1.w, src0.0 4: src0.xyz = temp[4], src0.w = temp[4] MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000 MAD_SAT color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'pair scheduling' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[3], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = const[2], src1.xyz = const[1] MAD temp[2].xyz, src0.xyz, src0.111, src0.000 MAD temp[2].w, src1.x, src0.1, src0.0 3: src0.xyz = temp[2], src0.w = temp[2], src1.xyz = temp[3], src1.w = temp[3] SEM_WAIT MAD temp[4].xyz, src0.xyz, src1.xyz, src0.000 MAD temp[4].w, src0.w, src1.w, src0.0 4: src0.xyz = temp[4], src0.w = temp[4] MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000 MAD_SAT color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'dead sources' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[3], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = const[2], src1.xyz = const[1] MAD temp[2].xyz, src0.xyz, src0.111, src0.000 MAD temp[2].w, src1.x, src0.1, src0.0 3: src0.xyz = temp[2], src0.w = temp[2], src1.xyz = temp[3], src1.w = temp[3] SEM_WAIT MAD temp[4].xyz, src0.xyz, src1.xyz, src0.000 MAD temp[4].w, src0.w, src1.w, src0.0 4: src0.xyz = temp[4], src0.w = temp[4] MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000 MAD_SAT color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'register allocation' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[0], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = const[2], src1.xyz = const[1] MAD temp[1].xyz, src0.xyz, src0.111, src0.000 MAD temp[1].w, src1.x, src0.1, src0.0 3: src0.xyz = temp[1], src0.w = temp[1], src1.xyz = temp[0], src1.w = temp[0] SEM_WAIT MAD temp[0].xyz, src0.xyz, src1.xyz, src0.000 MAD temp[0].w, src0.w, src1.w, src0.0 4: src0.xyz = temp[0], src0.w = temp[0] MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000 MAD_SAT color[0].w, src0.w, src0.1, src0.0 R500 Fragment Program: -------- 0 0:CMN_INST 0x00007807:TEX TEX_WAIT wmask: ARGB omask: NONE 1:TEX_INST: 0x02400000: id: 0 op:LD, ACQ, SCALED 2:TEX_ADDR: 0xe400f400: src: 0 R/G/A/A dst: 0 R/G/B/A 3:TEX_DXDY: 0x00000000 1 0:CMN_INST 0x00007800:ALU wmask: ARGB omask: NONE 1:RGB_ADDR 0x08040502:Addr0: 2c, Addr1: 1c, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c01010:MAD dest:1 alp_A_src:1 R 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490010:MAD dest:1 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 2 0:CMN_INST 0x00007804:ALU TEX_WAIT wmask: ARGB omask: NONE 1:RGB_ADDR 0x08000001:Addr0: 1t, Addr1: 0t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08000001:Addr0: 1t, Addr1: 0t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00442220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/G/B 0 targ: 0 4 ALPHA_INST:0x0068c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:1 A 0 targ 0 w:0 5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 3 0:CMN_INST 0x001f8005:OUT TEX_WAIT wmask: NONE omask: ARGB 1:RGB_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 r300: Initial fragment program FRAG PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1 DCL IN[0], GENERIC[12], PERSPECTIVE DCL IN[1], GENERIC[13], PERSPECTIVE DCL OUT[0], COLOR DCL SAMP[0] DCL CONST[0..1] DCL CONST[3..4] DCL TEMP[0], LOCAL DCL TEMP[1], LOCAL DCL TEMP[2], LOCAL DCL TEMP[3], LOCAL IMM[0] FLT32 { 1,0000, 0,0000, 0,0000, 0,0000} 0: MOV TEMP[0].yz, IN[1].yxyy 1: MOV TEMP[0].x, IN[0].wwww 2: MOV TEMP[1].w, CONST[4].xxxx 3: MOV TEMP[1].xyz, TEMP[0].xyzx 4: MUL TEMP[2].x, CONST[1].xxxx, IN[0].xxxx 5: MOV TEMP[2].yz, IN[0].zyzz 6: TEX TEMP[2].xyz, TEMP[2].xyzz, SAMP[0], CUBE 7: SEQ TEMP[3].x, CONST[0].xxxx, IMM[0].xxxx 8: IF TEMP[3].xxxx :0 9: ADD TEMP[3].x, IMM[0].xxxx, -CONST[3].xxxx 10: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[3].xxxx 11: MAD TEMP[1].xyz, TEMP[2].xyzz, CONST[3].xxxx, TEMP[0].xyzz 12: ELSE :0 13: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[2].xyzz 14: ENDIF 15: MOV_SAT OUT[0], TEMP[1] 16: END Fragment Program: before compilation # Radeon Compiler Program 0: MOV temp[0].yz, input[1].yxyy; 1: MOV temp[0].x, input[0].wwww; 2: MOV temp[1].w, const[4].xxxx; 3: MOV temp[1].xyz, temp[0].xyzx; 4: MUL temp[2].x, const[1].xxxx, input[0].xxxx; 5: MOV temp[2].yz, input[0].zyzz; 6: TEX temp[2].xyz, temp[2].xyzz, CUBE[0]; 7: SEQ temp[3].x, const[0].xxxx, temp[0].1111; 8: IF temp[3].xxxx; 9: ADD temp[3].x, temp[0].1111, -const[3].xxxx; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: MAD temp[1].xyz, temp[2].xyzz, const[3].xxxx, temp[0].xyzz; 12: ELSE; 13: MUL temp[1].xyz, temp[1].xyzz, temp[2].xyzz; 14: ENDIF; 15: MOV_SAT output[0], temp[1]; Fragment Program: after 'rewrite depth out' # Radeon Compiler Program 0: MOV temp[0].yz, input[1].yxyy; 1: MOV temp[0].x, input[0].wwww; 2: MOV temp[1].w, const[4].xxxx; 3: MOV temp[1].xyz, temp[0].xyzx; 4: MUL temp[2].x, const[1].xxxx, input[0].xxxx; 5: MOV temp[2].yz, input[0].zyzz; 6: TEX temp[2].xyz, temp[2].xyzz, CUBE[0]; 7: SEQ temp[3].x, const[0].xxxx, temp[0].1111; 8: IF temp[3].xxxx; 9: ADD temp[3].x, temp[0].1111, -const[3].xxxx; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: MAD temp[1].xyz, temp[2].xyzz, const[3].xxxx, temp[0].xyzz; 12: ELSE; 13: MUL temp[1].xyz, temp[1].xyzz, temp[2].xyzz; 14: ENDIF; 15: MOV_SAT output[0], temp[1]; Fragment Program: after 'transform KILP' # Radeon Compiler Program 0: MOV temp[0].yz, input[1].yxyy; 1: MOV temp[0].x, input[0].wwww; 2: MOV temp[1].w, const[4].xxxx; 3: MOV temp[1].xyz, temp[0].xyzx; 4: MUL temp[2].x, const[1].xxxx, input[0].xxxx; 5: MOV temp[2].yz, input[0].zyzz; 6: TEX temp[2].xyz, temp[2].xyzz, CUBE[0]; 7: SEQ temp[3].x, const[0].xxxx, temp[0].1111; 8: IF temp[3].xxxx; 9: ADD temp[3].x, temp[0].1111, -const[3].xxxx; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: MAD temp[1].xyz, temp[2].xyzz, const[3].xxxx, temp[0].xyzz; 12: ELSE; 13: MUL temp[1].xyz, temp[1].xyzz, temp[2].xyzz; 14: ENDIF; 15: MOV_SAT output[0], temp[1]; Fragment Program: after 'unroll loops' # Radeon Compiler Program 0: MOV temp[0].yz, input[1].yxyy; 1: MOV temp[0].x, input[0].wwww; 2: MOV temp[1].w, const[4].xxxx; 3: MOV temp[1].xyz, temp[0].xyzx; 4: MUL temp[2].x, const[1].xxxx, input[0].xxxx; 5: MOV temp[2].yz, input[0].zyzz; 6: TEX temp[2].xyz, temp[2].xyzz, CUBE[0]; 7: SEQ temp[3].x, const[0].xxxx, temp[0].1111; 8: IF temp[3].xxxx; 9: ADD temp[3].x, temp[0].1111, -const[3].xxxx; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: MAD temp[1].xyz, temp[2].xyzz, const[3].xxxx, temp[0].xyzz; 12: ELSE; 13: MUL temp[1].xyz, temp[1].xyzz, temp[2].xyzz; 14: ENDIF; 15: MOV_SAT output[0], temp[1]; Fragment Program: after 'transform TEX' # Radeon Compiler Program 0: MOV temp[0].yz, input[1].yxyy; 1: MOV temp[0].x, input[0].wwww; 2: MOV temp[1].w, const[4].xxxx; 3: MOV temp[1].xyz, temp[0].xyzx; 4: MUL temp[2].x, const[1].xxxx, input[0].xxxx; 5: MOV temp[2].yz, input[0].zyzz; 6: TEX temp[2].xyz, temp[2].xyzz, CUBE[0]; 7: SEQ temp[3].x, const[0].xxxx, temp[0].1111; 8: IF temp[3].xxxx; 9: ADD temp[3].x, temp[0].1111, -const[3].xxxx; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: MAD temp[1].xyz, temp[2].xyzz, const[3].xxxx, temp[0].xyzz; 12: ELSE; 13: MUL temp[1].xyz, temp[1].xyzz, temp[2].xyzz; 14: ENDIF; 15: MOV_SAT output[0], temp[1]; Fragment Program: after 'transform IF' # Radeon Compiler Program 0: MOV temp[0].yz, input[1].yxyy; 1: MOV temp[0].x, input[0].wwww; 2: MOV temp[1].w, const[4].xxxx; 3: MOV temp[1].xyz, temp[0].xyzx; 4: MUL temp[2].x, const[1].xxxx, input[0].xxxx; 5: MOV temp[2].yz, input[0].zyzz; 6: TEX temp[2].xyz, temp[2].xyzz, CUBE[0]; 7: SUB none., const[0].xxxx, temp[0].1111; [aluresult = (x == 0)] 8: IF aluresult.x___; 9: ADD temp[3].x, temp[0].1111, -const[3].xxxx; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: MAD temp[1].xyz, temp[2].xyzz, const[3].xxxx, temp[0].xyzz; 12: ELSE; 13: MUL temp[1].xyz, temp[1].xyzz, temp[2].xyzz; 14: ENDIF; 15: MOV_SAT output[0], temp[1]; Fragment Program: after 'native rewrite' # Radeon Compiler Program 0: MOV temp[0].yz, input[1].yxyy; 1: MOV temp[0].x, input[0].wwww; 2: MOV temp[1].w, const[4].xxxx; 3: MOV temp[1].xyz, temp[0].xyzx; 4: MUL temp[2].x, const[1].xxxx, input[0].xxxx; 5: MOV temp[2].yz, input[0].zyzz; 6: TEX temp[2].xyz, temp[2].xyzz, CUBE[0]; 7: ADD none., const[0].xxxx, -temp[0].1111; [aluresult = (x == 0)] 8: IF aluresult.x___; 9: ADD temp[3].x, temp[0].1111, -const[3].xxxx; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: MAD temp[1].xyz, temp[2].xyzz, const[3].xxxx, temp[0].xyzz; 12: ELSE; 13: MUL temp[1].xyz, temp[1].xyzz, temp[2].xyzz; 14: ENDIF; 15: MOV_SAT output[0], temp[1]; Fragment Program: after 'deadcode' # Radeon Compiler Program 0: MOV temp[0].yz, input[1]._xy_; 1: MOV temp[0].x, input[0].w___; 2: MOV temp[1].w, const[4].___x; 3: MOV temp[1].xyz, temp[0].xyz_; 4: MUL temp[2].x, const[1].x___, input[0].x___; 5: MOV temp[2].yz, input[0]._yz_; 6: TEX temp[2].xyz, temp[2].xyz_, CUBE[0]; 7: ADD none., const[0].x___, -temp[0].1___; [aluresult = (x == 0)] 8: IF aluresult.x___; 9: ADD temp[3].x, temp[0].1___, -const[3].x___; 10: MUL temp[0].xyz, temp[0].xyz_, temp[3].xxx_; 11: MAD temp[1].xyz, temp[2].xyz_, const[3].xxx_, temp[0].xyz_; 12: ELSE; 13: MUL temp[1].xyz, temp[1].xyz_, temp[2].xyz_; 14: ENDIF; 15: MOV_SAT output[0], temp[1]; Fragment Program: after 'register rename' # Radeon Compiler Program 0: MOV temp[4].yz, input[1]._xy_; 1: MOV temp[4].x, input[0].w___; 2: MOV temp[5].w, const[4].___x; 3: MOV temp[6].xyz, temp[4].xyz_; 4: MUL temp[7].x, const[1].x___, input[0].x___; 5: MOV temp[7].yz, input[0]._yz_; 6: TEX temp[8].xyz, temp[7].xyz_, CUBE[0]; 7: ADD none., const[0].x___, -temp[0].1___; [aluresult = (x == 0)] 8: IF aluresult.x___; 9: ADD temp[9].x, temp[0].1___, -const[3].x___; 10: MUL temp[10].xyz, temp[4].xyz_, temp[9].xxx_; 11: MAD temp[5].xyz, temp[8].xyz_, const[3].xxx_, temp[10].xyz_; 12: ELSE; 13: MUL temp[5].xyz, temp[6].xyz_, temp[8].xyz_; 14: ENDIF; 15: MOV_SAT output[0], temp[5]; Fragment Program: after 'dataflow optimize' # Radeon Compiler Program 0: MOV temp[4].yz, input[1]._xy_; 1: MOV temp[4].x, input[0].w___; 2: MOV temp[5].w, const[4].___x; 3: MUL temp[7].x, const[1].x___, input[0].x___; 4: MOV temp[7].yz, input[0]._yz_; 5: TEX temp[8].xyz, temp[7].xyz_, CUBE[0]; 6: ADD none., const[0].x___, -none.1___; [aluresult = (x == 0)] 7: IF aluresult.x___; 8: MUL temp[10].xyz, temp[4].xyz_, (1 - const[3]).xxx_; 9: MAD temp[5].xyz, temp[8].xyz_, const[3].xxx_, temp[10].xyz_; 10: ELSE; 11: MUL temp[5].xyz, temp[4].xyz_, temp[8].xyz_; 12: ENDIF; 13: MOV_SAT output[0], temp[5]; Fragment Program: after 'dataflow swizzles' # Radeon Compiler Program 0: MOV temp[4].yz, input[1]._xy_; 1: MOV temp[4].x, input[0].w___; 2: MOV temp[5].w, const[4].___x; 3: MUL temp[7].x, const[1].x___, input[0].x___; 4: MOV temp[7].yz, input[0]._yz_; 5: TEX temp[8].xyz, temp[7].xyz_, CUBE[0]; 6: ADD none., const[0].x___, -none.1___; [aluresult = (x == 0)] 7: IF aluresult.x___; 8: MUL temp[10].xyz, temp[4].xyz_, (1 - const[3]).xxx_; 9: MAD temp[5].xyz, temp[8].xyz_, const[3].xxx_, temp[10].xyz_; 10: ELSE; 11: MUL temp[5].xyz, temp[4].xyz_, temp[8].xyz_; 12: ENDIF; 13: MOV_SAT output[0], temp[5]; Fragment Program: after 'dead constants' # Radeon Compiler Program 0: MOV temp[4].yz, input[1]._xy_; 1: MOV temp[4].x, input[0].w___; 2: MOV temp[5].w, const[4].___x; 3: MUL temp[7].x, const[1].x___, input[0].x___; 4: MOV temp[7].yz, input[0]._yz_; 5: TEX temp[8].xyz, temp[7].xyz_, CUBE[0]; 6: ADD none., const[0].x___, -none.1___; [aluresult = (x == 0)] 7: IF aluresult.x___; 8: MUL temp[10].xyz, temp[4].xyz_, (1 - const[3]).xxx_; 9: MAD temp[5].xyz, temp[8].xyz_, const[3].xxx_, temp[10].xyz_; 10: ELSE; 11: MUL temp[5].xyz, temp[4].xyz_, temp[8].xyz_; 12: ENDIF; 13: MOV_SAT output[0], temp[5]; Fragment Program: after 'pair translate' # Radeon Compiler Program 0: src0.xyz = input[1] MAD temp[4].yz, src0._xy, src0.111, src0.000 1: src0.w = input[0] MAD temp[4].x, src0.w__, src0.111, src0.000 2: src0.xyz = const[4] MAD temp[5].w, src0.x, src0.1, src0.0 3: src0.xyz = const[1], src1.xyz = input[0] MAD temp[7].x, src0.x__, src1.x__, src0.000 4: src0.xyz = input[0] MAD temp[7].yz, src0._yz, src0.111, src0.000 5: TEX temp[8].xyz, temp[7].xyz_, CUBE[0]; 6: src0.xyz = const[0] MAD aluresult, src0.x__, src0.111, -src0.1__ [aluresult = (result == 0)] 7: IF aluresult.x___; 8: src0.xyz = const[3], src1.xyz = temp[4], srcp.xyz = (1 - src0) MAD temp[10].xyz, src1.xyz, srcp.xxx, src0.000 9: src0.xyz = temp[8], src1.xyz = const[3], src2.xyz = temp[10] MAD temp[5].xyz, src0.xyz, src1.xxx, src2.xyz 10: ELSE; 11: src0.xyz = temp[4], src1.xyz = temp[8] MAD temp[5].xyz, src0.xyz, src1.xyz, src0.000 12: ENDIF; 13: src0.xyz = temp[5], src0.w = temp[5] MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000 MAD_SAT color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'pair scheduling' # Radeon Compiler Program 0: src0.xyz = input[1], src1.xyz = const[4] MAD temp[4].yz, src0._xy, src0.111, src0.000 MAD temp[5].w, src1.x, src0.1, src0.0 1: src0.w = input[0] MAD temp[4].x, src0.w__, src0.111, src0.000 2: src0.xyz = const[1], src1.xyz = input[0] MAD temp[7].x, src0.x__, src1.x__, src0.000 3: src0.xyz = input[0] MAD temp[7].yz, src0._yz, src0.111, src0.000 4: BEGIN_TEX; 5: TEX temp[8].xyz, temp[7].xyz_, CUBE[0] SEM_WAIT SEM_ACQUIRE; 6: src0.xyz = const[0] MAD aluresult, src0.x__, src0.111, -src0.1__ [aluresult = (result == 0)] 7: IF aluresult.x___; 8: src0.xyz = const[3], src1.xyz = temp[4], srcp.xyz = (1 - src0) SEM_WAIT MAD temp[10].xyz, src1.xyz, srcp.xxx, src0.000 9: src0.xyz = temp[8], src1.xyz = const[3], src2.xyz = temp[10] SEM_WAIT MAD temp[5].xyz, src0.xyz, src1.xxx, src2.xyz 10: ELSE; 11: src0.xyz = temp[4], src1.xyz = temp[8] SEM_WAIT MAD temp[5].xyz, src0.xyz, src1.xyz, src0.000 12: ENDIF; 13: src0.xyz = temp[5], src0.w = temp[5] SEM_WAIT MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000 MAD_SAT color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'dead sources' # Radeon Compiler Program 0: src0.xyz = input[1], src1.xyz = const[4] MAD temp[4].yz, src0._xy, src0.111, src0.000 MAD temp[5].w, src1.x, src0.1, src0.0 1: src0.w = input[0] MAD temp[4].x, src0.w__, src0.111, src0.000 2: src0.xyz = const[1], src1.xyz = input[0] MAD temp[7].x, src0.x__, src1.x__, src0.000 3: src0.xyz = input[0] MAD temp[7].yz, src0._yz, src0.111, src0.000 4: BEGIN_TEX; 5: TEX temp[8].xyz, temp[7].xyz_, CUBE[0] SEM_WAIT SEM_ACQUIRE; 6: src0.xyz = const[0] MAD aluresult, src0.x__, src0.111, -src0.1__ [aluresult = (result == 0)] 7: IF aluresult.x___; 8: src0.xyz = const[3], src1.xyz = temp[4], srcp.xyz = (1 - src0) SEM_WAIT MAD temp[10].xyz, src1.xyz, srcp.xxx, src0.000 9: src0.xyz = temp[8], src1.xyz = const[3], src2.xyz = temp[10] SEM_WAIT MAD temp[5].xyz, src0.xyz, src1.xxx, src2.xyz 10: ELSE; 11: src0.xyz = temp[4], src1.xyz = temp[8] SEM_WAIT MAD temp[5].xyz, src0.xyz, src1.xyz, src0.000 12: ENDIF; 13: src0.xyz = temp[5], src0.w = temp[5] SEM_WAIT MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000 MAD_SAT color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'register allocation' # Radeon Compiler Program 0: src0.xyz = input[1], src1.xyz = const[4] MAD temp[1].yz, src0._xy, src0.111, src0.000 MAD temp[1].w, src1.x, src0.1, src0.0 1: src0.w = input[0] MAD temp[1].x, src0.w__, src0.111, src0.000 2: src0.xyz = const[1], src1.xyz = input[0] MAD temp[2].x, src0.x__, src1.x__, src0.000 3: src0.xyz = input[0] MAD temp[2].yz, src0._yz, src0.111, src0.000 4: BEGIN_TEX; 5: TEX temp[0].xyz, temp[2].xyz_, CUBE[0] SEM_WAIT SEM_ACQUIRE; 6: src0.xyz = const[0] MAD aluresult, src0.x__, src0.111, -src0.1__ [aluresult = (result == 0)] 7: IF aluresult.x___; 8: src0.xyz = const[3], src1.xyz = temp[1], srcp.xyz = (1 - src0) SEM_WAIT MAD temp[2].xyz, src1.xyz, srcp.xxx, src0.000 9: src0.xyz = temp[0], src1.xyz = const[3], src2.xyz = temp[2] SEM_WAIT MAD temp[2].xyz, src0.xyz, src1.xxx, src2.xyz 10: ELSE; 11: src0.xyz = temp[1], src1.xyz = temp[0] SEM_WAIT MAD temp[2].xyz, src0.xyz, src1.xyz, src0.000 12: ENDIF; 13: src0.xyz = temp[2], src0.w = temp[1] SEM_WAIT MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000 MAD_SAT color[0].w, src0.w, src0.1, src0.0 R500 Fragment Program: -------- 0 0:CMN_INST 0x00007000:ALU wmask: AGB omask: NONE 1:RGB_ADDR 0x08041001:Addr0: 1t, Addr1: 4c, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0110:rgb_A_src:0 0/R/G 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c01010:MAD dest:1 alp_A_src:1 R 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490010:MAD dest:1 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 1 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db048c:rgb_A_src:0 A/0/0 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490010:MAD dest:1 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 2 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08000101:Addr0: 1c, Addr1: 0t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00902480:rgb_A_src:0 R/0/0 0 rgb_B_src:1 R/0/0 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490020:MAD dest:2 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 3 0:CMN_INST 0x00003000:ALU wmask: GB omask: NONE 1:RGB_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0230:rgb_A_src:0 0/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490020:MAD dest:2 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 4 0:CMN_INST 0x00003807:TEX TEX_WAIT wmask: RGB omask: NONE 1:TEX_INST: 0x02400000: id: 0 op:LD, ACQ, SCALED 2:TEX_ADDR: 0xe400e402: src: 2 R/G/B/A dst: 0 R/G/B/A 3:TEX_DXDY: 0x00000000 5 0:CMN_INST 0x00000000:ALU wmask: NONE omask: NONE 1:RGB_ADDR 0x08020100:Addr0: 0c, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x80db0480:rgb_A_src:0 R/0/0 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00c98030:MAD dest:3 rgb_C_src:0 1/0/0 1 alp_C_src:0 R 0 6 0:CMN_INST 0x00000402:FC ALU WAIT wmask: NONE omask: NONE 2:FC_INST 0x1a000f00:0x0f 0 JUMP NONE INCR INCR 0 0 10 IGN_UNC 3:FC_ADDR 0x000a0000:BOOL: 0x00, INT: 0x00, JUMP_ADDR: 10, JMP_GLBL: 0 7 0:CMN_INST 0x00003804:ALU TEX_WAIT wmask: RGB omask: NONE 1:RGB_ADDR 0xc8000503:Addr0: 3c, Addr1: 1t, Addr2: 128t, srcp:3 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00006221:rgb_A_src:1 R/G/B 0 rgb_B_src:3 R/R/R 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490020:MAD dest:2 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 8 0:CMN_INST 0x00003804:ALU TEX_WAIT wmask: RGB omask: NONE 1:RGB_ADDR 0x00240c00:Addr0: 0t, Addr1: 3c, Addr2: 2t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00002220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/R/R 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00222020:MAD dest:2 rgb_C_src:2 R/G/B 0 alp_C_src:0 R 0 9 0:CMN_INST 0x00000402:FC ALU WAIT wmask: NONE omask: NONE 2:FC_INST 0x04010010:0x00 0 JUMP NONE NONE DECR 1 1 12 3:FC_ADDR 0x000c0000:BOOL: 0x00, INT: 0x00, JUMP_ADDR: 12, JMP_GLBL: 0 10 0:CMN_INST 0x00003804:ALU TEX_WAIT wmask: RGB omask: NONE 1:RGB_ADDR 0x08000001:Addr0: 1t, Addr1: 0t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00442220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/G/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490020:MAD dest:2 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 11 0:CMN_INST 0x00000402:FC ALU WAIT wmask: NONE omask: NONE 2:FC_INST 0x01010020:0x00 1 JUMP NONE DECR NONE 1 0 12 3:FC_ADDR 0x000c0000:BOOL: 0x00, INT: 0x00, JUMP_ADDR: 12, JMP_GLBL: 0 12 0:CMN_INST 0x001f8005:OUT TEX_WAIT wmask: NONE omask: ARGB 1:RGB_ADDR 0x08020002:Addr0: 2t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020001:Addr0: 1t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 r300: Initial fragment program FRAG PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1 DCL IN[0], GENERIC[12], PERSPECTIVE DCL IN[1], GENERIC[13], PERSPECTIVE DCL IN[2], GENERIC[14], PERSPECTIVE DCL IN[3], GENERIC[15], PERSPECTIVE DCL OUT[0], COLOR DCL SAMP[0] DCL CONST[0..5] DCL CONST[7..16] DCL TEMP[0], LOCAL DCL TEMP[1], LOCAL DCL TEMP[2], LOCAL DCL TEMP[3], LOCAL DCL TEMP[4], LOCAL DCL TEMP[5], LOCAL DCL TEMP[6], LOCAL DCL TEMP[7], LOCAL DCL TEMP[8], LOCAL IMM[0] FLT32 { 1,0000, 0,0000, 0,0000, 0,0000} 0: MOV TEMP[0].z, IN[3].xxxx 1: MOV TEMP[0].xy, IN[2].zwzz 2: MOV TEMP[1].yz, IN[2].yxyy 3: MOV TEMP[1].x, IN[1].wwww 4: MOV TEMP[2].w, CONST[11].xxxx 5: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[1].xyzz 6: RSQ TEMP[3].x, TEMP[3].xxxx 7: MUL TEMP[1].xyz, TEMP[1].xyzz, TEMP[3].xxxx 8: DP3 TEMP[3].x, TEMP[0].xyzz, TEMP[0].xyzz 9: RSQ TEMP[3].x, TEMP[3].xxxx 10: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[3].xxxx 11: DP3 TEMP[3].x, IN[0].xyzz, IN[0].xyzz 12: RSQ TEMP[3].x, TEMP[3].xxxx 13: MUL TEMP[3].xyz, IN[0].xyzz, TEMP[3].xxxx 14: DP3 TEMP[4].x, TEMP[1].xyzz, TEMP[3].xyzz 15: MAX TEMP[4].x, TEMP[4].xxxx, IMM[0].yyyy 16: ADD TEMP[3].xyz, TEMP[3].xyzz, TEMP[0].xyzz 17: MUL TEMP[5], CONST[13], CONST[1].xxxx 18: MAD TEMP[5], CONST[14], CONST[1].yyyy, TEMP[5] 19: MAD TEMP[5].xyz, CONST[15], CONST[1].zzzz, TEMP[5] 20: DP3 TEMP[6].x, TEMP[5].xyzz, TEMP[5].xyzz 21: RSQ TEMP[6].x, TEMP[6].xxxx 22: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[6].xxxx 23: DP3 TEMP[6].x, TEMP[1].xyzz, TEMP[5].xyzz 24: MAX TEMP[6].x, TEMP[6].xxxx, IMM[0].yyyy 25: ADD TEMP[0].xyz, TEMP[5].xyzz, TEMP[0].xyzz 26: MUL TEMP[5].xyz, CONST[12].xyzz, CONST[0].xyzz 27: MUL TEMP[5].xyz, TEMP[5].xyzz, TEMP[4].xxxx 28: MUL TEMP[7].xyz, CONST[12].xyzz, CONST[2].xyzz 29: MUL TEMP[7].xyz, TEMP[7].xyzz, TEMP[6].xxxx 30: MAD TEMP[5].xyz, TEMP[5].xyzz, IN[0].wwww, TEMP[7].xyzz 31: MAD TEMP[5].xyz, CONST[3].xyzz, CONST[10].xyzz, TEMP[5].xyzz 32: MUL TEMP[7].xyz, CONST[9].xyzz, CONST[0].xyzz 33: DP3 TEMP[8].x, TEMP[3].xyzz, TEMP[3].xyzz 34: RSQ TEMP[8].x, TEMP[8].xxxx 35: MUL TEMP[3].xyz, TEMP[3].xyzz, TEMP[8].xxxx 36: DP3 TEMP[3].x, TEMP[1].xyzz, TEMP[3].xyzz 37: MAX TEMP[3].x, TEMP[3].xxxx, IMM[0].yyyy 38: POW TEMP[3].x, TEMP[3].xxxx, CONST[8].xxxx 39: MAX TEMP[3].x, TEMP[3].xxxx, IMM[0].yyyy 40: MUL TEMP[3].xyz, TEMP[7].xyzz, TEMP[3].xxxx 41: MUL TEMP[3].xyz, TEMP[3].xyzz, TEMP[4].xxxx 42: MUL TEMP[4].xyz, CONST[9].xyzz, CONST[2].xyzz 43: DP3 TEMP[7].x, TEMP[0].xyzz, TEMP[0].xyzz 44: RSQ TEMP[7].x, TEMP[7].xxxx 45: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[7].xxxx 46: DP3 TEMP[0].x, TEMP[1].xyzz, TEMP[0].xyzz 47: MAX TEMP[0].x, TEMP[0].xxxx, IMM[0].yyyy 48: POW TEMP[0].x, TEMP[0].xxxx, CONST[8].xxxx 49: MAX TEMP[0].x, TEMP[0].xxxx, IMM[0].yyyy 50: MUL TEMP[0].xyz, TEMP[4].xyzz, TEMP[0].xxxx 51: MUL TEMP[0].xyz, TEMP[0].xyzz, TEMP[6].xxxx 52: MAD TEMP[0].xyz, TEMP[3].xyzz, IN[0].wwww, TEMP[0].xyzz 53: ADD TEMP[2].xyz, TEMP[5].xyzz, TEMP[0].xyzz 54: MUL TEMP[0].x, CONST[5].xxxx, IN[1].xxxx 55: MOV TEMP[0].yz, IN[1].zyzz 56: TEX TEMP[0].xyz, TEMP[0].xyzz, SAMP[0], CUBE 57: SEQ TEMP[1].x, CONST[4].xxxx, IMM[0].xxxx 58: IF TEMP[1].xxxx :0 59: ADD TEMP[1].x, IMM[0].xxxx, -CONST[7].xxxx 60: MUL TEMP[1].xyz, TEMP[2].xyzz, TEMP[1].xxxx 61: MAD TEMP[2].xyz, TEMP[0].xyzz, CONST[7].xxxx, TEMP[1].xyzz 62: ELSE :0 63: MUL TEMP[2].xyz, TEMP[2].xyzz, TEMP[0].xyzz 64: ENDIF 65: MOV_SAT OUT[0], TEMP[2] 66: END Fragment Program: before compilation # Radeon Compiler Program 0: MOV temp[0].z, input[3].xxxx; 1: MOV temp[0].xy, input[2].zwzz; 2: MOV temp[1].yz, input[2].yxyy; 3: MOV temp[1].x, input[1].wwww; 4: MOV temp[2].w, const[11].xxxx; 5: DP3 temp[3].x, temp[1].xyzz, temp[1].xyzz; 6: RSQ temp[3].x, temp[3].xxxx; 7: MUL temp[1].xyz, temp[1].xyzz, temp[3].xxxx; 8: DP3 temp[3].x, temp[0].xyzz, temp[0].xyzz; 9: RSQ temp[3].x, temp[3].xxxx; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: DP3 temp[3].x, input[0].xyzz, input[0].xyzz; 12: RSQ temp[3].x, temp[3].xxxx; 13: MUL temp[3].xyz, input[0].xyzz, temp[3].xxxx; 14: DP3 temp[4].x, temp[1].xyzz, temp[3].xyzz; 15: MAX temp[4].x, temp[4].xxxx, temp[0].0000; 16: ADD temp[3].xyz, temp[3].xyzz, temp[0].xyzz; 17: MUL temp[5], const[13], const[1].xxxx; 18: MAD temp[5], const[14], const[1].yyyy, temp[5]; 19: MAD temp[5].xyz, const[15], const[1].zzzz, temp[5]; 20: DP3 temp[6].x, temp[5].xyzz, temp[5].xyzz; 21: RSQ temp[6].x, temp[6].xxxx; 22: MUL temp[5].xyz, temp[5].xyzz, temp[6].xxxx; 23: DP3 temp[6].x, temp[1].xyzz, temp[5].xyzz; 24: MAX temp[6].x, temp[6].xxxx, temp[0].0000; 25: ADD temp[0].xyz, temp[5].xyzz, temp[0].xyzz; 26: MUL temp[5].xyz, const[12].xyzz, const[0].xyzz; 27: MUL temp[5].xyz, temp[5].xyzz, temp[4].xxxx; 28: MUL temp[7].xyz, const[12].xyzz, const[2].xyzz; 29: MUL temp[7].xyz, temp[7].xyzz, temp[6].xxxx; 30: MAD temp[5].xyz, temp[5].xyzz, input[0].wwww, temp[7].xyzz; 31: MAD temp[5].xyz, const[3].xyzz, const[10].xyzz, temp[5].xyzz; 32: MUL temp[7].xyz, const[9].xyzz, const[0].xyzz; 33: DP3 temp[8].x, temp[3].xyzz, temp[3].xyzz; 34: RSQ temp[8].x, temp[8].xxxx; 35: MUL temp[3].xyz, temp[3].xyzz, temp[8].xxxx; 36: DP3 temp[3].x, temp[1].xyzz, temp[3].xyzz; 37: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 38: POW temp[3].x, temp[3].xxxx, const[8].xxxx; 39: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 40: MUL temp[3].xyz, temp[7].xyzz, temp[3].xxxx; 41: MUL temp[3].xyz, temp[3].xyzz, temp[4].xxxx; 42: MUL temp[4].xyz, const[9].xyzz, const[2].xyzz; 43: DP3 temp[7].x, temp[0].xyzz, temp[0].xyzz; 44: RSQ temp[7].x, temp[7].xxxx; 45: MUL temp[0].xyz, temp[0].xyzz, temp[7].xxxx; 46: DP3 temp[0].x, temp[1].xyzz, temp[0].xyzz; 47: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 48: POW temp[0].x, temp[0].xxxx, const[8].xxxx; 49: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 50: MUL temp[0].xyz, temp[4].xyzz, temp[0].xxxx; 51: MUL temp[0].xyz, temp[0].xyzz, temp[6].xxxx; 52: MAD temp[0].xyz, temp[3].xyzz, input[0].wwww, temp[0].xyzz; 53: ADD temp[2].xyz, temp[5].xyzz, temp[0].xyzz; 54: MUL temp[0].x, const[5].xxxx, input[1].xxxx; 55: MOV temp[0].yz, input[1].zyzz; 56: TEX temp[0].xyz, temp[0].xyzz, CUBE[0]; 57: SEQ temp[1].x, const[4].xxxx, temp[0].1111; 58: IF temp[1].xxxx; 59: ADD temp[1].x, temp[0].1111, -const[7].xxxx; 60: MUL temp[1].xyz, temp[2].xyzz, temp[1].xxxx; 61: MAD temp[2].xyz, temp[0].xyzz, const[7].xxxx, temp[1].xyzz; 62: ELSE; 63: MUL temp[2].xyz, temp[2].xyzz, temp[0].xyzz; 64: ENDIF; 65: MOV_SAT output[0], temp[2]; Fragment Program: after 'rewrite depth out' # Radeon Compiler Program 0: MOV temp[0].z, input[3].xxxx; 1: MOV temp[0].xy, input[2].zwzz; 2: MOV temp[1].yz, input[2].yxyy; 3: MOV temp[1].x, input[1].wwww; 4: MOV temp[2].w, const[11].xxxx; 5: DP3 temp[3].x, temp[1].xyzz, temp[1].xyzz; 6: RSQ temp[3].x, temp[3].xxxx; 7: MUL temp[1].xyz, temp[1].xyzz, temp[3].xxxx; 8: DP3 temp[3].x, temp[0].xyzz, temp[0].xyzz; 9: RSQ temp[3].x, temp[3].xxxx; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: DP3 temp[3].x, input[0].xyzz, input[0].xyzz; 12: RSQ temp[3].x, temp[3].xxxx; 13: MUL temp[3].xyz, input[0].xyzz, temp[3].xxxx; 14: DP3 temp[4].x, temp[1].xyzz, temp[3].xyzz; 15: MAX temp[4].x, temp[4].xxxx, temp[0].0000; 16: ADD temp[3].xyz, temp[3].xyzz, temp[0].xyzz; 17: MUL temp[5], const[13], const[1].xxxx; 18: MAD temp[5], const[14], const[1].yyyy, temp[5]; 19: MAD temp[5].xyz, const[15], const[1].zzzz, temp[5]; 20: DP3 temp[6].x, temp[5].xyzz, temp[5].xyzz; 21: RSQ temp[6].x, temp[6].xxxx; 22: MUL temp[5].xyz, temp[5].xyzz, temp[6].xxxx; 23: DP3 temp[6].x, temp[1].xyzz, temp[5].xyzz; 24: MAX temp[6].x, temp[6].xxxx, temp[0].0000; 25: ADD temp[0].xyz, temp[5].xyzz, temp[0].xyzz; 26: MUL temp[5].xyz, const[12].xyzz, const[0].xyzz; 27: MUL temp[5].xyz, temp[5].xyzz, temp[4].xxxx; 28: MUL temp[7].xyz, const[12].xyzz, const[2].xyzz; 29: MUL temp[7].xyz, temp[7].xyzz, temp[6].xxxx; 30: MAD temp[5].xyz, temp[5].xyzz, input[0].wwww, temp[7].xyzz; 31: MAD temp[5].xyz, const[3].xyzz, const[10].xyzz, temp[5].xyzz; 32: MUL temp[7].xyz, const[9].xyzz, const[0].xyzz; 33: DP3 temp[8].x, temp[3].xyzz, temp[3].xyzz; 34: RSQ temp[8].x, temp[8].xxxx; 35: MUL temp[3].xyz, temp[3].xyzz, temp[8].xxxx; 36: DP3 temp[3].x, temp[1].xyzz, temp[3].xyzz; 37: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 38: POW temp[3].x, temp[3].xxxx, const[8].xxxx; 39: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 40: MUL temp[3].xyz, temp[7].xyzz, temp[3].xxxx; 41: MUL temp[3].xyz, temp[3].xyzz, temp[4].xxxx; 42: MUL temp[4].xyz, const[9].xyzz, const[2].xyzz; 43: DP3 temp[7].x, temp[0].xyzz, temp[0].xyzz; 44: RSQ temp[7].x, temp[7].xxxx; 45: MUL temp[0].xyz, temp[0].xyzz, temp[7].xxxx; 46: DP3 temp[0].x, temp[1].xyzz, temp[0].xyzz; 47: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 48: POW temp[0].x, temp[0].xxxx, const[8].xxxx; 49: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 50: MUL temp[0].xyz, temp[4].xyzz, temp[0].xxxx; 51: MUL temp[0].xyz, temp[0].xyzz, temp[6].xxxx; 52: MAD temp[0].xyz, temp[3].xyzz, input[0].wwww, temp[0].xyzz; 53: ADD temp[2].xyz, temp[5].xyzz, temp[0].xyzz; 54: MUL temp[0].x, const[5].xxxx, input[1].xxxx; 55: MOV temp[0].yz, input[1].zyzz; 56: TEX temp[0].xyz, temp[0].xyzz, CUBE[0]; 57: SEQ temp[1].x, const[4].xxxx, temp[0].1111; 58: IF temp[1].xxxx; 59: ADD temp[1].x, temp[0].1111, -const[7].xxxx; 60: MUL temp[1].xyz, temp[2].xyzz, temp[1].xxxx; 61: MAD temp[2].xyz, temp[0].xyzz, const[7].xxxx, temp[1].xyzz; 62: ELSE; 63: MUL temp[2].xyz, temp[2].xyzz, temp[0].xyzz; 64: ENDIF; 65: MOV_SAT output[0], temp[2]; Fragment Program: after 'transform KILP' # Radeon Compiler Program 0: MOV temp[0].z, input[3].xxxx; 1: MOV temp[0].xy, input[2].zwzz; 2: MOV temp[1].yz, input[2].yxyy; 3: MOV temp[1].x, input[1].wwww; 4: MOV temp[2].w, const[11].xxxx; 5: DP3 temp[3].x, temp[1].xyzz, temp[1].xyzz; 6: RSQ temp[3].x, temp[3].xxxx; 7: MUL temp[1].xyz, temp[1].xyzz, temp[3].xxxx; 8: DP3 temp[3].x, temp[0].xyzz, temp[0].xyzz; 9: RSQ temp[3].x, temp[3].xxxx; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: DP3 temp[3].x, input[0].xyzz, input[0].xyzz; 12: RSQ temp[3].x, temp[3].xxxx; 13: MUL temp[3].xyz, input[0].xyzz, temp[3].xxxx; 14: DP3 temp[4].x, temp[1].xyzz, temp[3].xyzz; 15: MAX temp[4].x, temp[4].xxxx, temp[0].0000; 16: ADD temp[3].xyz, temp[3].xyzz, temp[0].xyzz; 17: MUL temp[5], const[13], const[1].xxxx; 18: MAD temp[5], const[14], const[1].yyyy, temp[5]; 19: MAD temp[5].xyz, const[15], const[1].zzzz, temp[5]; 20: DP3 temp[6].x, temp[5].xyzz, temp[5].xyzz; 21: RSQ temp[6].x, temp[6].xxxx; 22: MUL temp[5].xyz, temp[5].xyzz, temp[6].xxxx; 23: DP3 temp[6].x, temp[1].xyzz, temp[5].xyzz; 24: MAX temp[6].x, temp[6].xxxx, temp[0].0000; 25: ADD temp[0].xyz, temp[5].xyzz, temp[0].xyzz; 26: MUL temp[5].xyz, const[12].xyzz, const[0].xyzz; 27: MUL temp[5].xyz, temp[5].xyzz, temp[4].xxxx; 28: MUL temp[7].xyz, const[12].xyzz, const[2].xyzz; 29: MUL temp[7].xyz, temp[7].xyzz, temp[6].xxxx; 30: MAD temp[5].xyz, temp[5].xyzz, input[0].wwww, temp[7].xyzz; 31: MAD temp[5].xyz, const[3].xyzz, const[10].xyzz, temp[5].xyzz; 32: MUL temp[7].xyz, const[9].xyzz, const[0].xyzz; 33: DP3 temp[8].x, temp[3].xyzz, temp[3].xyzz; 34: RSQ temp[8].x, temp[8].xxxx; 35: MUL temp[3].xyz, temp[3].xyzz, temp[8].xxxx; 36: DP3 temp[3].x, temp[1].xyzz, temp[3].xyzz; 37: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 38: POW temp[3].x, temp[3].xxxx, const[8].xxxx; 39: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 40: MUL temp[3].xyz, temp[7].xyzz, temp[3].xxxx; 41: MUL temp[3].xyz, temp[3].xyzz, temp[4].xxxx; 42: MUL temp[4].xyz, const[9].xyzz, const[2].xyzz; 43: DP3 temp[7].x, temp[0].xyzz, temp[0].xyzz; 44: RSQ temp[7].x, temp[7].xxxx; 45: MUL temp[0].xyz, temp[0].xyzz, temp[7].xxxx; 46: DP3 temp[0].x, temp[1].xyzz, temp[0].xyzz; 47: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 48: POW temp[0].x, temp[0].xxxx, const[8].xxxx; 49: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 50: MUL temp[0].xyz, temp[4].xyzz, temp[0].xxxx; 51: MUL temp[0].xyz, temp[0].xyzz, temp[6].xxxx; 52: MAD temp[0].xyz, temp[3].xyzz, input[0].wwww, temp[0].xyzz; 53: ADD temp[2].xyz, temp[5].xyzz, temp[0].xyzz; 54: MUL temp[0].x, const[5].xxxx, input[1].xxxx; 55: MOV temp[0].yz, input[1].zyzz; 56: TEX temp[0].xyz, temp[0].xyzz, CUBE[0]; 57: SEQ temp[1].x, const[4].xxxx, temp[0].1111; 58: IF temp[1].xxxx; 59: ADD temp[1].x, temp[0].1111, -const[7].xxxx; 60: MUL temp[1].xyz, temp[2].xyzz, temp[1].xxxx; 61: MAD temp[2].xyz, temp[0].xyzz, const[7].xxxx, temp[1].xyzz; 62: ELSE; 63: MUL temp[2].xyz, temp[2].xyzz, temp[0].xyzz; 64: ENDIF; 65: MOV_SAT output[0], temp[2]; Fragment Program: after 'unroll loops' # Radeon Compiler Program 0: MOV temp[0].z, input[3].xxxx; 1: MOV temp[0].xy, input[2].zwzz; 2: MOV temp[1].yz, input[2].yxyy; 3: MOV temp[1].x, input[1].wwww; 4: MOV temp[2].w, const[11].xxxx; 5: DP3 temp[3].x, temp[1].xyzz, temp[1].xyzz; 6: RSQ temp[3].x, temp[3].xxxx; 7: MUL temp[1].xyz, temp[1].xyzz, temp[3].xxxx; 8: DP3 temp[3].x, temp[0].xyzz, temp[0].xyzz; 9: RSQ temp[3].x, temp[3].xxxx; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: DP3 temp[3].x, input[0].xyzz, input[0].xyzz; 12: RSQ temp[3].x, temp[3].xxxx; 13: MUL temp[3].xyz, input[0].xyzz, temp[3].xxxx; 14: DP3 temp[4].x, temp[1].xyzz, temp[3].xyzz; 15: MAX temp[4].x, temp[4].xxxx, temp[0].0000; 16: ADD temp[3].xyz, temp[3].xyzz, temp[0].xyzz; 17: MUL temp[5], const[13], const[1].xxxx; 18: MAD temp[5], const[14], const[1].yyyy, temp[5]; 19: MAD temp[5].xyz, const[15], const[1].zzzz, temp[5]; 20: DP3 temp[6].x, temp[5].xyzz, temp[5].xyzz; 21: RSQ temp[6].x, temp[6].xxxx; 22: MUL temp[5].xyz, temp[5].xyzz, temp[6].xxxx; 23: DP3 temp[6].x, temp[1].xyzz, temp[5].xyzz; 24: MAX temp[6].x, temp[6].xxxx, temp[0].0000; 25: ADD temp[0].xyz, temp[5].xyzz, temp[0].xyzz; 26: MUL temp[5].xyz, const[12].xyzz, const[0].xyzz; 27: MUL temp[5].xyz, temp[5].xyzz, temp[4].xxxx; 28: MUL temp[7].xyz, const[12].xyzz, const[2].xyzz; 29: MUL temp[7].xyz, temp[7].xyzz, temp[6].xxxx; 30: MAD temp[5].xyz, temp[5].xyzz, input[0].wwww, temp[7].xyzz; 31: MAD temp[5].xyz, const[3].xyzz, const[10].xyzz, temp[5].xyzz; 32: MUL temp[7].xyz, const[9].xyzz, const[0].xyzz; 33: DP3 temp[8].x, temp[3].xyzz, temp[3].xyzz; 34: RSQ temp[8].x, temp[8].xxxx; 35: MUL temp[3].xyz, temp[3].xyzz, temp[8].xxxx; 36: DP3 temp[3].x, temp[1].xyzz, temp[3].xyzz; 37: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 38: POW temp[3].x, temp[3].xxxx, const[8].xxxx; 39: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 40: MUL temp[3].xyz, temp[7].xyzz, temp[3].xxxx; 41: MUL temp[3].xyz, temp[3].xyzz, temp[4].xxxx; 42: MUL temp[4].xyz, const[9].xyzz, const[2].xyzz; 43: DP3 temp[7].x, temp[0].xyzz, temp[0].xyzz; 44: RSQ temp[7].x, temp[7].xxxx; 45: MUL temp[0].xyz, temp[0].xyzz, temp[7].xxxx; 46: DP3 temp[0].x, temp[1].xyzz, temp[0].xyzz; 47: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 48: POW temp[0].x, temp[0].xxxx, const[8].xxxx; 49: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 50: MUL temp[0].xyz, temp[4].xyzz, temp[0].xxxx; 51: MUL temp[0].xyz, temp[0].xyzz, temp[6].xxxx; 52: MAD temp[0].xyz, temp[3].xyzz, input[0].wwww, temp[0].xyzz; 53: ADD temp[2].xyz, temp[5].xyzz, temp[0].xyzz; 54: MUL temp[0].x, const[5].xxxx, input[1].xxxx; 55: MOV temp[0].yz, input[1].zyzz; 56: TEX temp[0].xyz, temp[0].xyzz, CUBE[0]; 57: SEQ temp[1].x, const[4].xxxx, temp[0].1111; 58: IF temp[1].xxxx; 59: ADD temp[1].x, temp[0].1111, -const[7].xxxx; 60: MUL temp[1].xyz, temp[2].xyzz, temp[1].xxxx; 61: MAD temp[2].xyz, temp[0].xyzz, const[7].xxxx, temp[1].xyzz; 62: ELSE; 63: MUL temp[2].xyz, temp[2].xyzz, temp[0].xyzz; 64: ENDIF; 65: MOV_SAT output[0], temp[2]; Fragment Program: after 'transform TEX' # Radeon Compiler Program 0: MOV temp[0].z, input[3].xxxx; 1: MOV temp[0].xy, input[2].zwzz; 2: MOV temp[1].yz, input[2].yxyy; 3: MOV temp[1].x, input[1].wwww; 4: MOV temp[2].w, const[11].xxxx; 5: DP3 temp[3].x, temp[1].xyzz, temp[1].xyzz; 6: RSQ temp[3].x, temp[3].xxxx; 7: MUL temp[1].xyz, temp[1].xyzz, temp[3].xxxx; 8: DP3 temp[3].x, temp[0].xyzz, temp[0].xyzz; 9: RSQ temp[3].x, temp[3].xxxx; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: DP3 temp[3].x, input[0].xyzz, input[0].xyzz; 12: RSQ temp[3].x, temp[3].xxxx; 13: MUL temp[3].xyz, input[0].xyzz, temp[3].xxxx; 14: DP3 temp[4].x, temp[1].xyzz, temp[3].xyzz; 15: MAX temp[4].x, temp[4].xxxx, temp[0].0000; 16: ADD temp[3].xyz, temp[3].xyzz, temp[0].xyzz; 17: MUL temp[5], const[13], const[1].xxxx; 18: MAD temp[5], const[14], const[1].yyyy, temp[5]; 19: MAD temp[5].xyz, const[15], const[1].zzzz, temp[5]; 20: DP3 temp[6].x, temp[5].xyzz, temp[5].xyzz; 21: RSQ temp[6].x, temp[6].xxxx; 22: MUL temp[5].xyz, temp[5].xyzz, temp[6].xxxx; 23: DP3 temp[6].x, temp[1].xyzz, temp[5].xyzz; 24: MAX temp[6].x, temp[6].xxxx, temp[0].0000; 25: ADD temp[0].xyz, temp[5].xyzz, temp[0].xyzz; 26: MUL temp[5].xyz, const[12].xyzz, const[0].xyzz; 27: MUL temp[5].xyz, temp[5].xyzz, temp[4].xxxx; 28: MUL temp[7].xyz, const[12].xyzz, const[2].xyzz; 29: MUL temp[7].xyz, temp[7].xyzz, temp[6].xxxx; 30: MAD temp[5].xyz, temp[5].xyzz, input[0].wwww, temp[7].xyzz; 31: MAD temp[5].xyz, const[3].xyzz, const[10].xyzz, temp[5].xyzz; 32: MUL temp[7].xyz, const[9].xyzz, const[0].xyzz; 33: DP3 temp[8].x, temp[3].xyzz, temp[3].xyzz; 34: RSQ temp[8].x, temp[8].xxxx; 35: MUL temp[3].xyz, temp[3].xyzz, temp[8].xxxx; 36: DP3 temp[3].x, temp[1].xyzz, temp[3].xyzz; 37: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 38: POW temp[3].x, temp[3].xxxx, const[8].xxxx; 39: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 40: MUL temp[3].xyz, temp[7].xyzz, temp[3].xxxx; 41: MUL temp[3].xyz, temp[3].xyzz, temp[4].xxxx; 42: MUL temp[4].xyz, const[9].xyzz, const[2].xyzz; 43: DP3 temp[7].x, temp[0].xyzz, temp[0].xyzz; 44: RSQ temp[7].x, temp[7].xxxx; 45: MUL temp[0].xyz, temp[0].xyzz, temp[7].xxxx; 46: DP3 temp[0].x, temp[1].xyzz, temp[0].xyzz; 47: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 48: POW temp[0].x, temp[0].xxxx, const[8].xxxx; 49: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 50: MUL temp[0].xyz, temp[4].xyzz, temp[0].xxxx; 51: MUL temp[0].xyz, temp[0].xyzz, temp[6].xxxx; 52: MAD temp[0].xyz, temp[3].xyzz, input[0].wwww, temp[0].xyzz; 53: ADD temp[2].xyz, temp[5].xyzz, temp[0].xyzz; 54: MUL temp[0].x, const[5].xxxx, input[1].xxxx; 55: MOV temp[0].yz, input[1].zyzz; 56: TEX temp[0].xyz, temp[0].xyzz, CUBE[0]; 57: SEQ temp[1].x, const[4].xxxx, temp[0].1111; 58: IF temp[1].xxxx; 59: ADD temp[1].x, temp[0].1111, -const[7].xxxx; 60: MUL temp[1].xyz, temp[2].xyzz, temp[1].xxxx; 61: MAD temp[2].xyz, temp[0].xyzz, const[7].xxxx, temp[1].xyzz; 62: ELSE; 63: MUL temp[2].xyz, temp[2].xyzz, temp[0].xyzz; 64: ENDIF; 65: MOV_SAT output[0], temp[2]; Fragment Program: after 'transform IF' # Radeon Compiler Program 0: MOV temp[0].z, input[3].xxxx; 1: MOV temp[0].xy, input[2].zwzz; 2: MOV temp[1].yz, input[2].yxyy; 3: MOV temp[1].x, input[1].wwww; 4: MOV temp[2].w, const[11].xxxx; 5: DP3 temp[3].x, temp[1].xyzz, temp[1].xyzz; 6: RSQ temp[3].x, temp[3].xxxx; 7: MUL temp[1].xyz, temp[1].xyzz, temp[3].xxxx; 8: DP3 temp[3].x, temp[0].xyzz, temp[0].xyzz; 9: RSQ temp[3].x, temp[3].xxxx; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: DP3 temp[3].x, input[0].xyzz, input[0].xyzz; 12: RSQ temp[3].x, temp[3].xxxx; 13: MUL temp[3].xyz, input[0].xyzz, temp[3].xxxx; 14: DP3 temp[4].x, temp[1].xyzz, temp[3].xyzz; 15: MAX temp[4].x, temp[4].xxxx, temp[0].0000; 16: ADD temp[3].xyz, temp[3].xyzz, temp[0].xyzz; 17: MUL temp[5], const[13], const[1].xxxx; 18: MAD temp[5], const[14], const[1].yyyy, temp[5]; 19: MAD temp[5].xyz, const[15], const[1].zzzz, temp[5]; 20: DP3 temp[6].x, temp[5].xyzz, temp[5].xyzz; 21: RSQ temp[6].x, temp[6].xxxx; 22: MUL temp[5].xyz, temp[5].xyzz, temp[6].xxxx; 23: DP3 temp[6].x, temp[1].xyzz, temp[5].xyzz; 24: MAX temp[6].x, temp[6].xxxx, temp[0].0000; 25: ADD temp[0].xyz, temp[5].xyzz, temp[0].xyzz; 26: MUL temp[5].xyz, const[12].xyzz, const[0].xyzz; 27: MUL temp[5].xyz, temp[5].xyzz, temp[4].xxxx; 28: MUL temp[7].xyz, const[12].xyzz, const[2].xyzz; 29: MUL temp[7].xyz, temp[7].xyzz, temp[6].xxxx; 30: MAD temp[5].xyz, temp[5].xyzz, input[0].wwww, temp[7].xyzz; 31: MAD temp[5].xyz, const[3].xyzz, const[10].xyzz, temp[5].xyzz; 32: MUL temp[7].xyz, const[9].xyzz, const[0].xyzz; 33: DP3 temp[8].x, temp[3].xyzz, temp[3].xyzz; 34: RSQ temp[8].x, temp[8].xxxx; 35: MUL temp[3].xyz, temp[3].xyzz, temp[8].xxxx; 36: DP3 temp[3].x, temp[1].xyzz, temp[3].xyzz; 37: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 38: POW temp[3].x, temp[3].xxxx, const[8].xxxx; 39: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 40: MUL temp[3].xyz, temp[7].xyzz, temp[3].xxxx; 41: MUL temp[3].xyz, temp[3].xyzz, temp[4].xxxx; 42: MUL temp[4].xyz, const[9].xyzz, const[2].xyzz; 43: DP3 temp[7].x, temp[0].xyzz, temp[0].xyzz; 44: RSQ temp[7].x, temp[7].xxxx; 45: MUL temp[0].xyz, temp[0].xyzz, temp[7].xxxx; 46: DP3 temp[0].x, temp[1].xyzz, temp[0].xyzz; 47: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 48: POW temp[0].x, temp[0].xxxx, const[8].xxxx; 49: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 50: MUL temp[0].xyz, temp[4].xyzz, temp[0].xxxx; 51: MUL temp[0].xyz, temp[0].xyzz, temp[6].xxxx; 52: MAD temp[0].xyz, temp[3].xyzz, input[0].wwww, temp[0].xyzz; 53: ADD temp[2].xyz, temp[5].xyzz, temp[0].xyzz; 54: MUL temp[0].x, const[5].xxxx, input[1].xxxx; 55: MOV temp[0].yz, input[1].zyzz; 56: TEX temp[0].xyz, temp[0].xyzz, CUBE[0]; 57: SUB none., const[4].xxxx, temp[0].1111; [aluresult = (x == 0)] 58: IF aluresult.x___; 59: ADD temp[1].x, temp[0].1111, -const[7].xxxx; 60: MUL temp[1].xyz, temp[2].xyzz, temp[1].xxxx; 61: MAD temp[2].xyz, temp[0].xyzz, const[7].xxxx, temp[1].xyzz; 62: ELSE; 63: MUL temp[2].xyz, temp[2].xyzz, temp[0].xyzz; 64: ENDIF; 65: MOV_SAT output[0], temp[2]; Fragment Program: after 'native rewrite' # Radeon Compiler Program 0: MOV temp[0].z, input[3].xxxx; 1: MOV temp[0].xy, input[2].zwzz; 2: MOV temp[1].yz, input[2].yxyy; 3: MOV temp[1].x, input[1].wwww; 4: MOV temp[2].w, const[11].xxxx; 5: DP3 temp[3].x, temp[1].xyzz, temp[1].xyzz; 6: RSQ temp[3].x, |temp[3].xxxx|; 7: MUL temp[1].xyz, temp[1].xyzz, temp[3].xxxx; 8: DP3 temp[3].x, temp[0].xyzz, temp[0].xyzz; 9: RSQ temp[3].x, |temp[3].xxxx|; 10: MUL temp[0].xyz, temp[0].xyzz, temp[3].xxxx; 11: DP3 temp[3].x, input[0].xyzz, input[0].xyzz; 12: RSQ temp[3].x, |temp[3].xxxx|; 13: MUL temp[3].xyz, input[0].xyzz, temp[3].xxxx; 14: DP3 temp[4].x, temp[1].xyzz, temp[3].xyzz; 15: MAX temp[4].x, temp[4].xxxx, temp[0].0000; 16: ADD temp[3].xyz, temp[3].xyzz, temp[0].xyzz; 17: MUL temp[5], const[13], const[1].xxxx; 18: MAD temp[5], const[14], const[1].yyyy, temp[5]; 19: MAD temp[5].xyz, const[15], const[1].zzzz, temp[5]; 20: DP3 temp[6].x, temp[5].xyzz, temp[5].xyzz; 21: RSQ temp[6].x, |temp[6].xxxx|; 22: MUL temp[5].xyz, temp[5].xyzz, temp[6].xxxx; 23: DP3 temp[6].x, temp[1].xyzz, temp[5].xyzz; 24: MAX temp[6].x, temp[6].xxxx, temp[0].0000; 25: ADD temp[0].xyz, temp[5].xyzz, temp[0].xyzz; 26: MUL temp[5].xyz, const[12].xyzz, const[0].xyzz; 27: MUL temp[5].xyz, temp[5].xyzz, temp[4].xxxx; 28: MUL temp[7].xyz, const[12].xyzz, const[2].xyzz; 29: MUL temp[7].xyz, temp[7].xyzz, temp[6].xxxx; 30: MAD temp[5].xyz, temp[5].xyzz, input[0].wwww, temp[7].xyzz; 31: MAD temp[5].xyz, const[3].xyzz, const[10].xyzz, temp[5].xyzz; 32: MUL temp[7].xyz, const[9].xyzz, const[0].xyzz; 33: DP3 temp[8].x, temp[3].xyzz, temp[3].xyzz; 34: RSQ temp[8].x, |temp[8].xxxx|; 35: MUL temp[3].xyz, temp[3].xyzz, temp[8].xxxx; 36: DP3 temp[3].x, temp[1].xyzz, temp[3].xyzz; 37: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 38: LG2 temp[9].w, temp[3].xxxx; 39: MUL temp[9].w, temp[9].wwww, const[8].xxxx; 40: EX2 temp[3].x, temp[9].wwww; 41: MAX temp[3].x, temp[3].xxxx, temp[0].0000; 42: MUL temp[3].xyz, temp[7].xyzz, temp[3].xxxx; 43: MUL temp[3].xyz, temp[3].xyzz, temp[4].xxxx; 44: MUL temp[4].xyz, const[9].xyzz, const[2].xyzz; 45: DP3 temp[7].x, temp[0].xyzz, temp[0].xyzz; 46: RSQ temp[7].x, |temp[7].xxxx|; 47: MUL temp[0].xyz, temp[0].xyzz, temp[7].xxxx; 48: DP3 temp[0].x, temp[1].xyzz, temp[0].xyzz; 49: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 50: LG2 temp[10].w, temp[0].xxxx; 51: MUL temp[10].w, temp[10].wwww, const[8].xxxx; 52: EX2 temp[0].x, temp[10].wwww; 53: MAX temp[0].x, temp[0].xxxx, temp[0].0000; 54: MUL temp[0].xyz, temp[4].xyzz, temp[0].xxxx; 55: MUL temp[0].xyz, temp[0].xyzz, temp[6].xxxx; 56: MAD temp[0].xyz, temp[3].xyzz, input[0].wwww, temp[0].xyzz; 57: ADD temp[2].xyz, temp[5].xyzz, temp[0].xyzz; 58: MUL temp[0].x, const[5].xxxx, input[1].xxxx; 59: MOV temp[0].yz, input[1].zyzz; 60: TEX temp[0].xyz, temp[0].xyzz, CUBE[0]; 61: ADD none., const[4].xxxx, -temp[0].1111; [aluresult = (x == 0)] 62: IF aluresult.x___; 63: ADD temp[1].x, temp[0].1111, -const[7].xxxx; 64: MUL temp[1].xyz, temp[2].xyzz, temp[1].xxxx; 65: MAD temp[2].xyz, temp[0].xyzz, const[7].xxxx, temp[1].xyzz; 66: ELSE; 67: MUL temp[2].xyz, temp[2].xyzz, temp[0].xyzz; 68: ENDIF; 69: MOV_SAT output[0], temp[2]; Fragment Program: after 'deadcode' # Radeon Compiler Program 0: MOV temp[0].z, input[3].__x_; 1: MOV temp[0].xy, input[2].zw__; 2: MOV temp[1].yz, input[2]._xy_; 3: MOV temp[1].x, input[1].w___; 4: MOV temp[2].w, const[11].___x; 5: DP3 temp[3].x, temp[1].xyz_, temp[1].xyz_; 6: RSQ temp[3].x, |temp[3].x___|; 7: MUL temp[1].xyz, temp[1].xyz_, temp[3].xxx_; 8: DP3 temp[3].x, temp[0].xyz_, temp[0].xyz_; 9: RSQ temp[3].x, |temp[3].x___|; 10: MUL temp[0].xyz, temp[0].xyz_, temp[3].xxx_; 11: DP3 temp[3].x, input[0].xyz_, input[0].xyz_; 12: RSQ temp[3].x, |temp[3].x___|; 13: MUL temp[3].xyz, input[0].xyz_, temp[3].xxx_; 14: DP3 temp[4].x, temp[1].xyz_, temp[3].xyz_; 15: MAX temp[4].x, temp[4].x___, temp[0].0___; 16: ADD temp[3].xyz, temp[3].xyz_, temp[0].xyz_; 17: MUL temp[5].xyz, const[13].xyz_, const[1].xxx_; 18: MAD temp[5].xyz, const[14].xyz_, const[1].yyy_, temp[5].xyz_; 19: MAD temp[5].xyz, const[15].xyz_, const[1].zzz_, temp[5].xyz_; 20: DP3 temp[6].x, temp[5].xyz_, temp[5].xyz_; 21: RSQ temp[6].x, |temp[6].x___|; 22: MUL temp[5].xyz, temp[5].xyz_, temp[6].xxx_; 23: DP3 temp[6].x, temp[1].xyz_, temp[5].xyz_; 24: MAX temp[6].x, temp[6].x___, temp[0].0___; 25: ADD temp[0].xyz, temp[5].xyz_, temp[0].xyz_; 26: MUL temp[5].xyz, const[12].xyz_, const[0].xyz_; 27: MUL temp[5].xyz, temp[5].xyz_, temp[4].xxx_; 28: MUL temp[7].xyz, const[12].xyz_, const[2].xyz_; 29: MUL temp[7].xyz, temp[7].xyz_, temp[6].xxx_; 30: MAD temp[5].xyz, temp[5].xyz_, input[0].www_, temp[7].xyz_; 31: MAD temp[5].xyz, const[3].xyz_, const[10].xyz_, temp[5].xyz_; 32: MUL temp[7].xyz, const[9].xyz_, const[0].xyz_; 33: DP3 temp[8].x, temp[3].xyz_, temp[3].xyz_; 34: RSQ temp[8].x, |temp[8].x___|; 35: MUL temp[3].xyz, temp[3].xyz_, temp[8].xxx_; 36: DP3 temp[3].x, temp[1].xyz_, temp[3].xyz_; 37: MAX temp[3].x, temp[3].x___, temp[0].0___; 38: LG2 temp[9].w, temp[3].___x; 39: MUL temp[9].w, temp[9].___w, const[8].___x; 40: EX2 temp[3].x, temp[9].w___; 41: MAX temp[3].x, temp[3].x___, temp[0].0___; 42: MUL temp[3].xyz, temp[7].xyz_, temp[3].xxx_; 43: MUL temp[3].xyz, temp[3].xyz_, temp[4].xxx_; 44: MUL temp[4].xyz, const[9].xyz_, const[2].xyz_; 45: DP3 temp[7].x, temp[0].xyz_, temp[0].xyz_; 46: RSQ temp[7].x, |temp[7].x___|; 47: MUL temp[0].xyz, temp[0].xyz_, temp[7].xxx_; 48: DP3 temp[0].x, temp[1].xyz_, temp[0].xyz_; 49: MAX temp[0].x, temp[0].x___, temp[0].0___; 50: LG2 temp[10].w, temp[0].___x; 51: MUL temp[10].w, temp[10].___w, const[8].___x; 52: EX2 temp[0].x, temp[10].w___; 53: MAX temp[0].x, temp[0].x___, temp[0].0___; 54: MUL temp[0].xyz, temp[4].xyz_, temp[0].xxx_; 55: MUL temp[0].xyz, temp[0].xyz_, temp[6].xxx_; 56: MAD temp[0].xyz, temp[3].xyz_, input[0].www_, temp[0].xyz_; 57: ADD temp[2].xyz, temp[5].xyz_, temp[0].xyz_; 58: MUL temp[0].x, const[5].x___, input[1].x___; 59: MOV temp[0].yz, input[1]._yz_; 60: TEX temp[0].xyz, temp[0].xyz_, CUBE[0]; 61: ADD none., const[4].x___, -temp[0].1___; [aluresult = (x == 0)] 62: IF aluresult.x___; 63: ADD temp[1].x, temp[0].1___, -const[7].x___; 64: MUL temp[1].xyz, temp[2].xyz_, temp[1].xxx_; 65: MAD temp[2].xyz, temp[0].xyz_, const[7].xxx_, temp[1].xyz_; 66: ELSE; 67: MUL temp[2].xyz, temp[2].xyz_, temp[0].xyz_; 68: ENDIF; 69: MOV_SAT output[0], temp[2]; Fragment Program: after 'register rename' # Radeon Compiler Program 0: MOV temp[11].z, input[3].__x_; 1: MOV temp[11].xy, input[2].zw__; 2: MOV temp[12].yz, input[2]._xy_; 3: MOV temp[12].x, input[1].w___; 4: MOV temp[13].w, const[11].___x; 5: DP3 temp[14].x, temp[12].xyz_, temp[12].xyz_; 6: RSQ temp[15].x, |temp[14].x___|; 7: MUL temp[16].xyz, temp[12].xyz_, temp[15].xxx_; 8: DP3 temp[17].x, temp[11].xyz_, temp[11].xyz_; 9: RSQ temp[18].x, |temp[17].x___|; 10: MUL temp[19].xyz, temp[11].xyz_, temp[18].xxx_; 11: DP3 temp[20].x, input[0].xyz_, input[0].xyz_; 12: RSQ temp[21].x, |temp[20].x___|; 13: MUL temp[22].xyz, input[0].xyz_, temp[21].xxx_; 14: DP3 temp[23].x, temp[16].xyz_, temp[22].xyz_; 15: MAX temp[24].x, temp[23].x___, temp[0].0___; 16: ADD temp[25].xyz, temp[22].xyz_, temp[19].xyz_; 17: MUL temp[26].xyz, const[13].xyz_, const[1].xxx_; 18: MAD temp[27].xyz, const[14].xyz_, const[1].yyy_, temp[26].xyz_; 19: MAD temp[28].xyz, const[15].xyz_, const[1].zzz_, temp[27].xyz_; 20: DP3 temp[29].x, temp[28].xyz_, temp[28].xyz_; 21: RSQ temp[30].x, |temp[29].x___|; 22: MUL temp[31].xyz, temp[28].xyz_, temp[30].xxx_; 23: DP3 temp[32].x, temp[16].xyz_, temp[31].xyz_; 24: MAX temp[33].x, temp[32].x___, temp[0].0___; 25: ADD temp[34].xyz, temp[31].xyz_, temp[19].xyz_; 26: MUL temp[35].xyz, const[12].xyz_, const[0].xyz_; 27: MUL temp[36].xyz, temp[35].xyz_, temp[24].xxx_; 28: MUL temp[37].xyz, const[12].xyz_, const[2].xyz_; 29: MUL temp[38].xyz, temp[37].xyz_, temp[33].xxx_; 30: MAD temp[39].xyz, temp[36].xyz_, input[0].www_, temp[38].xyz_; 31: MAD temp[40].xyz, const[3].xyz_, const[10].xyz_, temp[39].xyz_; 32: MUL temp[41].xyz, const[9].xyz_, const[0].xyz_; 33: DP3 temp[42].x, temp[25].xyz_, temp[25].xyz_; 34: RSQ temp[43].x, |temp[42].x___|; 35: MUL temp[44].xyz, temp[25].xyz_, temp[43].xxx_; 36: DP3 temp[45].x, temp[16].xyz_, temp[44].xyz_; 37: MAX temp[46].x, temp[45].x___, temp[0].0___; 38: LG2 temp[47].w, temp[46].___x; 39: MUL temp[48].w, temp[47].___w, const[8].___x; 40: EX2 temp[49].x, temp[48].w___; 41: MAX temp[50].x, temp[49].x___, temp[0].0___; 42: MUL temp[51].xyz, temp[41].xyz_, temp[50].xxx_; 43: MUL temp[52].xyz, temp[51].xyz_, temp[24].xxx_; 44: MUL temp[53].xyz, const[9].xyz_, const[2].xyz_; 45: DP3 temp[54].x, temp[34].xyz_, temp[34].xyz_; 46: RSQ temp[55].x, |temp[54].x___|; 47: MUL temp[56].xyz, temp[34].xyz_, temp[55].xxx_; 48: DP3 temp[57].x, temp[16].xyz_, temp[56].xyz_; 49: MAX temp[58].x, temp[57].x___, temp[0].0___; 50: LG2 temp[59].w, temp[58].___x; 51: MUL temp[60].w, temp[59].___w, const[8].___x; 52: EX2 temp[61].x, temp[60].w___; 53: MAX temp[62].x, temp[61].x___, temp[0].0___; 54: MUL temp[63].xyz, temp[53].xyz_, temp[62].xxx_; 55: MUL temp[64].xyz, temp[63].xyz_, temp[33].xxx_; 56: MAD temp[65].xyz, temp[52].xyz_, input[0].www_, temp[64].xyz_; 57: ADD temp[66].xyz, temp[40].xyz_, temp[65].xyz_; 58: MUL temp[67].x, const[5].x___, input[1].x___; 59: MOV temp[67].yz, input[1]._yz_; 60: TEX temp[68].xyz, temp[67].xyz_, CUBE[0]; 61: ADD none., const[4].x___, -temp[0].1___; [aluresult = (x == 0)] 62: IF aluresult.x___; 63: ADD temp[69].x, temp[0].1___, -const[7].x___; 64: MUL temp[70].xyz, temp[66].xyz_, temp[69].xxx_; 65: MAD temp[13].xyz, temp[68].xyz_, const[7].xxx_, temp[70].xyz_; 66: ELSE; 67: MUL temp[13].xyz, temp[66].xyz_, temp[68].xyz_; 68: ENDIF; 69: MOV_SAT output[0], temp[13]; Fragment Program: after 'dataflow optimize' # Radeon Compiler Program 0: MOV temp[11].z, input[3].__x_; 1: MOV temp[11].xy, input[2].zw__; 2: MOV temp[12].yz, input[2]._xy_; 3: MOV temp[12].x, input[1].w___; 4: MOV temp[13].w, const[11].___x; 5: DP3 temp[14].x, temp[12].xyz_, temp[12].xyz_; 6: RSQ temp[15].x, |temp[14].x___|; 7: MUL temp[16].xyz, temp[12].xyz_, temp[15].xxx_; 8: DP3 temp[17].x, temp[11].xyz_, temp[11].xyz_; 9: RSQ temp[18].x, |temp[17].x___|; 10: MUL temp[19].xyz, temp[11].xyz_, temp[18].xxx_; 11: DP3 temp[20].x, input[0].xyz_, input[0].xyz_; 12: RSQ temp[21].x, |temp[20].x___|; 13: MUL temp[22].xyz, input[0].xyz_, temp[21].xxx_; 14: DP3 temp[23].x, temp[16].xyz_, temp[22].xyz_; 15: MAX temp[24].x, temp[23].x___, none.0___; 16: MUL temp[26].xyz, const[13].xyz_, const[1].xxx_; 17: MAD temp[27].xyz, const[14].xyz_, const[1].yyy_, temp[26].xyz_; 18: MAD temp[28].xyz, const[15].xyz_, const[1].zzz_, temp[27].xyz_; 19: DP3 temp[29].x, temp[28].xyz_, temp[28].xyz_; 20: RSQ temp[30].x, |temp[29].x___|; 21: MUL temp[31].xyz, temp[28].xyz_, temp[30].xxx_; 22: DP3 temp[32].x, temp[16].xyz_, temp[31].xyz_; 23: MAX temp[33].x, temp[32].x___, none.0___; 24: MUL temp[35].xyz, const[12].xyz_, const[0].xyz_; 25: MUL temp[36].xyz, temp[35].xyz_, temp[24].xxx_; 26: MUL temp[37].xyz, const[12].xyz_, const[2].xyz_; 27: MUL temp[38].xyz, temp[37].xyz_, temp[33].xxx_; 28: MAD temp[39].xyz, temp[36].xyz_, input[0].www_, temp[38].xyz_; 29: MAD temp[40].xyz, const[3].xyz_, const[10].xyz_, temp[39].xyz_; 30: MUL temp[41].xyz, const[9].xyz_, const[0].xyz_; 31: DP3 temp[42].x, (temp[19] + temp[22]).xyz_, (temp[19] + temp[22]).xyz_; 32: RSQ temp[43].x, |temp[42].x___|; 33: MUL temp[44].xyz, (temp[19] + temp[22]).xyz_, temp[43].xxx_; 34: DP3 temp[45].x, temp[16].xyz_, temp[44].xyz_; 35: MAX temp[46].x, temp[45].x___, none.0___; 36: LG2 temp[47].w, temp[46].___x; 37: MUL temp[48].w, temp[47].___w, const[8].___x; 38: EX2 temp[49].x, temp[48].w___; 39: MAX temp[50].x, temp[49].x___, none.0___; 40: MUL temp[51].xyz, temp[41].xyz_, temp[50].xxx_; 41: MUL temp[52].xyz, temp[51].xyz_, temp[24].xxx_; 42: MUL temp[53].xyz, const[9].xyz_, const[2].xyz_; 43: DP3 temp[54].x, (temp[19] + temp[31]).xyz_, (temp[19] + temp[31]).xyz_; 44: RSQ temp[55].x, |temp[54].x___|; 45: MUL temp[56].xyz, (temp[19] + temp[31]).xyz_, temp[55].xxx_; 46: DP3 temp[57].x, temp[16].xyz_, temp[56].xyz_; 47: MAX temp[58].x, temp[57].x___, none.0___; 48: LG2 temp[59].w, temp[58].___x; 49: MUL temp[60].w, temp[59].___w, const[8].___x; 50: EX2 temp[61].x, temp[60].w___; 51: MAX temp[62].x, temp[61].x___, none.0___; 52: MUL temp[63].xyz, temp[53].xyz_, temp[62].xxx_; 53: MUL temp[64].xyz, temp[63].xyz_, temp[33].xxx_; 54: MAD temp[65].xyz, temp[52].xyz_, input[0].www_, temp[64].xyz_; 55: MUL temp[67].x, const[5].x___, input[1].x___; 56: MOV temp[67].yz, input[1]._yz_; 57: TEX temp[68].xyz, temp[67].xyz_, CUBE[0]; 58: ADD none., const[4].x___, -none.1___; [aluresult = (x == 0)] 59: IF aluresult.x___; 60: ADD temp[69].x, none.1___, -const[7].x___; 61: MUL temp[70].xyz, (temp[65] + temp[40]).xyz_, temp[69].xxx_; 62: MAD temp[13].xyz, temp[68].xyz_, const[7].xxx_, temp[70].xyz_; 63: ELSE; 64: MUL temp[13].xyz, (temp[65] + temp[40]).xyz_, temp[68].xyz_; 65: ENDIF; 66: MOV_SAT output[0], temp[13]; Fragment Program: after 'dataflow swizzles' # Radeon Compiler Program 0: MOV temp[11].z, input[3].__x_; 1: MOV temp[11].xy, input[2].zw__; 2: MOV temp[12].yz, input[2]._xy_; 3: MOV temp[12].x, input[1].w___; 4: MOV temp[13].w, const[11].___x; 5: DP3 temp[14].x, temp[12].xyz_, temp[12].xyz_; 6: RSQ temp[15].x, |temp[14].x___|; 7: MUL temp[16].xyz, temp[12].xyz_, temp[15].xxx_; 8: DP3 temp[17].x, temp[11].xyz_, temp[11].xyz_; 9: RSQ temp[18].x, |temp[17].x___|; 10: MUL temp[19].xyz, temp[11].xyz_, temp[18].xxx_; 11: DP3 temp[20].x, input[0].xyz_, input[0].xyz_; 12: RSQ temp[21].x, |temp[20].x___|; 13: MUL temp[22].xyz, input[0].xyz_, temp[21].xxx_; 14: DP3 temp[23].x, temp[16].xyz_, temp[22].xyz_; 15: MAX temp[24].x, temp[23].x___, none.0___; 16: MUL temp[26].xyz, const[13].xyz_, const[1].xxx_; 17: MAD temp[27].xyz, const[14].xyz_, const[1].yyy_, temp[26].xyz_; 18: MAD temp[28].xyz, const[15].xyz_, const[1].zzz_, temp[27].xyz_; 19: DP3 temp[29].x, temp[28].xyz_, temp[28].xyz_; 20: RSQ temp[30].x, |temp[29].x___|; 21: MUL temp[31].xyz, temp[28].xyz_, temp[30].xxx_; 22: DP3 temp[32].x, temp[16].xyz_, temp[31].xyz_; 23: MAX temp[33].x, temp[32].x___, none.0___; 24: MUL temp[35].xyz, const[12].xyz_, const[0].xyz_; 25: MUL temp[36].xyz, temp[35].xyz_, temp[24].xxx_; 26: MUL temp[37].xyz, const[12].xyz_, const[2].xyz_; 27: MUL temp[38].xyz, temp[37].xyz_, temp[33].xxx_; 28: MAD temp[39].xyz, temp[36].xyz_, input[0].www_, temp[38].xyz_; 29: MAD temp[40].xyz, const[3].xyz_, const[10].xyz_, temp[39].xyz_; 30: MUL temp[41].xyz, const[9].xyz_, const[0].xyz_; 31: DP3 temp[42].x, (temp[19] + temp[22]).xyz_, (temp[19] + temp[22]).xyz_; 32: RSQ temp[43].x, |temp[42].x___|; 33: MUL temp[44].xyz, (temp[19] + temp[22]).xyz_, temp[43].xxx_; 34: DP3 temp[45].x, temp[16].xyz_, temp[44].xyz_; 35: MAX temp[46].x, temp[45].x___, none.0___; 36: LG2 temp[47].w, temp[46].___x; 37: MUL temp[48].w, temp[47].___w, const[8].___x; 38: EX2 temp[49].x, temp[48].w___; 39: MAX temp[50].x, temp[49].x___, none.0___; 40: MUL temp[51].xyz, temp[41].xyz_, temp[50].xxx_; 41: MUL temp[52].xyz, temp[51].xyz_, temp[24].xxx_; 42: MUL temp[53].xyz, const[9].xyz_, const[2].xyz_; 43: DP3 temp[54].x, (temp[19] + temp[31]).xyz_, (temp[19] + temp[31]).xyz_; 44: RSQ temp[55].x, |temp[54].x___|; 45: MUL temp[56].xyz, (temp[19] + temp[31]).xyz_, temp[55].xxx_; 46: DP3 temp[57].x, temp[16].xyz_, temp[56].xyz_; 47: MAX temp[58].x, temp[57].x___, none.0___; 48: LG2 temp[59].w, temp[58].___x; 49: MUL temp[60].w, temp[59].___w, const[8].___x; 50: EX2 temp[61].x, temp[60].w___; 51: MAX temp[62].x, temp[61].x___, none.0___; 52: MUL temp[63].xyz, temp[53].xyz_, temp[62].xxx_; 53: MUL temp[64].xyz, temp[63].xyz_, temp[33].xxx_; 54: MAD temp[65].xyz, temp[52].xyz_, input[0].www_, temp[64].xyz_; 55: MUL temp[67].x, const[5].x___, input[1].x___; 56: MOV temp[67].yz, input[1]._yz_; 57: TEX temp[68].xyz, temp[67].xyz_, CUBE[0]; 58: ADD none., const[4].x___, -none.1___; [aluresult = (x == 0)] 59: IF aluresult.x___; 60: ADD temp[69].x, none.1___, -const[7].x___; 61: MUL temp[70].xyz, (temp[65] + temp[40]).xyz_, temp[69].xxx_; 62: MAD temp[13].xyz, temp[68].xyz_, const[7].xxx_, temp[70].xyz_; 63: ELSE; 64: MUL temp[13].xyz, (temp[65] + temp[40]).xyz_, temp[68].xyz_; 65: ENDIF; 66: MOV_SAT output[0], temp[13]; Fragment Program: after 'dead constants' # Radeon Compiler Program 0: MOV temp[11].z, input[3].__x_; 1: MOV temp[11].xy, input[2].zw__; 2: MOV temp[12].yz, input[2]._xy_; 3: MOV temp[12].x, input[1].w___; 4: MOV temp[13].w, const[11].___x; 5: DP3 temp[14].x, temp[12].xyz_, temp[12].xyz_; 6: RSQ temp[15].x, |temp[14].x___|; 7: MUL temp[16].xyz, temp[12].xyz_, temp[15].xxx_; 8: DP3 temp[17].x, temp[11].xyz_, temp[11].xyz_; 9: RSQ temp[18].x, |temp[17].x___|; 10: MUL temp[19].xyz, temp[11].xyz_, temp[18].xxx_; 11: DP3 temp[20].x, input[0].xyz_, input[0].xyz_; 12: RSQ temp[21].x, |temp[20].x___|; 13: MUL temp[22].xyz, input[0].xyz_, temp[21].xxx_; 14: DP3 temp[23].x, temp[16].xyz_, temp[22].xyz_; 15: MAX temp[24].x, temp[23].x___, none.0___; 16: MUL temp[26].xyz, const[13].xyz_, const[1].xxx_; 17: MAD temp[27].xyz, const[14].xyz_, const[1].yyy_, temp[26].xyz_; 18: MAD temp[28].xyz, const[15].xyz_, const[1].zzz_, temp[27].xyz_; 19: DP3 temp[29].x, temp[28].xyz_, temp[28].xyz_; 20: RSQ temp[30].x, |temp[29].x___|; 21: MUL temp[31].xyz, temp[28].xyz_, temp[30].xxx_; 22: DP3 temp[32].x, temp[16].xyz_, temp[31].xyz_; 23: MAX temp[33].x, temp[32].x___, none.0___; 24: MUL temp[35].xyz, const[12].xyz_, const[0].xyz_; 25: MUL temp[36].xyz, temp[35].xyz_, temp[24].xxx_; 26: MUL temp[37].xyz, const[12].xyz_, const[2].xyz_; 27: MUL temp[38].xyz, temp[37].xyz_, temp[33].xxx_; 28: MAD temp[39].xyz, temp[36].xyz_, input[0].www_, temp[38].xyz_; 29: MAD temp[40].xyz, const[3].xyz_, const[10].xyz_, temp[39].xyz_; 30: MUL temp[41].xyz, const[9].xyz_, const[0].xyz_; 31: DP3 temp[42].x, (temp[19] + temp[22]).xyz_, (temp[19] + temp[22]).xyz_; 32: RSQ temp[43].x, |temp[42].x___|; 33: MUL temp[44].xyz, (temp[19] + temp[22]).xyz_, temp[43].xxx_; 34: DP3 temp[45].x, temp[16].xyz_, temp[44].xyz_; 35: MAX temp[46].x, temp[45].x___, none.0___; 36: LG2 temp[47].w, temp[46].___x; 37: MUL temp[48].w, temp[47].___w, const[8].___x; 38: EX2 temp[49].x, temp[48].w___; 39: MAX temp[50].x, temp[49].x___, none.0___; 40: MUL temp[51].xyz, temp[41].xyz_, temp[50].xxx_; 41: MUL temp[52].xyz, temp[51].xyz_, temp[24].xxx_; 42: MUL temp[53].xyz, const[9].xyz_, const[2].xyz_; 43: DP3 temp[54].x, (temp[19] + temp[31]).xyz_, (temp[19] + temp[31]).xyz_; 44: RSQ temp[55].x, |temp[54].x___|; 45: MUL temp[56].xyz, (temp[19] + temp[31]).xyz_, temp[55].xxx_; 46: DP3 temp[57].x, temp[16].xyz_, temp[56].xyz_; 47: MAX temp[58].x, temp[57].x___, none.0___; 48: LG2 temp[59].w, temp[58].___x; 49: MUL temp[60].w, temp[59].___w, const[8].___x; 50: EX2 temp[61].x, temp[60].w___; 51: MAX temp[62].x, temp[61].x___, none.0___; 52: MUL temp[63].xyz, temp[53].xyz_, temp[62].xxx_; 53: MUL temp[64].xyz, temp[63].xyz_, temp[33].xxx_; 54: MAD temp[65].xyz, temp[52].xyz_, input[0].www_, temp[64].xyz_; 55: MUL temp[67].x, const[5].x___, input[1].x___; 56: MOV temp[67].yz, input[1]._yz_; 57: TEX temp[68].xyz, temp[67].xyz_, CUBE[0]; 58: ADD none., const[4].x___, -none.1___; [aluresult = (x == 0)] 59: IF aluresult.x___; 60: ADD temp[69].x, none.1___, -const[7].x___; 61: MUL temp[70].xyz, (temp[65] + temp[40]).xyz_, temp[69].xxx_; 62: MAD temp[13].xyz, temp[68].xyz_, const[7].xxx_, temp[70].xyz_; 63: ELSE; 64: MUL temp[13].xyz, (temp[65] + temp[40]).xyz_, temp[68].xyz_; 65: ENDIF; 66: MOV_SAT output[0], temp[13]; Fragment Program: after 'pair translate' # Radeon Compiler Program 0: src0.xyz = input[3] MAD temp[11].z, src0.__x, src0.111, src0.000 1: src0.xyz = input[2], src0.w = input[2] MAD temp[11].xy, src0.zw_, src0.111, src0.000 2: src0.xyz = input[2] MAD temp[12].yz, src0._xy, src0.111, src0.000 3: src0.w = input[1] MAD temp[12].x, src0.w__, src0.111, src0.000 4: src0.xyz = const[11] MAD temp[13].w, src0.x, src0.1, src0.0 5: src0.xyz = temp[12] DP3 temp[14].x, src0.xyz, src0.xyz 6: src0.xyz = temp[14] REPL_ALPHA temp[15].x RSQ, |src0.x| 7: src0.xyz = temp[12], src1.xyz = temp[15] MAD temp[16].xyz, src0.xyz, src1.xxx, src0.000 8: src0.xyz = temp[11] DP3 temp[17].x, src0.xyz, src0.xyz 9: src0.xyz = temp[17] REPL_ALPHA temp[18].x RSQ, |src0.x| 10: src0.xyz = temp[11], src1.xyz = temp[18] MAD temp[19].xyz, src0.xyz, src1.xxx, src0.000 11: src0.xyz = input[0] DP3 temp[20].x, src0.xyz, src0.xyz 12: src0.xyz = temp[20] REPL_ALPHA temp[21].x RSQ, |src0.x| 13: src0.xyz = input[0], src1.xyz = temp[21] MAD temp[22].xyz, src0.xyz, src1.xxx, src0.000 14: src0.xyz = temp[16], src1.xyz = temp[22] DP3 temp[23].x, src0.xyz, src1.xyz 15: src0.xyz = temp[23] MAX temp[24].x, src0.x__, src0.0__ 16: src0.xyz = const[13], src1.xyz = const[1] MAD temp[26].xyz, src0.xyz, src1.xxx, src0.000 17: src0.xyz = const[14], src1.xyz = const[1], src2.xyz = temp[26] MAD temp[27].xyz, src0.xyz, src1.yyy, src2.xyz 18: src0.xyz = const[15], src1.xyz = const[1], src2.xyz = temp[27] MAD temp[28].xyz, src0.xyz, src1.zzz, src2.xyz 19: src0.xyz = temp[28] DP3 temp[29].x, src0.xyz, src0.xyz 20: src0.xyz = temp[29] REPL_ALPHA temp[30].x RSQ, |src0.x| 21: src0.xyz = temp[28], src1.xyz = temp[30] MAD temp[31].xyz, src0.xyz, src1.xxx, src0.000 22: src0.xyz = temp[16], src1.xyz = temp[31] DP3 temp[32].x, src0.xyz, src1.xyz 23: src0.xyz = temp[32] MAX temp[33].x, src0.x__, src0.0__ 24: src0.xyz = const[12], src1.xyz = const[0] MAD temp[35].xyz, src0.xyz, src1.xyz, src0.000 25: src0.xyz = temp[35], src1.xyz = temp[24] MAD temp[36].xyz, src0.xyz, src1.xxx, src0.000 26: src0.xyz = const[12], src1.xyz = const[2] MAD temp[37].xyz, src0.xyz, src1.xyz, src0.000 27: src0.xyz = temp[37], src1.xyz = temp[33] MAD temp[38].xyz, src0.xyz, src1.xxx, src0.000 28: src0.xyz = temp[36], src0.w = input[0], src1.xyz = temp[38] MAD temp[39].xyz, src0.xyz, src0.www, src1.xyz 29: src0.xyz = const[3], src1.xyz = const[10], src2.xyz = temp[39] MAD temp[40].xyz, src0.xyz, src1.xyz, src2.xyz 30: src0.xyz = const[9], src1.xyz = const[0] MAD temp[41].xyz, src0.xyz, src1.xyz, src0.000 31: src0.xyz = temp[22], src1.xyz = temp[19], srcp.xyz = (src1 + src0) DP3 temp[42].x, srcp.xyz, srcp.xyz 32: src0.xyz = temp[42] REPL_ALPHA temp[43].x RSQ, |src0.x| 33: src0.xyz = temp[22], src1.xyz = temp[19], src2.xyz = temp[43], srcp.xyz = (src1 + src0) MAD temp[44].xyz, srcp.xyz, src2.xxx, src0.000 34: src0.xyz = temp[16], src1.xyz = temp[44] DP3 temp[45].x, src0.xyz, src1.xyz 35: src0.xyz = temp[45] MAX temp[46].x, src0.x__, src0.0__ 36: src0.xyz = temp[46] LG2 temp[47].w, src0.x 37: src0.xyz = const[8], src0.w = temp[47] MAD temp[48].w, src0.w, src0.x, src0.0 38: src0.w = temp[48] REPL_ALPHA temp[49].x EX2, src0.w 39: src0.xyz = temp[49] MAX temp[50].x, src0.x__, src0.0__ 40: src0.xyz = temp[41], src1.xyz = temp[50] MAD temp[51].xyz, src0.xyz, src1.xxx, src0.000 41: src0.xyz = temp[51], src1.xyz = temp[24] MAD temp[52].xyz, src0.xyz, src1.xxx, src0.000 42: src0.xyz = const[9], src1.xyz = const[2] MAD temp[53].xyz, src0.xyz, src1.xyz, src0.000 43: src0.xyz = temp[31], src1.xyz = temp[19], srcp.xyz = (src1 + src0) DP3 temp[54].x, srcp.xyz, srcp.xyz 44: src0.xyz = temp[54] REPL_ALPHA temp[55].x RSQ, |src0.x| 45: src0.xyz = temp[31], src1.xyz = temp[19], src2.xyz = temp[55], srcp.xyz = (src1 + src0) MAD temp[56].xyz, srcp.xyz, src2.xxx, src0.000 46: src0.xyz = temp[16], src1.xyz = temp[56] DP3 temp[57].x, src0.xyz, src1.xyz 47: src0.xyz = temp[57] MAX temp[58].x, src0.x__, src0.0__ 48: src0.xyz = temp[58] LG2 temp[59].w, src0.x 49: src0.xyz = const[8], src0.w = temp[59] MAD temp[60].w, src0.w, src0.x, src0.0 50: src0.w = temp[60] REPL_ALPHA temp[61].x EX2, src0.w 51: src0.xyz = temp[61] MAX temp[62].x, src0.x__, src0.0__ 52: src0.xyz = temp[53], src1.xyz = temp[62] MAD temp[63].xyz, src0.xyz, src1.xxx, src0.000 53: src0.xyz = temp[63], src1.xyz = temp[33] MAD temp[64].xyz, src0.xyz, src1.xxx, src0.000 54: src0.xyz = temp[52], src0.w = input[0], src1.xyz = temp[64] MAD temp[65].xyz, src0.xyz, src0.www, src1.xyz 55: src0.xyz = const[5], src1.xyz = input[1] MAD temp[67].x, src0.x__, src1.x__, src0.000 56: src0.xyz = input[1] MAD temp[67].yz, src0._yz, src0.111, src0.000 57: TEX temp[68].xyz, temp[67].xyz_, CUBE[0]; 58: src0.xyz = const[4] MAD aluresult, src0.x__, src0.111, -src0.1__ [aluresult = (result == 0)] 59: IF aluresult.x___; 60: src0.xyz = const[7] MAD temp[69].x, src0.1__, src0.111, -src0.x__ 61: src0.xyz = temp[40], src1.xyz = temp[65], src2.xyz = temp[69], srcp.xyz = (src1 + src0) MAD temp[70].xyz, srcp.xyz, src2.xxx, src0.000 62: src0.xyz = temp[68], src1.xyz = const[7], src2.xyz = temp[70] MAD temp[13].xyz, src0.xyz, src1.xxx, src2.xyz 63: ELSE; 64: src0.xyz = temp[40], src1.xyz = temp[65], src2.xyz = temp[68], srcp.xyz = (src1 + src0) MAD temp[13].xyz, srcp.xyz, src2.xyz, src0.000 65: ENDIF; 66: src0.xyz = temp[13], src0.w = temp[13] MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000 MAD_SAT color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'pair scheduling' # Radeon Compiler Program 0: src0.xyz = input[3], src1.xyz = const[11] MAD temp[11].z, src0.__x, src0.111, src0.000 MAD temp[13].w, src1.x, src0.1, src0.0 1: src0.xyz = input[2], src0.w = input[2] MAD temp[11].xy, src0.zw_, src0.111, src0.000 2: src0.xyz = temp[11] DP3 temp[17].x, src0.xyz, src0.xyz 3: src0.xyz = temp[17] REPL_ALPHA temp[18].x RSQ, |src0.x| 4: src0.xyz = temp[11], src1.xyz = temp[18] MAD temp[19].xyz, src0.xyz, src1.xxx, src0.000 5: src0.xyz = input[2] MAD temp[12].yz, src0._xy, src0.111, src0.000 6: src0.w = input[1] MAD temp[12].x, src0.w__, src0.111, src0.000 7: src0.xyz = temp[12] DP3 temp[14].x, src0.xyz, src0.xyz 8: src0.xyz = temp[14] REPL_ALPHA temp[15].x RSQ, |src0.x| 9: src0.xyz = temp[12], src1.xyz = temp[15] MAD temp[16].xyz, src0.xyz, src1.xxx, src0.000 10: src0.xyz = input[0] DP3 temp[20].x, src0.xyz, src0.xyz 11: src0.xyz = temp[20] REPL_ALPHA temp[21].x RSQ, |src0.x| 12: src0.xyz = input[0], src1.xyz = temp[21] MAD temp[22].xyz, src0.xyz, src1.xxx, src0.000 13: src0.xyz = temp[22], src1.xyz = temp[19], srcp.xyz = (src1 + src0) DP3 temp[42].x, srcp.xyz, srcp.xyz 14: src0.xyz = temp[16], src1.xyz = temp[22] DP3 temp[23].x, src0.xyz, src1.xyz 15: src0.xyz = const[13], src1.xyz = const[1], src2.xyz = temp[23] MAD temp[26].xyz, src0.xyz, src1.xxx, src0.000 MAX temp[24].w, src2.x, src0.0 16: src0.xyz = const[14], src1.xyz = const[1], src2.xyz = temp[26] MAD temp[27].xyz, src0.xyz, src1.yyy, src2.xyz 17: src0.xyz = const[15], src1.xyz = const[1], src2.xyz = temp[27] MAD temp[28].xyz, src0.xyz, src1.zzz, src2.xyz 18: src0.xyz = temp[28] DP3 temp[29].x, src0.xyz, src0.xyz 19: src0.xyz = const[12], src1.xyz = const[2], src2.xyz = temp[29] MAD temp[37].xyz, src0.xyz, src1.xyz, src0.000 RSQ temp[30].w, |src2.x| 20: src0.xyz = temp[28], src0.w = temp[30], src1.xyz = temp[30] MAD temp[31].xyz, src0.xyz, src0.www, src0.000 21: src0.xyz = temp[31], src1.xyz = temp[19], srcp.xyz = (src1 + src0) DP3 temp[54].x, srcp.xyz, srcp.xyz 22: src0.xyz = temp[16], src1.xyz = temp[31] DP3 temp[32].x, src0.xyz, src1.xyz 23: src0.xyz = const[9], src1.xyz = const[2], src2.xyz = temp[32] MAD temp[53].xyz, src0.xyz, src1.xyz, src0.000 MAX temp[33].w, src2.x, src0.0 24: src0.xyz = temp[37], src0.w = temp[33], src1.xyz = temp[33] MAD temp[38].xyz, src0.xyz, src0.www, src0.000 25: src0.xyz = const[9], src1.xyz = const[0], src2.xyz = temp[54] MAD temp[41].xyz, src0.xyz, src1.xyz, src0.000 RSQ temp[55].w, |src2.x| 26: src0.xyz = temp[31], src0.w = temp[55], src1.xyz = temp[19], src2.xyz = temp[55], srcp.xyz = (src1 + src0) MAD temp[56].xyz, srcp.xyz, src0.www, src0.000 27: src0.xyz = temp[16], src1.xyz = temp[56] DP3 temp[57].x, src0.xyz, src1.xyz 28: src0.xyz = const[5], src1.xyz = input[1], src2.xyz = temp[57] MAD temp[67].x, src0.x__, src1.x__, src0.000 MAX temp[58].w, src2.x, src0.0 29: src0.xyz = input[1], src0.w = temp[58] MAD temp[67].yz, src0._yz, src0.111, src0.000 LG2 temp[59].w, src0.w 30: BEGIN_TEX; 31: TEX temp[68].xyz, temp[67].xyz_, CUBE[0] SEM_WAIT SEM_ACQUIRE; 32: src0.xyz = const[4], src0.w = temp[59], src1.xyz = const[8] MAD aluresult, src0.x__, src0.111, -src0.1__ MAD temp[60].w, src0.w, src1.x, src0.0 [aluresult = (result == 0)] 33: src0.xyz = const[12], src1.xyz = const[0], src2.xyz = temp[42] MAD temp[35].xyz, src0.xyz, src1.xyz, src0.000 RSQ temp[43].w, |src2.x| 34: src0.xyz = temp[22], src0.w = temp[43], src1.xyz = temp[19], src2.xyz = temp[43], srcp.xyz = (src1 + src0) MAD temp[44].xyz, srcp.xyz, src0.www, src0.000 35: src0.xyz = temp[16], src1.xyz = temp[44] DP3 temp[45].x, src0.xyz, src1.xyz 36: src0.xyz = temp[35], src0.w = temp[24], src1.xyz = temp[24], src1.w = temp[60] MAD temp[36].xyz, src0.xyz, src0.www, src0.000 EX2 temp[61].w, src1.w 37: src0.xyz = temp[36], src0.w = input[0], src1.xyz = temp[38], src2.xyz = temp[45] MAD temp[39].xyz, src0.xyz, src0.www, src1.xyz MAX temp[46].w, src2.x, src0.0 38: src0.xyz = const[3], src1.xyz = const[10], src2.xyz = temp[39] MAD temp[40].xyz, src0.xyz, src1.xyz, src2.xyz 39: src0.xyz = temp[61], src0.w = temp[61], src1.w = temp[46] MAX temp[62].x, src0.w__, src0.0__ LG2 temp[47].w, src1.w 40: src0.xyz = temp[53], src0.w = temp[47], src1.xyz = temp[62], src2.xyz = const[8] MAD temp[63].xyz, src0.xyz, src1.xxx, src0.000 MAD temp[48].w, src0.w, src2.x, src0.0 41: src0.xyz = temp[63], src0.w = temp[33], src1.xyz = temp[33] MAD temp[64].xyz, src0.xyz, src0.www, src0.000 42: src0.w = temp[48] REPL_ALPHA temp[49].x EX2, src0.w 43: src0.xyz = temp[49] MAX temp[50].x, src0.x__, src0.0__ 44: src0.xyz = temp[41], src1.xyz = temp[50] MAD temp[51].xyz, src0.xyz, src1.xxx, src0.000 45: src0.xyz = temp[51], src0.w = temp[24], src1.xyz = temp[24] MAD temp[52].xyz, src0.xyz, src0.www, src0.000 46: src0.xyz = temp[52], src0.w = input[0], src1.xyz = temp[64] MAD temp[65].xyz, src0.xyz, src0.www, src1.xyz 47: IF aluresult.x___; 48: src0.xyz = const[7] SEM_WAIT MAD temp[69].x, src0.1__, src0.111, -src0.x__ 49: src0.xyz = temp[40], src1.xyz = temp[65], src2.xyz = temp[69], srcp.xyz = (src1 + src0) SEM_WAIT MAD temp[70].xyz, srcp.xyz, src2.xxx, src0.000 50: src0.xyz = temp[68], src1.xyz = const[7], src2.xyz = temp[70] SEM_WAIT MAD temp[13].xyz, src0.xyz, src1.xxx, src2.xyz 51: ELSE; 52: src0.xyz = temp[40], src1.xyz = temp[65], src2.xyz = temp[68], srcp.xyz = (src1 + src0) SEM_WAIT MAD temp[13].xyz, srcp.xyz, src2.xyz, src0.000 53: ENDIF; 54: src0.xyz = temp[13], src0.w = temp[13] SEM_WAIT MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000 MAD_SAT color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'dead sources' # Radeon Compiler Program 0: src0.xyz = input[3], src1.xyz = const[11] MAD temp[11].z, src0.__x, src0.111, src0.000 MAD temp[13].w, src1.x, src0.1, src0.0 1: src0.xyz = input[2], src0.w = input[2] MAD temp[11].xy, src0.zw_, src0.111, src0.000 2: src0.xyz = temp[11] DP3 temp[17].x, src0.xyz, src0.xyz 3: src0.xyz = temp[17] REPL_ALPHA temp[18].x RSQ, |src0.x| 4: src0.xyz = temp[11], src1.xyz = temp[18] MAD temp[19].xyz, src0.xyz, src1.xxx, src0.000 5: src0.xyz = input[2] MAD temp[12].yz, src0._xy, src0.111, src0.000 6: src0.w = input[1] MAD temp[12].x, src0.w__, src0.111, src0.000 7: src0.xyz = temp[12] DP3 temp[14].x, src0.xyz, src0.xyz 8: src0.xyz = temp[14] REPL_ALPHA temp[15].x RSQ, |src0.x| 9: src0.xyz = temp[12], src1.xyz = temp[15] MAD temp[16].xyz, src0.xyz, src1.xxx, src0.000 10: src0.xyz = input[0] DP3 temp[20].x, src0.xyz, src0.xyz 11: src0.xyz = temp[20] REPL_ALPHA temp[21].x RSQ, |src0.x| 12: src0.xyz = input[0], src1.xyz = temp[21] MAD temp[22].xyz, src0.xyz, src1.xxx, src0.000 13: src0.xyz = temp[22], src1.xyz = temp[19], srcp.xyz = (src1 + src0) DP3 temp[42].x, srcp.xyz, srcp.xyz 14: src0.xyz = temp[16], src1.xyz = temp[22] DP3 temp[23].x, src0.xyz, src1.xyz 15: src0.xyz = const[13], src1.xyz = const[1], src2.xyz = temp[23] MAD temp[26].xyz, src0.xyz, src1.xxx, src0.000 MAX temp[24].w, src2.x, src0.0 16: src0.xyz = const[14], src1.xyz = const[1], src2.xyz = temp[26] MAD temp[27].xyz, src0.xyz, src1.yyy, src2.xyz 17: src0.xyz = const[15], src1.xyz = const[1], src2.xyz = temp[27] MAD temp[28].xyz, src0.xyz, src1.zzz, src2.xyz 18: src0.xyz = temp[28] DP3 temp[29].x, src0.xyz, src0.xyz 19: src0.xyz = const[12], src1.xyz = const[2], src2.xyz = temp[29] MAD temp[37].xyz, src0.xyz, src1.xyz, src0.000 RSQ temp[30].w, |src2.x| 20: src0.xyz = temp[28], src0.w = temp[30] MAD temp[31].xyz, src0.xyz, src0.www, src0.000 21: src0.xyz = temp[31], src1.xyz = temp[19], srcp.xyz = (src1 + src0) DP3 temp[54].x, srcp.xyz, srcp.xyz 22: src0.xyz = temp[16], src1.xyz = temp[31] DP3 temp[32].x, src0.xyz, src1.xyz 23: src0.xyz = const[9], src1.xyz = const[2], src2.xyz = temp[32] MAD temp[53].xyz, src0.xyz, src1.xyz, src0.000 MAX temp[33].w, src2.x, src0.0 24: src0.xyz = temp[37], src0.w = temp[33] MAD temp[38].xyz, src0.xyz, src0.www, src0.000 25: src0.xyz = const[9], src1.xyz = const[0], src2.xyz = temp[54] MAD temp[41].xyz, src0.xyz, src1.xyz, src0.000 RSQ temp[55].w, |src2.x| 26: src0.xyz = temp[31], src0.w = temp[55], src1.xyz = temp[19], srcp.xyz = (src1 + src0) MAD temp[56].xyz, srcp.xyz, src0.www, src0.000 27: src0.xyz = temp[16], src1.xyz = temp[56] DP3 temp[57].x, src0.xyz, src1.xyz 28: src0.xyz = const[5], src1.xyz = input[1], src2.xyz = temp[57] MAD temp[67].x, src0.x__, src1.x__, src0.000 MAX temp[58].w, src2.x, src0.0 29: src0.xyz = input[1], src0.w = temp[58] MAD temp[67].yz, src0._yz, src0.111, src0.000 LG2 temp[59].w, src0.w 30: BEGIN_TEX; 31: TEX temp[68].xyz, temp[67].xyz_, CUBE[0] SEM_WAIT SEM_ACQUIRE; 32: src0.xyz = const[4], src0.w = temp[59], src1.xyz = const[8] MAD aluresult, src0.x__, src0.111, -src0.1__ MAD temp[60].w, src0.w, src1.x, src0.0 [aluresult = (result == 0)] 33: src0.xyz = const[12], src1.xyz = const[0], src2.xyz = temp[42] MAD temp[35].xyz, src0.xyz, src1.xyz, src0.000 RSQ temp[43].w, |src2.x| 34: src0.xyz = temp[22], src0.w = temp[43], src1.xyz = temp[19], srcp.xyz = (src1 + src0) MAD temp[44].xyz, srcp.xyz, src0.www, src0.000 35: src0.xyz = temp[16], src1.xyz = temp[44] DP3 temp[45].x, src0.xyz, src1.xyz 36: src0.xyz = temp[35], src0.w = temp[24], src1.w = temp[60] MAD temp[36].xyz, src0.xyz, src0.www, src0.000 EX2 temp[61].w, src1.w 37: src0.xyz = temp[36], src0.w = input[0], src1.xyz = temp[38], src2.xyz = temp[45] MAD temp[39].xyz, src0.xyz, src0.www, src1.xyz MAX temp[46].w, src2.x, src0.0 38: src0.xyz = const[3], src1.xyz = const[10], src2.xyz = temp[39] MAD temp[40].xyz, src0.xyz, src1.xyz, src2.xyz 39: src0.w = temp[61], src1.w = temp[46] MAX temp[62].x, src0.w__, src0.0__ LG2 temp[47].w, src1.w 40: src0.xyz = temp[53], src0.w = temp[47], src1.xyz = temp[62], src2.xyz = const[8] MAD temp[63].xyz, src0.xyz, src1.xxx, src0.000 MAD temp[48].w, src0.w, src2.x, src0.0 41: src0.xyz = temp[63], src0.w = temp[33] MAD temp[64].xyz, src0.xyz, src0.www, src0.000 42: src0.w = temp[48] REPL_ALPHA temp[49].x EX2, src0.w 43: src0.xyz = temp[49] MAX temp[50].x, src0.x__, src0.0__ 44: src0.xyz = temp[41], src1.xyz = temp[50] MAD temp[51].xyz, src0.xyz, src1.xxx, src0.000 45: src0.xyz = temp[51], src0.w = temp[24] MAD temp[52].xyz, src0.xyz, src0.www, src0.000 46: src0.xyz = temp[52], src0.w = input[0], src1.xyz = temp[64] MAD temp[65].xyz, src0.xyz, src0.www, src1.xyz 47: IF aluresult.x___; 48: src0.xyz = const[7] SEM_WAIT MAD temp[69].x, src0.1__, src0.111, -src0.x__ 49: src0.xyz = temp[40], src1.xyz = temp[65], src2.xyz = temp[69], srcp.xyz = (src1 + src0) SEM_WAIT MAD temp[70].xyz, srcp.xyz, src2.xxx, src0.000 50: src0.xyz = temp[68], src1.xyz = const[7], src2.xyz = temp[70] SEM_WAIT MAD temp[13].xyz, src0.xyz, src1.xxx, src2.xyz 51: ELSE; 52: src0.xyz = temp[40], src1.xyz = temp[65], src2.xyz = temp[68], srcp.xyz = (src1 + src0) SEM_WAIT MAD temp[13].xyz, srcp.xyz, src2.xyz, src0.000 53: ENDIF; 54: src0.xyz = temp[13], src0.w = temp[13] SEM_WAIT MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000 MAD_SAT color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'register allocation' # Radeon Compiler Program 0: src0.xyz = input[3], src1.xyz = const[11] MAD temp[3].z, src0.__x, src0.111, src0.000 MAD temp[3].w, src1.x, src0.1, src0.0 1: src0.xyz = input[2], src0.w = input[2] MAD temp[3].xy, src0.zw_, src0.111, src0.000 2: src0.xyz = temp[3] DP3 temp[4].x, src0.xyz, src0.xyz 3: src0.xyz = temp[4] REPL_ALPHA temp[4].x RSQ, |src0.x| 4: src0.xyz = temp[3], src1.xyz = temp[4] MAD temp[3].xyz, src0.xyz, src1.xxx, src0.000 5: src0.xyz = input[2] MAD temp[2].yz, src0._xy, src0.111, src0.000 6: src0.w = input[1] MAD temp[2].x, src0.w__, src0.111, src0.000 7: src0.xyz = temp[2] DP3 temp[4].x, src0.xyz, src0.xyz 8: src0.xyz = temp[4] REPL_ALPHA temp[4].x RSQ, |src0.x| 9: src0.xyz = temp[2], src1.xyz = temp[4] MAD temp[2].xyz, src0.xyz, src1.xxx, src0.000 10: src0.xyz = input[0] DP3 temp[4].x, src0.xyz, src0.xyz 11: src0.xyz = temp[4] REPL_ALPHA temp[4].x RSQ, |src0.x| 12: src0.xyz = input[0], src1.xyz = temp[4] MAD temp[4].xyz, src0.xyz, src1.xxx, src0.000 13: src0.xyz = temp[4], src1.xyz = temp[3], srcp.xyz = (src1 + src0) DP3 temp[5].x, srcp.xyz, srcp.xyz 14: src0.xyz = temp[2], src1.xyz = temp[4] DP3 temp[5].y, src0.xyz, src1.xyz 15: src0.xyz = const[13], src1.xyz = const[1], src2.xyz = temp[5] MAD temp[6].xyz, src0.xyz, src1.xxx, src0.000 MAX temp[2].w, src2.y, src0.0 16: src0.xyz = const[14], src1.xyz = const[1], src2.xyz = temp[6] MAD temp[6].xyz, src0.xyz, src1.yyy, src2.xyz 17: src0.xyz = const[15], src1.xyz = const[1], src2.xyz = temp[6] MAD temp[6].xyz, src0.xyz, src1.zzz, src2.xyz 18: src0.xyz = temp[6] DP3 temp[5].y, src0.xyz, src0.xyz 19: src0.xyz = const[12], src1.xyz = const[2], src2.xyz = temp[5] MAD temp[7].xyz, src0.xyz, src1.xyz, src0.000 RSQ temp[4].w, |src2.y| 20: src0.xyz = temp[6], src0.w = temp[4] MAD temp[6].xyz, src0.xyz, src0.www, src0.000 21: src0.xyz = temp[6], src1.xyz = temp[3], srcp.xyz = (src1 + src0) DP3 temp[5].y, srcp.xyz, srcp.xyz 22: src0.xyz = temp[2], src1.xyz = temp[6] DP3 temp[5].z, src0.xyz, src1.xyz 23: src0.xyz = const[9], src1.xyz = const[2], src2.xyz = temp[5] MAD temp[8].xyz, src0.xyz, src1.xyz, src0.000 MAX temp[4].w, src2.z, src0.0 24: src0.xyz = temp[7], src0.w = temp[4] MAD temp[7].xyz, src0.xyz, src0.www, src0.000 25: src0.xyz = const[9], src1.xyz = const[0], src2.xyz = temp[5] MAD temp[9].xyz, src0.xyz, src1.xyz, src0.000 RSQ temp[5].w, |src2.y| 26: src0.xyz = temp[6], src0.w = temp[5], src1.xyz = temp[3], srcp.xyz = (src1 + src0) MAD temp[6].xyz, srcp.xyz, src0.www, src0.000 27: src0.xyz = temp[2], src1.xyz = temp[6] DP3 temp[5].y, src0.xyz, src1.xyz 28: src0.xyz = const[5], src1.xyz = input[1], src2.xyz = temp[5] MAD temp[6].x, src0.x__, src1.x__, src0.000 MAX temp[5].w, src2.y, src0.0 29: src0.xyz = input[1], src0.w = temp[5] MAD temp[6].yz, src0._yz, src0.111, src0.000 LG2 temp[1].w, src0.w 30: BEGIN_TEX; 31: TEX temp[1].xyz, temp[6].xyz_, CUBE[0] SEM_WAIT SEM_ACQUIRE; 32: src0.xyz = const[4], src0.w = temp[1], src1.xyz = const[8] MAD aluresult, src0.x__, src0.111, -src0.1__ MAD temp[1].w, src0.w, src1.x, src0.0 [aluresult = (result == 0)] 33: src0.xyz = const[12], src1.xyz = const[0], src2.xyz = temp[5] MAD temp[5].xyz, src0.xyz, src1.xyz, src0.000 RSQ temp[5].w, |src2.x| 34: src0.xyz = temp[4], src0.w = temp[5], src1.xyz = temp[3], srcp.xyz = (src1 + src0) MAD temp[3].xyz, srcp.xyz, src0.www, src0.000 35: src0.xyz = temp[2], src1.xyz = temp[3] DP3 temp[2].x, src0.xyz, src1.xyz 36: src0.xyz = temp[5], src0.w = temp[2], src1.w = temp[1] MAD temp[3].xyz, src0.xyz, src0.www, src0.000 EX2 temp[1].w, src1.w 37: src0.xyz = temp[3], src0.w = input[0], src1.xyz = temp[7], src2.xyz = temp[2] MAD temp[2].xyz, src0.xyz, src0.www, src1.xyz MAX temp[5].w, src2.x, src0.0 38: src0.xyz = const[3], src1.xyz = const[10], src2.xyz = temp[2] MAD temp[2].xyz, src0.xyz, src1.xyz, src2.xyz 39: src0.w = temp[1], src1.w = temp[5] MAX temp[3].x, src0.w__, src0.0__ LG2 temp[1].w, src1.w 40: src0.xyz = temp[8], src0.w = temp[1], src1.xyz = temp[3], src2.xyz = const[8] MAD temp[3].xyz, src0.xyz, src1.xxx, src0.000 MAD temp[1].w, src0.w, src2.x, src0.0 41: src0.xyz = temp[3], src0.w = temp[4] MAD temp[3].xyz, src0.xyz, src0.www, src0.000 42: src0.w = temp[1] REPL_ALPHA temp[4].x EX2, src0.w 43: src0.xyz = temp[4] MAX temp[4].x, src0.x__, src0.0__ 44: src0.xyz = temp[9], src1.xyz = temp[4] MAD temp[4].xyz, src0.xyz, src1.xxx, src0.000 45: src0.xyz = temp[4], src0.w = temp[2] MAD temp[4].xyz, src0.xyz, src0.www, src0.000 46: src0.xyz = temp[4], src0.w = input[0], src1.xyz = temp[3] MAD temp[0].xyz, src0.xyz, src0.www, src1.xyz 47: IF aluresult.x___; 48: src0.xyz = const[7] SEM_WAIT MAD temp[3].x, src0.1__, src0.1__, -src0.x__ 49: src0.xyz = temp[2], src1.xyz = temp[0], src2.xyz = temp[3], srcp.xyz = (src1 + src0) SEM_WAIT MAD temp[3].xyz, srcp.xyz, src2.xxx, src0.000 50: src0.xyz = temp[1], src1.xyz = const[7], src2.xyz = temp[3] SEM_WAIT MAD temp[3].xyz, src0.xyz, src1.xxx, src2.xyz 51: ELSE; 52: src0.xyz = temp[2], src1.xyz = temp[0], src2.xyz = temp[1], srcp.xyz = (src1 + src0) SEM_WAIT MAD temp[3].xyz, srcp.xyz, src2.xyz, src0.000 53: ENDIF; 54: src0.xyz = temp[3], src0.w = temp[3] SEM_WAIT MAD_SAT color[0].xyz, src0.xyz, src0.111, src0.000 MAD_SAT color[0].w, src0.w, src0.1, src0.0 R500 Fragment Program: -------- 0 0:CMN_INST 0x00006000:ALU wmask: AB omask: NONE 1:RGB_ADDR 0x08042c03:Addr0: 3t, Addr1: 11c, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0090:rgb_A_src:0 0/0/R 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c01030:MAD dest:3 alp_A_src:1 R 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490030:MAD dest:3 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 1 0:CMN_INST 0x00001800:ALU wmask: RG omask: NONE 1:RGB_ADDR 0x08020002:Addr0: 2t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020002:Addr0: 2t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0468:rgb_A_src:0 B/A/0 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490030:MAD dest:3 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 2 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08020003:Addr0: 3t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00440220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 R/G/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00000041:DP3 dest:4 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 3 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08020004:Addr0: 4t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00000000:rgb_A_src:0 R/R/R 0 rgb_B_src:0 R/R/R 0 targ: 0 4 ALPHA_INST:0x0004000b:RSQ dest:0 alp_A_src:0 R 2 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x0000004a:SOP dest:4 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 4 0:CMN_INST 0x00003800:ALU wmask: RGB omask: NONE 1:RGB_ADDR 0x08001003:Addr0: 3t, Addr1: 4t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00002220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/R/R 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490030:MAD dest:3 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 5 0:CMN_INST 0x00003000:ALU wmask: GB omask: NONE 1:RGB_ADDR 0x08020002:Addr0: 2t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0110:rgb_A_src:0 0/R/G 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490020:MAD dest:2 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 6 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020001:Addr0: 1t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db048c:rgb_A_src:0 A/0/0 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490020:MAD dest:2 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 7 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08020002:Addr0: 2t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00440220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 R/G/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00000041:DP3 dest:4 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 8 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08020004:Addr0: 4t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00000000:rgb_A_src:0 R/R/R 0 rgb_B_src:0 R/R/R 0 targ: 0 4 ALPHA_INST:0x0004000b:RSQ dest:0 alp_A_src:0 R 2 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x0000004a:SOP dest:4 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 9 0:CMN_INST 0x00003800:ALU wmask: RGB omask: NONE 1:RGB_ADDR 0x08001002:Addr0: 2t, Addr1: 4t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00002220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/R/R 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490020:MAD dest:2 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 10 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00440220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 R/G/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00000041:DP3 dest:4 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 11 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08020004:Addr0: 4t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00000000:rgb_A_src:0 R/R/R 0 rgb_B_src:0 R/R/R 0 targ: 0 4 ALPHA_INST:0x0004000b:RSQ dest:0 alp_A_src:0 R 2 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x0000004a:SOP dest:4 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 12 0:CMN_INST 0x00003a00:ALU NOP wmask: RGB omask: NONE 1:RGB_ADDR 0x08001000:Addr0: 0t, Addr1: 4t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00002220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/R/R 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490040:MAD dest:4 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 13 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x88000c04:Addr0: 4t, Addr1: 3t, Addr2: 128t, srcp:2 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00446223:rgb_A_src:3 R/G/B 0 rgb_B_src:3 R/G/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00000051:DP3 dest:5 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 14 0:CMN_INST 0x00001000:ALU wmask: G omask: NONE 1:RGB_ADDR 0x08001002:Addr0: 2t, Addr1: 4t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00442220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/G/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00000051:DP3 dest:5 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 15 0:CMN_INST 0x00007800:ALU wmask: ARGB omask: NONE 1:RGB_ADDR 0x0054050d:Addr0: 13c, Addr1: 1c, Addr2: 5t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00002220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/R/R 0 targ: 0 4 ALPHA_INST:0x00806023:MAX dest:2 alp_A_src:2 G 0 alp_B_src:0 0 0 targ 0 w:0 5 RGBA_INST: 0x00490060:MAD dest:6 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 16 0:CMN_INST 0x00003800:ALU wmask: RGB omask: NONE 1:RGB_ADDR 0x0064050e:Addr0: 14c, Addr1: 1c, Addr2: 6t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x0024a220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 G/G/G 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00222060:MAD dest:6 rgb_C_src:2 R/G/B 0 alp_C_src:0 R 0 17 0:CMN_INST 0x00003800:ALU wmask: RGB omask: NONE 1:RGB_ADDR 0x0064050f:Addr0: 15c, Addr1: 1c, Addr2: 6t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00492220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 B/B/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00222060:MAD dest:6 rgb_C_src:2 R/G/B 0 alp_C_src:0 R 0 18 0:CMN_INST 0x00001000:ALU wmask: G omask: NONE 1:RGB_ADDR 0x08020006:Addr0: 6t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00440220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 R/G/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00000051:DP3 dest:5 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 19 0:CMN_INST 0x00007800:ALU wmask: ARGB omask: NONE 1:RGB_ADDR 0x0054090c:Addr0: 12c, Addr1: 2c, Addr2: 5t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00442220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/G/B 0 targ: 0 4 ALPHA_INST:0x0004604b:RSQ dest:4 alp_A_src:2 G 2 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490070:MAD dest:7 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 20 0:CMN_INST 0x00003a00:ALU NOP wmask: RGB omask: NONE 1:RGB_ADDR 0x08020006:Addr0: 6t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020004:Addr0: 4t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x006d8220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 A/A/A 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490060:MAD dest:6 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 21 0:CMN_INST 0x00001000:ALU wmask: G omask: NONE 1:RGB_ADDR 0x88000c06:Addr0: 6t, Addr1: 3t, Addr2: 128t, srcp:2 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00446223:rgb_A_src:3 R/G/B 0 rgb_B_src:3 R/G/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00000051:DP3 dest:5 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 22 0:CMN_INST 0x00002000:ALU wmask: B omask: NONE 1:RGB_ADDR 0x08001802:Addr0: 2t, Addr1: 6t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00442220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/G/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00000051:DP3 dest:5 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 23 0:CMN_INST 0x00007800:ALU wmask: ARGB omask: NONE 1:RGB_ADDR 0x00540909:Addr0: 9c, Addr1: 2c, Addr2: 5t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00442220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/G/B 0 targ: 0 4 ALPHA_INST:0x0080a043:MAX dest:4 alp_A_src:2 B 0 alp_B_src:0 0 0 targ 0 w:0 5 RGBA_INST: 0x00490080:MAD dest:8 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 24 0:CMN_INST 0x00003800:ALU wmask: RGB omask: NONE 1:RGB_ADDR 0x08020007:Addr0: 7t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020004:Addr0: 4t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x006d8220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 A/A/A 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490070:MAD dest:7 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 25 0:CMN_INST 0x00007800:ALU wmask: ARGB omask: NONE 1:RGB_ADDR 0x00540109:Addr0: 9c, Addr1: 0c, Addr2: 5t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00442220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/G/B 0 targ: 0 4 ALPHA_INST:0x0004605b:RSQ dest:5 alp_A_src:2 G 2 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490090:MAD dest:9 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 26 0:CMN_INST 0x00003800:ALU wmask: RGB omask: NONE 1:RGB_ADDR 0x88000c06:Addr0: 6t, Addr1: 3t, Addr2: 128t, srcp:2 2:ALPHA_ADDR 0x08020005:Addr0: 5t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x006d8223:rgb_A_src:3 R/G/B 0 rgb_B_src:0 A/A/A 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490060:MAD dest:6 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 27 0:CMN_INST 0x00001000:ALU wmask: G omask: NONE 1:RGB_ADDR 0x08001802:Addr0: 2t, Addr1: 6t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00442220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/G/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00000051:DP3 dest:5 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 28 0:CMN_INST 0x00004800:ALU wmask: AR omask: NONE 1:RGB_ADDR 0x00500505:Addr0: 5c, Addr1: 1t, Addr2: 5t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00902480:rgb_A_src:0 R/0/0 0 rgb_B_src:1 R/0/0 0 targ: 0 4 ALPHA_INST:0x00806053:MAX dest:5 alp_A_src:2 G 0 alp_B_src:0 0 0 targ 0 w:0 5 RGBA_INST: 0x00490060:MAD dest:6 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 29 0:CMN_INST 0x00007000:ALU wmask: AGB omask: NONE 1:RGB_ADDR 0x08020001:Addr0: 1t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020005:Addr0: 5t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0230:rgb_A_src:0 0/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x0000c019:LN2 dest:1 alp_A_src:0 A 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490060:MAD dest:6 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 30 0:CMN_INST 0x00003807:TEX TEX_WAIT wmask: RGB omask: NONE 1:TEX_INST: 0x02400000: id: 0 op:LD, ACQ, SCALED 2:TEX_ADDR: 0xe401e406: src: 6 R/G/B/A dst: 1 R/G/B/A 3:TEX_DXDY: 0x00000000 31 0:CMN_INST 0x00004000:ALU wmask: A omask: NONE 1:RGB_ADDR 0x08042104:Addr0: 4c, Addr1: 8c, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020001:Addr0: 1t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x80db0480:rgb_A_src:0 R/0/0 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x0008c010:MAD dest:1 alp_A_src:0 A 0 alp_B_src:1 R 0 targ 0 w:0 5 RGBA_INST: 0x20c98010:MAD dest:1 rgb_C_src:0 1/0/0 1 alp_C_src:0 0 0 32 0:CMN_INST 0x00007800:ALU wmask: ARGB omask: NONE 1:RGB_ADDR 0x0054010c:Addr0: 12c, Addr1: 0c, Addr2: 5t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00442220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/G/B 0 targ: 0 4 ALPHA_INST:0x0004205b:RSQ dest:5 alp_A_src:2 R 2 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490050:MAD dest:5 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 33 0:CMN_INST 0x00003800:ALU wmask: RGB omask: NONE 1:RGB_ADDR 0x88000c04:Addr0: 4t, Addr1: 3t, Addr2: 128t, srcp:2 2:ALPHA_ADDR 0x08020005:Addr0: 5t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x006d8223:rgb_A_src:3 R/G/B 0 rgb_B_src:0 A/A/A 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490030:MAD dest:3 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 34 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08000c02:Addr0: 2t, Addr1: 3t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00442220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/G/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00000021:DP3 dest:2 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 35 0:CMN_INST 0x00007800:ALU wmask: ARGB omask: NONE 1:RGB_ADDR 0x08020005:Addr0: 5t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08000402:Addr0: 2t, Addr1: 1t, Addr2: 128t, srcp:0 3 RGB_INST: 0x006d8220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 A/A/A 0 targ: 0 4 ALPHA_INST:0x0000d018:EX2 dest:1 alp_A_src:1 A 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490030:MAD dest:3 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 36 0:CMN_INST 0x00007800:ALU wmask: ARGB omask: NONE 1:RGB_ADDR 0x00201c03:Addr0: 3t, Addr1: 7t, Addr2: 2t, srcp:0 2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x006d8220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 A/A/A 0 targ: 0 4 ALPHA_INST:0x00802053:MAX dest:5 alp_A_src:2 R 0 alp_B_src:0 0 0 targ 0 w:0 5 RGBA_INST: 0x00221020:MAD dest:2 rgb_C_src:1 R/G/B 0 alp_C_src:0 R 0 37 0:CMN_INST 0x00003800:ALU wmask: RGB omask: NONE 1:RGB_ADDR 0x00242903:Addr0: 3c, Addr1: 10c, Addr2: 2t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00442220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/G/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00222020:MAD dest:2 rgb_C_src:2 R/G/B 0 alp_C_src:0 R 0 38 0:CMN_INST 0x00004800:ALU wmask: AR omask: NONE 1:RGB_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08001401:Addr0: 1t, Addr1: 5t, Addr2: 128t, srcp:0 3 RGB_INST: 0x0092048c:rgb_A_src:0 A/0/0 0 rgb_B_src:0 0/0/0 0 targ: 0 4 ALPHA_INST:0x0000d019:LN2 dest:1 alp_A_src:1 A 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00000035:MAX dest:3 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 39 0:CMN_INST 0x00007800:ALU wmask: ARGB omask: NONE 1:RGB_ADDR 0x10800c08:Addr0: 8t, Addr1: 3t, Addr2: 8c, srcp:0 2:ALPHA_ADDR 0x08020001:Addr0: 1t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00002220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/R/R 0 targ: 0 4 ALPHA_INST:0x0010c010:MAD dest:1 alp_A_src:0 A 0 alp_B_src:2 R 0 targ 0 w:0 5 RGBA_INST: 0x20490030:MAD dest:3 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 40 0:CMN_INST 0x00003800:ALU wmask: RGB omask: NONE 1:RGB_ADDR 0x08020003:Addr0: 3t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020004:Addr0: 4t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x006d8220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 A/A/A 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490030:MAD dest:3 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 41 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020001:Addr0: 1t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00000000:rgb_A_src:0 R/R/R 0 rgb_B_src:0 R/R/R 0 targ: 0 4 ALPHA_INST:0x0000c008:EX2 dest:0 alp_A_src:0 A 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x0000004a:SOP dest:4 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 42 0:CMN_INST 0x00000800:ALU wmask: R omask: NONE 1:RGB_ADDR 0x08020004:Addr0: 4t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00920480:rgb_A_src:0 R/0/0 0 rgb_B_src:0 0/0/0 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00000045:MAX dest:4 rgb_C_src:0 R/R/R 0 alp_C_src:0 R 0 43 0:CMN_INST 0x00003800:ALU wmask: RGB omask: NONE 1:RGB_ADDR 0x08001009:Addr0: 9t, Addr1: 4t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00002220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/R/R 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490040:MAD dest:4 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 44 0:CMN_INST 0x00003800:ALU wmask: RGB omask: NONE 1:RGB_ADDR 0x08020004:Addr0: 4t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020002:Addr0: 2t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x006d8220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 A/A/A 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490040:MAD dest:4 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 45 0:CMN_INST 0x00003800:ALU wmask: RGB omask: NONE 1:RGB_ADDR 0x08000c04:Addr0: 4t, Addr1: 3t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x006d8220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 A/A/A 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00221000:MAD dest:0 rgb_C_src:1 R/G/B 0 alp_C_src:0 R 0 46 0:CMN_INST 0x00000402:FC ALU WAIT wmask: NONE omask: NONE 2:FC_INST 0x1a000f00:0x0f 0 JUMP NONE INCR INCR 0 0 51 IGN_UNC 3:FC_ADDR 0x00330000:BOOL: 0x00, INT: 0x00, JUMP_ADDR: 51, JMP_GLBL: 0 47 0:CMN_INST 0x00000804:ALU TEX_WAIT wmask: R omask: NONE 1:RGB_ADDR 0x08020107:Addr0: 7c, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00930498:rgb_A_src:0 1/0/0 0 rgb_B_src:0 1/0/0 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00c80030:MAD dest:3 rgb_C_src:0 R/0/0 1 alp_C_src:0 R 0 48 0:CMN_INST 0x00003804:ALU TEX_WAIT wmask: RGB omask: NONE 1:RGB_ADDR 0x80300002:Addr0: 2t, Addr1: 0t, Addr2: 3t, srcp:2 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00004223:rgb_A_src:3 R/G/B 0 rgb_B_src:2 R/R/R 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490030:MAD dest:3 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 49 0:CMN_INST 0x00003804:ALU TEX_WAIT wmask: RGB omask: NONE 1:RGB_ADDR 0x00341c01:Addr0: 1t, Addr1: 7c, Addr2: 3t, srcp:0 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00002220:rgb_A_src:0 R/G/B 0 rgb_B_src:1 R/R/R 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00222030:MAD dest:3 rgb_C_src:2 R/G/B 0 alp_C_src:0 R 0 50 0:CMN_INST 0x00000402:FC ALU WAIT wmask: NONE omask: NONE 2:FC_INST 0x04010010:0x00 0 JUMP NONE NONE DECR 1 1 53 3:FC_ADDR 0x00350000:BOOL: 0x00, INT: 0x00, JUMP_ADDR: 53, JMP_GLBL: 0 51 0:CMN_INST 0x00003804:ALU TEX_WAIT wmask: RGB omask: NONE 1:RGB_ADDR 0x80100002:Addr0: 2t, Addr1: 0t, Addr2: 1t, srcp:2 2:ALPHA_ADDR 0x08020080:Addr0: 128t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00444223:rgb_A_src:3 R/G/B 0 rgb_B_src:2 R/G/B 0 targ: 0 4 ALPHA_INST:0x00000000:MAD dest:0 alp_A_src:0 R 0 alp_B_src:0 R 0 targ 0 w:0 5 RGBA_INST: 0x00490030:MAD dest:3 rgb_C_src:0 0/0/0 0 alp_C_src:0 R 0 52 0:CMN_INST 0x00000402:FC ALU WAIT wmask: NONE omask: NONE 2:FC_INST 0x01010020:0x00 1 JUMP NONE DECR NONE 1 0 53 3:FC_ADDR 0x00350000:BOOL: 0x00, INT: 0x00, JUMP_ADDR: 53, JMP_GLBL: 0 53 0:CMN_INST 0x001f8005:OUT TEX_WAIT wmask: NONE omask: ARGB 1:RGB_ADDR 0x08020003:Addr0: 3t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020003:Addr0: 3t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 r300: Initial fragment program FRAG DCL IN[0], GENERIC[0], LINEAR DCL OUT[0], COLOR DCL SAMP[0] 0: TEX OUT[0], IN[0], SAMP[0], CUBE 1: END Fragment Program: before compilation # Radeon Compiler Program 0: TEX output[0], input[0], CUBE[0]; Fragment Program: after 'rewrite depth out' # Radeon Compiler Program 0: TEX output[0], input[0], CUBE[0]; Fragment Program: after 'transform KILP' # Radeon Compiler Program 0: TEX output[0], input[0], CUBE[0]; Fragment Program: after 'unroll loops' # Radeon Compiler Program 0: TEX output[0], input[0], CUBE[0]; Fragment Program: after 'transform TEX' # Radeon Compiler Program 0: TEX temp[1], input[0], CUBE[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'transform IF' # Radeon Compiler Program 0: TEX temp[1], input[0], CUBE[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'native rewrite' # Radeon Compiler Program 0: TEX temp[1], input[0], CUBE[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'deadcode' # Radeon Compiler Program 0: TEX temp[1], input[0].xyz_, CUBE[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'register rename' # Radeon Compiler Program 0: TEX temp[0], input[0].xyz_, CUBE[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'dataflow optimize' # Radeon Compiler Program 0: TEX temp[0], input[0].xyz_, CUBE[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'dataflow swizzles' # Radeon Compiler Program 0: TEX temp[0], input[0].xyz_, CUBE[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'dead constants' # Radeon Compiler Program 0: TEX temp[0], input[0].xyz_, CUBE[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'pair translate' # Radeon Compiler Program 0: TEX temp[0], input[0].xyz_, CUBE[0]; 1: src0.xyz = temp[0], src0.w = temp[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'pair scheduling' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[0], input[0].xyz_, CUBE[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'dead sources' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[0], input[0].xyz_, CUBE[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'register allocation' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[0], input[0].xyz_, CUBE[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 R500 Fragment Program: -------- 0 0:CMN_INST 0x00007807:TEX TEX_WAIT wmask: ARGB omask: NONE 1:TEX_INST: 0x02400000: id: 0 op:LD, ACQ, SCALED 2:TEX_ADDR: 0xe400e400: src: 0 R/G/B/A dst: 0 R/G/B/A 3:TEX_DXDY: 0x00000000 1 0:CMN_INST 0x00078005:OUT TEX_WAIT wmask: NONE omask: ARGB 1:RGB_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 r300: Initial fragment program FRAG DCL IN[0], GENERIC[0], LINEAR DCL OUT[0], COLOR DCL SAMP[0] 0: TEX OUT[0], IN[0], SAMP[0], 2D 1: END Fragment Program: before compilation # Radeon Compiler Program 0: TEX output[0], input[0], 2D[0]; Fragment Program: after 'rewrite depth out' # Radeon Compiler Program 0: TEX output[0], input[0], 2D[0]; Fragment Program: after 'transform KILP' # Radeon Compiler Program 0: TEX output[0], input[0], 2D[0]; Fragment Program: after 'unroll loops' # Radeon Compiler Program 0: TEX output[0], input[0], 2D[0]; Fragment Program: after 'transform TEX' # Radeon Compiler Program 0: TEX temp[1], input[0], 2D[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'transform IF' # Radeon Compiler Program 0: TEX temp[1], input[0], 2D[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'native rewrite' # Radeon Compiler Program 0: TEX temp[1], input[0], 2D[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'deadcode' # Radeon Compiler Program 0: TEX temp[1], input[0].xy__, 2D[0]; 1: MOV output[0], temp[1]; Fragment Program: after 'register rename' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'dataflow optimize' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'dataflow swizzles' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'dead constants' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: MOV output[0], temp[0]; Fragment Program: after 'pair translate' # Radeon Compiler Program 0: TEX temp[0], input[0].xy__, 2D[0]; 1: src0.xyz = temp[0], src0.w = temp[0] MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'pair scheduling' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[0], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'dead sources' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[0], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 Fragment Program: after 'register allocation' # Radeon Compiler Program 0: BEGIN_TEX; 1: TEX temp[0], input[0].xy__, 2D[0] SEM_WAIT SEM_ACQUIRE; 2: src0.xyz = temp[0], src0.w = temp[0] SEM_WAIT MAD color[0].xyz, src0.xyz, src0.111, src0.000 MAD color[0].w, src0.w, src0.1, src0.0 R500 Fragment Program: -------- 0 0:CMN_INST 0x00007807:TEX TEX_WAIT wmask: ARGB omask: NONE 1:TEX_INST: 0x02400000: id: 0 op:LD, ACQ, SCALED 2:TEX_ADDR: 0xe400f400: src: 0 R/G/A/A dst: 0 R/G/B/A 3:TEX_DXDY: 0x00000000 1 0:CMN_INST 0x00078005:OUT TEX_WAIT wmask: NONE omask: ARGB 1:RGB_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 2:ALPHA_ADDR 0x08020000:Addr0: 0t, Addr1: 128t, Addr2: 128t, srcp:0 3 RGB_INST: 0x00db0220:rgb_A_src:0 R/G/B 0 rgb_B_src:0 1/1/1 0 targ: 0 4 ALPHA_INST:0x00c0c000:MAD dest:0 alp_A_src:0 A 0 alp_B_src:0 1 0 targ 0 w:0 5 RGBA_INST: 0x20490000:MAD dest:0 rgb_C_src:0 0/0/0 0 alp_C_src:0 0 0 radeon: Released access to AA optimizations. context mis-match in pipe_sampler_view_release()