[    5.677778] [drm:radeon_pm_print_states], 3 Power State(s)
[    5.677781] [drm:radeon_pm_print_states], State 0: 
[    5.677784] [drm:radeon_pm_print_states], 	Default
[    5.677787] [drm:radeon_pm_print_states], 	8 PCIE Lanes
[    5.677792] [drm:radeon_pm_print_states], 	3 Clock Mode(s)
[    5.677794] [drm:radeon_pm_print_states], 		0 e: 600000	m: 793750	v: 1000
[    5.677798] [drm:radeon_pm_print_states], 		1 e: 600000	m: 793750	v: 1000
[    5.677801] [drm:radeon_pm_print_states], 		2 e: 600000	m: 793750	v: 1000
[    5.677804] [drm:radeon_pm_print_states], State 1: Performance
[    5.677806] [drm:radeon_pm_print_states], 	8 PCIE Lanes
[    5.677808] [drm:radeon_pm_print_states], 	3 Clock Mode(s)
[    5.677811] [drm:radeon_pm_print_states], 		0 e: 100000	m: 150000	v: 900
[    5.677814] [drm:radeon_pm_print_states], 		1 e: 400000	m: 793750	v: 1000
[    5.677817] [drm:radeon_pm_print_states], 		2 e: 600000	m: 793750	v: 1000
[    5.677820] [drm:radeon_pm_print_states], State 2: 
[    5.677822] [drm:radeon_pm_print_states], 	8 PCIE Lanes
[    5.677825] [drm:radeon_pm_print_states], 	3 Clock Mode(s)
[    5.677827] [drm:radeon_pm_print_states], 		0 e: 600000	m: 793750	v: 1000
[    5.677830] [drm:radeon_pm_print_states], 		1 e: 600000	m: 793750	v: 1000
[    5.677833] [drm:radeon_pm_print_states], 		2 e: 600000	m: 793750	v: 1000