diff --git a/src/i965_output_dri.c b/src/i965_output_dri.c
index 6583802..b52dd17 100644
--- a/src/i965_output_dri.c
+++ b/src/i965_output_dri.c
@@ -184,6 +184,9 @@ i965_put_surface_dri(
     if ((flags & VA_FILTER_SCALING_MASK) == VA_FILTER_SCALING_NL_ANAMORPHIC)
         pp_flag |= I965_PP_FLAG_AVS;
 
+    if ((flags & VA_FILTER_SCALING_MASK) == VA_FILTER_SCALING_FAST)
+        pp_flag |= I965_PP_FLAG_FAST;
+
     if (flags & VA_TOP_FIELD)
         pp_flag |= I965_PP_FLAG_TOP_FIELD;
     else if (flags & VA_BOTTOM_FIELD)
diff --git a/src/i965_post_processing.h b/src/i965_post_processing.h
index 69c29d7..b76549a 100755
--- a/src/i965_post_processing.h
+++ b/src/i965_post_processing.h
@@ -35,6 +35,7 @@
 #define I965_PP_FLAG_BOTTOM_FIELD       2
 #define I965_PP_FLAG_MCDI               4
 #define I965_PP_FLAG_AVS                8
+#define I965_PP_FLAG_FAST              16
 
 enum
 {
diff --git a/src/i965_render.c b/src/i965_render.c
index 34c6789..feefe18 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -2960,7 +2960,7 @@ gen7_render_put_surface(
 
     gen7_render_initialize(ctx);
     gen7_render_setup_states(ctx, surface, src_rect, dst_rect, flags);
-    i965_clear_dest_region(ctx);
+//    i965_clear_dest_region(ctx);
     gen7_render_emit_states(ctx, PS_KERNEL);
     intel_batchbuffer_flush(batch);
 }
@@ -3046,6 +3046,53 @@ intel_render_put_surface(
 )
 {
     struct i965_driver_data *i965 = i965_driver_data(ctx);
+    if (flags & I965_PP_FLAG_FAST) {
+        struct i965_render_state *render_state = &i965->render_state;
+        struct intel_region *dest_region = render_state->draw_region;
+        VASurfaceID tmp_surface_id = 0; 
+        VAStatus status;
+        VARectangle dest_rect;
+        struct object_surface *obj_surface;
+        struct i965_surface src_surface;
+        struct i965_surface dst_surface;
+        dri_bo *tmp_bo = NULL;
+
+        status = i965_CreateSurfaces(ctx,
+                                     dest_region->width,
+                                     dest_region->height,
+                                     VA_RT_FORMAT_RGB32,
+                                     1,
+                                     &tmp_surface_id);
+        assert(status == VA_STATUS_SUCCESS);
+        obj_surface = SURFACE(tmp_surface_id);
+        i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC('R', 'G', 'B', 'X'), SUBSAMPLE_RGBX);
+
+        if (dest_region->bo->size >= obj_surface->bo->size) {
+           tmp_bo = obj_surface->bo;
+           obj_surface->bo = dest_region->bo;
+        }
+        src_surface.id = surface;
+        src_surface.type = I965_SURFACE_TYPE_SURFACE;
+        src_surface.flags = I965_SURFACE_FLAG_FRAME;
+        dst_surface.id = tmp_surface_id;
+        dst_surface.type = I965_SURFACE_TYPE_SURFACE;
+        dst_surface.flags = I965_SURFACE_FLAG_FRAME;
+
+        dest_rect.x = 0;
+        dest_rect.y = 0;
+        dest_rect.width = dest_region->width;
+        dest_rect.height = dest_region->height;
+        i965_image_processing(ctx,
+                              &src_surface,
+                              src_rect,
+                              &dst_surface,
+                              dst_rect);
+        if (tmp_bo != NULL) {
+           obj_surface->bo = tmp_bo;
+           tmp_bo = NULL;
+        }
+        i965_DestroySurfaces(ctx, &tmp_surface_id, 1);
+    } else {
     int has_done_scaling = 0;
     VASurfaceID in_surface_id = surface;
     VASurfaceID out_surface_id = i965_post_processing(ctx, surface, src_rect, dst_rect, flags, &has_done_scaling);
@@ -3064,6 +3111,7 @@ intel_render_put_surface(
 
     if (in_surface_id != surface)
         i965_DestroySurfaces(ctx, &in_surface_id, 1);
+    }
 }
 
 void