QDBusConnection: session D-Bus connection created before QCoreApplication. Application may misbehave. kwin(6871) KActivities::ConsumerPrivate::ConsumerPrivate: We are checking whether the service is present true kwin(6871) KActivities::ConsumerPrivate::initializeCachedData: Locking mutex for currentActivity kwin(6871) KActivities::ConsumerPrivate::initializeCachedData: Locking mutex for listActivities kwin(6871) KActivities::ConsumerPrivate::initializeCachedData: Locking mutex for runningActivities kwin(6871) KWin::Extensions::init: Extensions: shape: 0x "11" composite: 0x "4" render: 0x "b" fixes: 0x "50" non_native_pixmaps: true kwin(6871) KDecorationPlugins::canLoad: kwin : path "/usr/lib/kde4/kwin3_oxygen.so" for "kwin3_oxygen" kwin(6871) KWin::Workspace::updateClientArea: screens: 1 desktops: 4 kwin(6871) KWin::Workspace::updateClientArea: Done. QCoreApplication::sendPostedEvents: Cannot send posted events for objects in another thread QCoreApplication::sendPostedEvents: Cannot send posted events for objects in another thread kwin(6871) waitForCallFinished: Trying to lock mutex kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, ASN: 18249647 kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, final: 'ID: 31457576 ;WMCLASS: "plasma" : "plasma" ;Caption: "plasma-desktop" ' : 18249647 kwin(6871) KWin::Workspace::allowClientActivation: Activation: No client active, allowing kwin(6871) KWin::Workspace::updateClientArea: screens: 1 desktops: 4 kwin(6871) KWin::Workspace::updateClientArea: Done. kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, ASN: 4294967295 kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, final: 'ID: 31457558 ;WMCLASS: "plasma" : "plasma" ;Caption: "plasma-desktop" ' : 18446744073709551615 kwin(6871) KWin::Workspace::allowClientActivation: Activation: No client active, allowing kwin(6871) KWin::Workspace::updateClientArea: screens: 1 desktops: 4 kwin(6871) KWin::Workspace::updateClientArea: Done. kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, ASN: 18333213 kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, final: 'ID: 65011900 ;WMCLASS: "firefox" : "navigator" ;Caption: "BASH Shell: How To Redirect stderr To stdout ( redirect stderr to a File ) - Mozilla Firefox" ' : 18333213 kwin(6871) KWin::Workspace::allowClientActivation: Activation: No client active, allowing kwin(6871) KWin::Workspace::updateClientArea: screens: 1 desktops: 4 kwin(6871) KWin::Workspace::updateClientArea: Done. kwin(6871) KWin::Client::checkActivities: no activities!?!? kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, ASN: 18398909 kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, final: 'ID: 35651613 ;WMCLASS: "konsole" : "konsole" ;Caption: "~ : bash – Konsole" ' : 18398909 kwin(6871) KWin::Workspace::allowClientActivation: Activation: No client active, allowing kwin(6871) KWin::Workspace::updateClientArea: screens: 1 desktops: 4 kwin(6871) KWin::Workspace::updateClientArea: Done. kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, ASN: 18383029 kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, final: 'ID: 29360139 ;WMCLASS: "dolphin" : "dolphin" ;Caption: "eugene – Dolphin" ' : 18383029 kwin(6871) KWin::Workspace::allowClientActivation: Activation: No client active, allowing kwin(6871) KWin::Workspace::updateClientArea: screens: 1 desktops: 4 kwin(6871) KWin::Workspace::updateClientArea: Done. kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, ASN: 4294967295 kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, final: 'ID: 31457549 ;WMCLASS: "plasma" : "plasma" ;Caption: "plasma-desktop" ' : 18446744073709551615 kwin(6871) KWin::Workspace::allowClientActivation: Activation: No client active, allowing kwin(6871) KWin::Workspace::updateClientArea: screens: 1 desktops: 4 kwin(6871) KWin::Workspace::updateClientArea: Done. kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, ASN: 4294967295 kwin(6871) KWin::Client::readUserTimeMapTimestamp: User timestamp, final: 'ID: 31457567 ;WMCLASS: "plasma" : "plasma" ;Caption: "plasma-desktop" ' : 18446744073709551615 kwin(6871) KWin::Workspace::allowClientActivation: Activation: No client active, allowing kwin(6871) KWin::Workspace::updateClientArea: screens: 1 desktops: 4 kwin(6871) KWin::Workspace::updateClientArea: Done. kwin(6871) KWin::Workspace::updateClientArea: screens: 1 desktops: 4 kwin(6871) KWin::Workspace::updateClientArea: Done. kwin(6871) KActivities::ConsumerPrivate::listActivitiesCallFinished: Unlocked mutex kwin(6871) KActivities::Consumer::listActivities: Returning listActivities ("d49aafc5-4e01-4abe-9698-d906cd512df0") QCoreApplication::sendPostedEvents: Cannot send posted events for objects in another thread QCoreApplication::sendPostedEvents: Cannot send posted events for objects in another thread kwin(6871) waitForCallFinished: Trying to lock mutex kwin(6871) KActivities::ConsumerPrivate::currentActivityCallFinished: Unlocked mutex kwin(6871) KActivities::Consumer::currentActivity: Returning currentActivity "d49aafc5-4e01-4abe-9698-d906cd512df0" kwin(6871) KActivities::ConsumerPrivate::runningActivitiesCallFinished: Unlocked mutex kwin(6871) KWin::Compositor::slotCompositingOptionsInitialized: Initializing OpenGL compositing kwin(6871) KWin::GlxBackend::initBufferConfigs: Drawable visual (depth 24 ): 0x "140" kwin(6871) KWin::GlxBackend::initBufferConfigs: Drawable visual (depth 32 ): 0x "6a" kwin(6871) KWin::GlxBackend::initBuffer: Buffer visual (depth 24 ): 0x "144" OpenGL vendor string: X.Org OpenGL renderer string: Gallium 0.4 on AMD PITCAIRN OpenGL version string: 2.1 Mesa 9.1.1 OpenGL shading language version string: 1.20 Driver: Unknown GPU class: Unknown OpenGL version: 2.1 GLSL version: 1.20 Mesa version: 9.1.1 X server version: 1.14 Linux kernel version: 3.8.5 Direct rendering: yes Requires strict binding: yes GLSL shaders: yes Texture NPOT support: yes Virtual Machine: no kwin(6871) KWin::GlxBackend::init: DB: true , Direct: true kwin(6871) KWin::SceneOpenGL2::SceneOpenGL2: Color correction: false kwin(6871) KWin::ShaderManager::initShaders: Ortho Shader is valid kwin(6871) KWin::ShaderManager::initShaders: Generic Shader is valid kwin(6871) KWin::ShaderManager::initShaders: Color Shader is valid kwin(6871) KWin::SceneOpenGL2::SceneOpenGL2: OpenGL 2 compositing successfully initialized kwin(6871) KWin::currentRefreshRate: Vertical Refresh rate 60 Hz kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_slidingpopups" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_blur" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_desktopgrid" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_fade" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_slide" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_presentwindows" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_dashboard" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_login" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_outline" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_maximize" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_logout" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_screenshot" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_translucency" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_highlightwindow" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_zoom" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_dialogparent" kwin(6871) KWin::EffectsHandlerImpl::loadEffect: Trying to load "kwin4_effect_minimizeanimation" # Machine code for function main: Post SSA Function Live Ins: %SGPR0_SGPR1 in %vreg0, %SGPR4_SGPR5 in %vreg1, %SGPR2_SGPR3 in %vreg2, %SGPR6 in %vreg3, %VGPR0 in %vreg1035, %VGPR1 in %vreg1036 BB#0: derived from LLVM BB %main_body Live Ins: %SGPR0_SGPR1 %SGPR4_SGPR5 %SGPR2_SGPR3 %SGPR6 %VGPR0 %VGPR1 %vreg1036 = COPY %VGPR1; VReg_32:%vreg1036 %vreg1035 = COPY %VGPR0; VReg_32:%vreg1035 %vreg3 = COPY %SGPR6; SReg_32:%vreg3 %vreg2 = COPY %SGPR2_SGPR3; SReg_64:%vreg2 %vreg1 = COPY %SGPR4_SGPR5; SReg_64:%vreg1 %vreg0 = COPY %SGPR0_SGPR1; SReg_64:%vreg0 %EXEC = S_WQM_B64 %EXEC %vreg1028 = S_MOV_B32 %vreg3; M0Reg:%vreg1028 SReg_32:%vreg3 %vreg8:sub0 = V_INTERP_P1_F32 %vreg1035, 0, 0, %vreg1028, %EXEC; VReg_64:%vreg8 VReg_32:%vreg1035 M0Reg:%vreg1028 %vreg8:sub0 = V_INTERP_P2_F32 %vreg8:sub0, %vreg1036, 0, 0, %vreg1028, %EXEC; VReg_64:%vreg8 VReg_32:%vreg1036 M0Reg:%vreg1028 %vreg8:sub1 = V_INTERP_P1_F32 %vreg1035, 1, 0, %vreg1028, %EXEC; VReg_64:%vreg8 VReg_32:%vreg1035 M0Reg:%vreg1028 %vreg8:sub1 = V_INTERP_P2_F32 %vreg8:sub1, %vreg1036, 1, 0, %vreg1028, %EXEC; VReg_64:%vreg8 VReg_32:%vreg1036 M0Reg:%vreg1028 %vreg10 = V_INTERP_P1_F32 %vreg1035, 3, 0, %vreg1028, %EXEC; VReg_32:%vreg10,%vreg1035 M0Reg:%vreg1028 %vreg10 = V_INTERP_P2_F32 %vreg10, %vreg1036, 3, 0, %vreg1028, %EXEC; VReg_32:%vreg10,%vreg1036 M0Reg:%vreg1028 %vreg11 = V_INTERP_P1_F32 %vreg1035, 2, 0, %vreg1028, %EXEC; VReg_32:%vreg11,%vreg1035 M0Reg:%vreg1028 %vreg11 = V_INTERP_P2_F32 %vreg11, %vreg1036, 2, 0, %vreg1028, %EXEC; VReg_32:%vreg11,%vreg1036 M0Reg:%vreg1028 %vreg12 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%13] SReg_128:%vreg12 SReg_64:%vreg2 %vreg13 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%10] SReg_256:%vreg13 SReg_64:%vreg1 %vreg14 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg8:sub0, %vreg13, %vreg12, %EXEC; VReg_128:%vreg14 VReg_64:%vreg8 SReg_256:%vreg13 SReg_128:%vreg12 %vreg15 = S_LOAD_DWORD_IMM %vreg0, 69; mem:LD4[%42] SReg_32:%vreg15 SReg_64:%vreg0 %vreg17 = COPY %vreg15; VReg_32:%vreg17 SReg_32:%vreg15 %vreg23:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg17, %EXEC; VReg_64:%vreg23,%vreg8 VReg_32:%vreg17 %vreg18 = S_LOAD_DWORD_IMM %vreg0, 68; mem:LD4[%37] SReg_32:%vreg18 SReg_64:%vreg0 %vreg20 = COPY %vreg18; VReg_32:%vreg20 SReg_32:%vreg18 %vreg23:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg20, %EXEC; VReg_64:%vreg23,%vreg8 VReg_32:%vreg20 %vreg25 = S_LOAD_DWORD_IMM %vreg0, 0; mem:LD4[%21] SReg_32:%vreg25 SReg_64:%vreg0 %vreg26 = S_LOAD_DWORD_IMM %vreg0, 1; mem:LD4[%25] SReg_32:%vreg26 SReg_64:%vreg0 %vreg27 = S_LOAD_DWORD_IMM %vreg0, 2; mem:LD4[%29] SReg_32:%vreg27 SReg_64:%vreg0 %vreg28 = S_LOAD_DWORD_IMM %vreg0, 3; mem:LD4[%33] SReg_32:%vreg28 SReg_64:%vreg0 %vreg29 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%54] SReg_128:%vreg29 SReg_64:%vreg2 %vreg30 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%51] SReg_256:%vreg30 SReg_64:%vreg1 %vreg31 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg23:sub0, %vreg30, %vreg29, %EXEC; VReg_128:%vreg31 VReg_64:%vreg23 SReg_256:%vreg30 SReg_128:%vreg29 %vreg33 = S_LOAD_DWORD_IMM %vreg0, 7; mem:LD4[%77] SReg_32:%vreg33 SReg_64:%vreg0 %vreg35 = COPY %vreg33; VReg_32:%vreg35 SReg_32:%vreg33 %vreg34 = V_MUL_F32_e32 %vreg31:sub3, %vreg35, %EXEC; VReg_32:%vreg34,%vreg35 VReg_128:%vreg31 %vreg38 = COPY %vreg28; VReg_32:%vreg38 SReg_32:%vreg28 %vreg37 = V_MUL_F32_e32 %vreg14:sub3, %vreg38, %EXEC; VReg_32:%vreg37,%vreg38 VReg_128:%vreg14 %vreg39 = V_ADD_F32_e32 %vreg34, %vreg37, %EXEC; VReg_32:%vreg39,%vreg34,%vreg37 %vreg40 = S_LOAD_DWORD_IMM %vreg0, 69; mem:LD4[%86] SReg_32:%vreg40 SReg_64:%vreg0 %vreg42 = COPY %vreg40; VReg_32:%vreg42 SReg_32:%vreg40 %vreg48:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg42, %EXEC; VReg_64:%vreg48,%vreg8 VReg_32:%vreg42 %vreg43 = S_LOAD_DWORD_IMM %vreg0, 68; mem:LD4[%82] SReg_32:%vreg43 SReg_64:%vreg0 %vreg45 = COPY %vreg43; VReg_32:%vreg45 SReg_32:%vreg43 %vreg48:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg45, %EXEC; VReg_64:%vreg48,%vreg8 VReg_32:%vreg45 %vreg50 = S_LOAD_DWORD_IMM %vreg0, 4; mem:LD4[%62] SReg_32:%vreg50 SReg_64:%vreg0 %vreg51 = S_LOAD_DWORD_IMM %vreg0, 5; mem:LD4[%67] SReg_32:%vreg51 SReg_64:%vreg0 %vreg52 = S_LOAD_DWORD_IMM %vreg0, 6; mem:LD4[%72] SReg_32:%vreg52 SReg_64:%vreg0 %vreg53 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%97] SReg_128:%vreg53 SReg_64:%vreg2 %vreg54 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%94] SReg_256:%vreg54 SReg_64:%vreg1 %vreg55 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg48:sub0, %vreg54, %vreg53, %EXEC; VReg_128:%vreg55 VReg_64:%vreg48 SReg_256:%vreg54 SReg_128:%vreg53 %vreg57 = S_LOAD_DWORD_IMM %vreg0, 7; mem:LD4[%120] SReg_32:%vreg57 SReg_64:%vreg0 %vreg59 = COPY %vreg57; VReg_32:%vreg59 SReg_32:%vreg57 %vreg58 = V_MUL_F32_e32 %vreg55:sub3, %vreg59, %EXEC; VReg_32:%vreg58,%vreg59 VReg_128:%vreg55 %vreg60 = V_ADD_F32_e32 %vreg58, %vreg39, %EXEC; VReg_32:%vreg60,%vreg58,%vreg39 %vreg61 = S_LOAD_DWORD_IMM %vreg0, 73; mem:LD4[%130] SReg_32:%vreg61 SReg_64:%vreg0 %vreg63 = COPY %vreg61; VReg_32:%vreg63 SReg_32:%vreg61 %vreg69:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg63, %EXEC; VReg_64:%vreg69,%vreg8 VReg_32:%vreg63 %vreg64 = S_LOAD_DWORD_IMM %vreg0, 72; mem:LD4[%125] SReg_32:%vreg64 SReg_64:%vreg0 %vreg66 = COPY %vreg64; VReg_32:%vreg66 SReg_32:%vreg64 %vreg69:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg66, %EXEC; VReg_64:%vreg69,%vreg8 VReg_32:%vreg66 %vreg71 = S_LOAD_DWORD_IMM %vreg0, 4; mem:LD4[%105] SReg_32:%vreg71 SReg_64:%vreg0 %vreg72 = S_LOAD_DWORD_IMM %vreg0, 5; mem:LD4[%110] SReg_32:%vreg72 SReg_64:%vreg0 %vreg73 = S_LOAD_DWORD_IMM %vreg0, 6; mem:LD4[%115] SReg_32:%vreg73 SReg_64:%vreg0 %vreg74 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%142] SReg_128:%vreg74 SReg_64:%vreg2 %vreg75 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%139] SReg_256:%vreg75 SReg_64:%vreg1 %vreg76 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg69:sub0, %vreg75, %vreg74, %EXEC; VReg_128:%vreg76 VReg_64:%vreg69 SReg_256:%vreg75 SReg_128:%vreg74 %vreg78 = S_LOAD_DWORD_IMM %vreg0, 11; mem:LD4[%165] SReg_32:%vreg78 SReg_64:%vreg0 %vreg80 = COPY %vreg78; VReg_32:%vreg80 SReg_32:%vreg78 %vreg79 = V_MUL_F32_e32 %vreg76:sub3, %vreg80, %EXEC; VReg_32:%vreg79,%vreg80 VReg_128:%vreg76 %vreg81 = V_ADD_F32_e32 %vreg79, %vreg60, %EXEC; VReg_32:%vreg81,%vreg79,%vreg60 %vreg82 = S_LOAD_DWORD_IMM %vreg0, 73; mem:LD4[%174] SReg_32:%vreg82 SReg_64:%vreg0 %vreg84 = COPY %vreg82; VReg_32:%vreg84 SReg_32:%vreg82 %vreg90:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg84, %EXEC; VReg_64:%vreg90,%vreg8 VReg_32:%vreg84 %vreg85 = S_LOAD_DWORD_IMM %vreg0, 72; mem:LD4[%170] SReg_32:%vreg85 SReg_64:%vreg0 %vreg87 = COPY %vreg85; VReg_32:%vreg87 SReg_32:%vreg85 %vreg90:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg87, %EXEC; VReg_64:%vreg90,%vreg8 VReg_32:%vreg87 %vreg92 = S_LOAD_DWORD_IMM %vreg0, 8; mem:LD4[%150] SReg_32:%vreg92 SReg_64:%vreg0 %vreg93 = S_LOAD_DWORD_IMM %vreg0, 9; mem:LD4[%155] SReg_32:%vreg93 SReg_64:%vreg0 %vreg94 = S_LOAD_DWORD_IMM %vreg0, 10; mem:LD4[%160] SReg_32:%vreg94 SReg_64:%vreg0 %vreg95 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%185] SReg_128:%vreg95 SReg_64:%vreg2 %vreg96 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%182] SReg_256:%vreg96 SReg_64:%vreg1 %vreg97 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg90:sub0, %vreg96, %vreg95, %EXEC; VReg_128:%vreg97 VReg_64:%vreg90 SReg_256:%vreg96 SReg_128:%vreg95 %vreg99 = S_LOAD_DWORD_IMM %vreg0, 11; mem:LD4[%208] SReg_32:%vreg99 SReg_64:%vreg0 %vreg101 = COPY %vreg99; VReg_32:%vreg101 SReg_32:%vreg99 %vreg100 = V_MUL_F32_e32 %vreg97:sub3, %vreg101, %EXEC; VReg_32:%vreg100,%vreg101 VReg_128:%vreg97 %vreg102 = V_ADD_F32_e32 %vreg100, %vreg81, %EXEC; VReg_32:%vreg102,%vreg100,%vreg81 %vreg103 = S_LOAD_DWORD_IMM %vreg0, 77; mem:LD4[%218] SReg_32:%vreg103 SReg_64:%vreg0 %vreg105 = COPY %vreg103; VReg_32:%vreg105 SReg_32:%vreg103 %vreg111:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg105, %EXEC; VReg_64:%vreg111,%vreg8 VReg_32:%vreg105 %vreg106 = S_LOAD_DWORD_IMM %vreg0, 76; mem:LD4[%213] SReg_32:%vreg106 SReg_64:%vreg0 %vreg108 = COPY %vreg106; VReg_32:%vreg108 SReg_32:%vreg106 %vreg111:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg108, %EXEC; VReg_64:%vreg111,%vreg8 VReg_32:%vreg108 %vreg113 = S_LOAD_DWORD_IMM %vreg0, 8; mem:LD4[%193] SReg_32:%vreg113 SReg_64:%vreg0 %vreg114 = S_LOAD_DWORD_IMM %vreg0, 9; mem:LD4[%198] SReg_32:%vreg114 SReg_64:%vreg0 %vreg115 = S_LOAD_DWORD_IMM %vreg0, 10; mem:LD4[%203] SReg_32:%vreg115 SReg_64:%vreg0 %vreg116 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%230] SReg_128:%vreg116 SReg_64:%vreg2 %vreg117 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%227] SReg_256:%vreg117 SReg_64:%vreg1 %vreg118 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg111:sub0, %vreg117, %vreg116, %EXEC; VReg_128:%vreg118 VReg_64:%vreg111 SReg_256:%vreg117 SReg_128:%vreg116 %vreg120 = S_LOAD_DWORD_IMM %vreg0, 15; mem:LD4[%253] SReg_32:%vreg120 SReg_64:%vreg0 %vreg122 = COPY %vreg120; VReg_32:%vreg122 SReg_32:%vreg120 %vreg121 = V_MUL_F32_e32 %vreg118:sub3, %vreg122, %EXEC; VReg_32:%vreg121,%vreg122 VReg_128:%vreg118 %vreg123 = V_ADD_F32_e32 %vreg121, %vreg102, %EXEC; VReg_32:%vreg123,%vreg121,%vreg102 %vreg124 = S_LOAD_DWORD_IMM %vreg0, 77; mem:LD4[%262] SReg_32:%vreg124 SReg_64:%vreg0 %vreg126 = COPY %vreg124; VReg_32:%vreg126 SReg_32:%vreg124 %vreg132:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg126, %EXEC; VReg_64:%vreg132,%vreg8 VReg_32:%vreg126 %vreg127 = S_LOAD_DWORD_IMM %vreg0, 76; mem:LD4[%258] SReg_32:%vreg127 SReg_64:%vreg0 %vreg129 = COPY %vreg127; VReg_32:%vreg129 SReg_32:%vreg127 %vreg132:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg129, %EXEC; VReg_64:%vreg132,%vreg8 VReg_32:%vreg129 %vreg134 = S_LOAD_DWORD_IMM %vreg0, 12; mem:LD4[%238] SReg_32:%vreg134 SReg_64:%vreg0 %vreg135 = S_LOAD_DWORD_IMM %vreg0, 13; mem:LD4[%243] SReg_32:%vreg135 SReg_64:%vreg0 %vreg136 = S_LOAD_DWORD_IMM %vreg0, 14; mem:LD4[%248] SReg_32:%vreg136 SReg_64:%vreg0 %vreg137 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%273] SReg_128:%vreg137 SReg_64:%vreg2 %vreg138 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%270] SReg_256:%vreg138 SReg_64:%vreg1 %vreg139 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg132:sub0, %vreg138, %vreg137, %EXEC; VReg_128:%vreg139 VReg_64:%vreg132 SReg_256:%vreg138 SReg_128:%vreg137 %vreg141 = S_LOAD_DWORD_IMM %vreg0, 15; mem:LD4[%296] SReg_32:%vreg141 SReg_64:%vreg0 %vreg143 = COPY %vreg141; VReg_32:%vreg143 SReg_32:%vreg141 %vreg142 = V_MUL_F32_e32 %vreg139:sub3, %vreg143, %EXEC; VReg_32:%vreg142,%vreg143 VReg_128:%vreg139 %vreg144 = V_ADD_F32_e32 %vreg142, %vreg123, %EXEC; VReg_32:%vreg144,%vreg142,%vreg123 %vreg145 = S_LOAD_DWORD_IMM %vreg0, 81; mem:LD4[%306] SReg_32:%vreg145 SReg_64:%vreg0 %vreg147 = COPY %vreg145; VReg_32:%vreg147 SReg_32:%vreg145 %vreg153:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg147, %EXEC; VReg_64:%vreg153,%vreg8 VReg_32:%vreg147 %vreg148 = S_LOAD_DWORD_IMM %vreg0, 80; mem:LD4[%301] SReg_32:%vreg148 SReg_64:%vreg0 %vreg150 = COPY %vreg148; VReg_32:%vreg150 SReg_32:%vreg148 %vreg153:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg150, %EXEC; VReg_64:%vreg153,%vreg8 VReg_32:%vreg150 %vreg155 = S_LOAD_DWORD_IMM %vreg0, 12; mem:LD4[%281] SReg_32:%vreg155 SReg_64:%vreg0 %vreg156 = S_LOAD_DWORD_IMM %vreg0, 13; mem:LD4[%286] SReg_32:%vreg156 SReg_64:%vreg0 %vreg157 = S_LOAD_DWORD_IMM %vreg0, 14; mem:LD4[%291] SReg_32:%vreg157 SReg_64:%vreg0 %vreg158 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%318] SReg_128:%vreg158 SReg_64:%vreg2 %vreg159 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%315] SReg_256:%vreg159 SReg_64:%vreg1 %vreg160 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg153:sub0, %vreg159, %vreg158, %EXEC; VReg_128:%vreg160 VReg_64:%vreg153 SReg_256:%vreg159 SReg_128:%vreg158 %vreg162 = S_LOAD_DWORD_IMM %vreg0, 19; mem:LD4[%341] SReg_32:%vreg162 SReg_64:%vreg0 %vreg164 = COPY %vreg162; VReg_32:%vreg164 SReg_32:%vreg162 %vreg163 = V_MUL_F32_e32 %vreg160:sub3, %vreg164, %EXEC; VReg_32:%vreg163,%vreg164 VReg_128:%vreg160 %vreg165 = V_ADD_F32_e32 %vreg163, %vreg144, %EXEC; VReg_32:%vreg165,%vreg163,%vreg144 %vreg166 = S_LOAD_DWORD_IMM %vreg0, 81; mem:LD4[%350] SReg_32:%vreg166 SReg_64:%vreg0 %vreg168 = COPY %vreg166; VReg_32:%vreg168 SReg_32:%vreg166 %vreg174:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg168, %EXEC; VReg_64:%vreg174,%vreg8 VReg_32:%vreg168 %vreg169 = S_LOAD_DWORD_IMM %vreg0, 80; mem:LD4[%346] SReg_32:%vreg169 SReg_64:%vreg0 %vreg171 = COPY %vreg169; VReg_32:%vreg171 SReg_32:%vreg169 %vreg174:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg171, %EXEC; VReg_64:%vreg174,%vreg8 VReg_32:%vreg171 %vreg176 = S_LOAD_DWORD_IMM %vreg0, 16; mem:LD4[%326] SReg_32:%vreg176 SReg_64:%vreg0 %vreg177 = S_LOAD_DWORD_IMM %vreg0, 17; mem:LD4[%331] SReg_32:%vreg177 SReg_64:%vreg0 %vreg178 = S_LOAD_DWORD_IMM %vreg0, 18; mem:LD4[%336] SReg_32:%vreg178 SReg_64:%vreg0 %vreg179 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%361] SReg_128:%vreg179 SReg_64:%vreg2 %vreg180 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%358] SReg_256:%vreg180 SReg_64:%vreg1 %vreg181 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg174:sub0, %vreg180, %vreg179, %EXEC; VReg_128:%vreg181 VReg_64:%vreg174 SReg_256:%vreg180 SReg_128:%vreg179 %vreg183 = S_LOAD_DWORD_IMM %vreg0, 19; mem:LD4[%384] SReg_32:%vreg183 SReg_64:%vreg0 %vreg185 = COPY %vreg183; VReg_32:%vreg185 SReg_32:%vreg183 %vreg184 = V_MUL_F32_e32 %vreg181:sub3, %vreg185, %EXEC; VReg_32:%vreg184,%vreg185 VReg_128:%vreg181 %vreg186 = V_ADD_F32_e32 %vreg184, %vreg165, %EXEC; VReg_32:%vreg186,%vreg184,%vreg165 %vreg187 = S_LOAD_DWORD_IMM %vreg0, 85; mem:LD4[%394] SReg_32:%vreg187 SReg_64:%vreg0 %vreg189 = COPY %vreg187; VReg_32:%vreg189 SReg_32:%vreg187 %vreg195:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg189, %EXEC; VReg_64:%vreg195,%vreg8 VReg_32:%vreg189 %vreg190 = S_LOAD_DWORD_IMM %vreg0, 84; mem:LD4[%389] SReg_32:%vreg190 SReg_64:%vreg0 %vreg192 = COPY %vreg190; VReg_32:%vreg192 SReg_32:%vreg190 %vreg195:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg192, %EXEC; VReg_64:%vreg195,%vreg8 VReg_32:%vreg192 %vreg197 = S_LOAD_DWORD_IMM %vreg0, 16; mem:LD4[%369] SReg_32:%vreg197 SReg_64:%vreg0 %vreg198 = S_LOAD_DWORD_IMM %vreg0, 17; mem:LD4[%374] SReg_32:%vreg198 SReg_64:%vreg0 %vreg199 = S_LOAD_DWORD_IMM %vreg0, 18; mem:LD4[%379] SReg_32:%vreg199 SReg_64:%vreg0 %vreg200 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%406] SReg_128:%vreg200 SReg_64:%vreg2 %vreg201 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%403] SReg_256:%vreg201 SReg_64:%vreg1 %vreg202 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg195:sub0, %vreg201, %vreg200, %EXEC; VReg_128:%vreg202 VReg_64:%vreg195 SReg_256:%vreg201 SReg_128:%vreg200 %vreg204 = S_LOAD_DWORD_IMM %vreg0, 23; mem:LD4[%429] SReg_32:%vreg204 SReg_64:%vreg0 %vreg206 = COPY %vreg204; VReg_32:%vreg206 SReg_32:%vreg204 %vreg205 = V_MUL_F32_e32 %vreg202:sub3, %vreg206, %EXEC; VReg_32:%vreg205,%vreg206 VReg_128:%vreg202 %vreg207 = V_ADD_F32_e32 %vreg205, %vreg186, %EXEC; VReg_32:%vreg207,%vreg205,%vreg186 %vreg208 = S_LOAD_DWORD_IMM %vreg0, 85; mem:LD4[%438] SReg_32:%vreg208 SReg_64:%vreg0 %vreg210 = COPY %vreg208; VReg_32:%vreg210 SReg_32:%vreg208 %vreg216:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg210, %EXEC; VReg_64:%vreg216,%vreg8 VReg_32:%vreg210 %vreg211 = S_LOAD_DWORD_IMM %vreg0, 84; mem:LD4[%434] SReg_32:%vreg211 SReg_64:%vreg0 %vreg213 = COPY %vreg211; VReg_32:%vreg213 SReg_32:%vreg211 %vreg216:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg213, %EXEC; VReg_64:%vreg216,%vreg8 VReg_32:%vreg213 %vreg218 = S_LOAD_DWORD_IMM %vreg0, 20; mem:LD4[%414] SReg_32:%vreg218 SReg_64:%vreg0 %vreg219 = S_LOAD_DWORD_IMM %vreg0, 21; mem:LD4[%419] SReg_32:%vreg219 SReg_64:%vreg0 %vreg220 = S_LOAD_DWORD_IMM %vreg0, 22; mem:LD4[%424] SReg_32:%vreg220 SReg_64:%vreg0 %vreg221 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%449] SReg_128:%vreg221 SReg_64:%vreg2 %vreg222 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%446] SReg_256:%vreg222 SReg_64:%vreg1 %vreg223 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg216:sub0, %vreg222, %vreg221, %EXEC; VReg_128:%vreg223 VReg_64:%vreg216 SReg_256:%vreg222 SReg_128:%vreg221 %vreg225 = S_LOAD_DWORD_IMM %vreg0, 23; mem:LD4[%472] SReg_32:%vreg225 SReg_64:%vreg0 %vreg227 = COPY %vreg225; VReg_32:%vreg227 SReg_32:%vreg225 %vreg226 = V_MUL_F32_e32 %vreg223:sub3, %vreg227, %EXEC; VReg_32:%vreg226,%vreg227 VReg_128:%vreg223 %vreg228 = V_ADD_F32_e32 %vreg226, %vreg207, %EXEC; VReg_32:%vreg228,%vreg226,%vreg207 %vreg229 = S_LOAD_DWORD_IMM %vreg0, 89; mem:LD4[%482] SReg_32:%vreg229 SReg_64:%vreg0 %vreg231 = COPY %vreg229; VReg_32:%vreg231 SReg_32:%vreg229 %vreg237:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg231, %EXEC; VReg_64:%vreg237,%vreg8 VReg_32:%vreg231 %vreg232 = S_LOAD_DWORD_IMM %vreg0, 88; mem:LD4[%477] SReg_32:%vreg232 SReg_64:%vreg0 %vreg234 = COPY %vreg232; VReg_32:%vreg234 SReg_32:%vreg232 %vreg237:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg234, %EXEC; VReg_64:%vreg237,%vreg8 VReg_32:%vreg234 %vreg239 = S_LOAD_DWORD_IMM %vreg0, 20; mem:LD4[%457] SReg_32:%vreg239 SReg_64:%vreg0 %vreg240 = S_LOAD_DWORD_IMM %vreg0, 21; mem:LD4[%462] SReg_32:%vreg240 SReg_64:%vreg0 %vreg241 = S_LOAD_DWORD_IMM %vreg0, 22; mem:LD4[%467] SReg_32:%vreg241 SReg_64:%vreg0 %vreg242 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%494] SReg_128:%vreg242 SReg_64:%vreg2 %vreg243 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%491] SReg_256:%vreg243 SReg_64:%vreg1 %vreg244 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg237:sub0, %vreg243, %vreg242, %EXEC; VReg_128:%vreg244 VReg_64:%vreg237 SReg_256:%vreg243 SReg_128:%vreg242 %vreg246 = S_LOAD_DWORD_IMM %vreg0, 27; mem:LD4[%517] SReg_32:%vreg246 SReg_64:%vreg0 %vreg248 = COPY %vreg246; VReg_32:%vreg248 SReg_32:%vreg246 %vreg247 = V_MUL_F32_e32 %vreg244:sub3, %vreg248, %EXEC; VReg_32:%vreg247,%vreg248 VReg_128:%vreg244 %vreg249 = V_ADD_F32_e32 %vreg247, %vreg228, %EXEC; VReg_32:%vreg249,%vreg247,%vreg228 %vreg250 = S_LOAD_DWORD_IMM %vreg0, 89; mem:LD4[%526] SReg_32:%vreg250 SReg_64:%vreg0 %vreg252 = COPY %vreg250; VReg_32:%vreg252 SReg_32:%vreg250 %vreg258:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg252, %EXEC; VReg_64:%vreg258,%vreg8 VReg_32:%vreg252 %vreg253 = S_LOAD_DWORD_IMM %vreg0, 88; mem:LD4[%522] SReg_32:%vreg253 SReg_64:%vreg0 %vreg255 = COPY %vreg253; VReg_32:%vreg255 SReg_32:%vreg253 %vreg258:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg255, %EXEC; VReg_64:%vreg258,%vreg8 VReg_32:%vreg255 %vreg260 = S_LOAD_DWORD_IMM %vreg0, 24; mem:LD4[%502] SReg_32:%vreg260 SReg_64:%vreg0 %vreg261 = S_LOAD_DWORD_IMM %vreg0, 25; mem:LD4[%507] SReg_32:%vreg261 SReg_64:%vreg0 %vreg262 = S_LOAD_DWORD_IMM %vreg0, 26; mem:LD4[%512] SReg_32:%vreg262 SReg_64:%vreg0 %vreg263 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%537] SReg_128:%vreg263 SReg_64:%vreg2 %vreg264 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%534] SReg_256:%vreg264 SReg_64:%vreg1 %vreg265 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg258:sub0, %vreg264, %vreg263, %EXEC; VReg_128:%vreg265 VReg_64:%vreg258 SReg_256:%vreg264 SReg_128:%vreg263 %vreg267 = S_LOAD_DWORD_IMM %vreg0, 27; mem:LD4[%560] SReg_32:%vreg267 SReg_64:%vreg0 %vreg269 = COPY %vreg267; VReg_32:%vreg269 SReg_32:%vreg267 %vreg268 = V_MUL_F32_e32 %vreg265:sub3, %vreg269, %EXEC; VReg_32:%vreg268,%vreg269 VReg_128:%vreg265 %vreg270 = V_ADD_F32_e32 %vreg268, %vreg249, %EXEC; VReg_32:%vreg270,%vreg268,%vreg249 %vreg271 = S_LOAD_DWORD_IMM %vreg0, 93; mem:LD4[%570] SReg_32:%vreg271 SReg_64:%vreg0 %vreg273 = COPY %vreg271; VReg_32:%vreg273 SReg_32:%vreg271 %vreg279:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg273, %EXEC; VReg_64:%vreg279,%vreg8 VReg_32:%vreg273 %vreg274 = S_LOAD_DWORD_IMM %vreg0, 92; mem:LD4[%565] SReg_32:%vreg274 SReg_64:%vreg0 %vreg276 = COPY %vreg274; VReg_32:%vreg276 SReg_32:%vreg274 %vreg279:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg276, %EXEC; VReg_64:%vreg279,%vreg8 VReg_32:%vreg276 %vreg281 = S_LOAD_DWORD_IMM %vreg0, 24; mem:LD4[%545] SReg_32:%vreg281 SReg_64:%vreg0 %vreg282 = S_LOAD_DWORD_IMM %vreg0, 25; mem:LD4[%550] SReg_32:%vreg282 SReg_64:%vreg0 %vreg283 = S_LOAD_DWORD_IMM %vreg0, 26; mem:LD4[%555] SReg_32:%vreg283 SReg_64:%vreg0 %vreg284 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%582] SReg_128:%vreg284 SReg_64:%vreg2 %vreg285 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%579] SReg_256:%vreg285 SReg_64:%vreg1 %vreg286 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg279:sub0, %vreg285, %vreg284, %EXEC; VReg_128:%vreg286 VReg_64:%vreg279 SReg_256:%vreg285 SReg_128:%vreg284 %vreg288 = S_LOAD_DWORD_IMM %vreg0, 31; mem:LD4[%605] SReg_32:%vreg288 SReg_64:%vreg0 %vreg290 = COPY %vreg288; VReg_32:%vreg290 SReg_32:%vreg288 %vreg289 = V_MUL_F32_e32 %vreg286:sub3, %vreg290, %EXEC; VReg_32:%vreg289,%vreg290 VReg_128:%vreg286 %vreg291 = V_ADD_F32_e32 %vreg289, %vreg270, %EXEC; VReg_32:%vreg291,%vreg289,%vreg270 %vreg292 = S_LOAD_DWORD_IMM %vreg0, 93; mem:LD4[%614] SReg_32:%vreg292 SReg_64:%vreg0 %vreg294 = COPY %vreg292; VReg_32:%vreg294 SReg_32:%vreg292 %vreg300:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg294, %EXEC; VReg_64:%vreg300,%vreg8 VReg_32:%vreg294 %vreg295 = S_LOAD_DWORD_IMM %vreg0, 92; mem:LD4[%610] SReg_32:%vreg295 SReg_64:%vreg0 %vreg297 = COPY %vreg295; VReg_32:%vreg297 SReg_32:%vreg295 %vreg300:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg297, %EXEC; VReg_64:%vreg300,%vreg8 VReg_32:%vreg297 %vreg302 = S_LOAD_DWORD_IMM %vreg0, 28; mem:LD4[%590] SReg_32:%vreg302 SReg_64:%vreg0 %vreg303 = S_LOAD_DWORD_IMM %vreg0, 29; mem:LD4[%595] SReg_32:%vreg303 SReg_64:%vreg0 %vreg304 = S_LOAD_DWORD_IMM %vreg0, 30; mem:LD4[%600] SReg_32:%vreg304 SReg_64:%vreg0 %vreg305 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%625] SReg_128:%vreg305 SReg_64:%vreg2 %vreg306 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%622] SReg_256:%vreg306 SReg_64:%vreg1 %vreg307 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg300:sub0, %vreg306, %vreg305, %EXEC; VReg_128:%vreg307 VReg_64:%vreg300 SReg_256:%vreg306 SReg_128:%vreg305 %vreg309 = S_LOAD_DWORD_IMM %vreg0, 31; mem:LD4[%648] SReg_32:%vreg309 SReg_64:%vreg0 %vreg311 = COPY %vreg309; VReg_32:%vreg311 SReg_32:%vreg309 %vreg310 = V_MUL_F32_e32 %vreg307:sub3, %vreg311, %EXEC; VReg_32:%vreg310,%vreg311 VReg_128:%vreg307 %vreg312 = V_ADD_F32_e32 %vreg310, %vreg291, %EXEC; VReg_32:%vreg312,%vreg310,%vreg291 %vreg313 = S_LOAD_DWORD_IMM %vreg0, 97; mem:LD4[%658] SReg_32:%vreg313 SReg_64:%vreg0 %vreg315 = COPY %vreg313; VReg_32:%vreg315 SReg_32:%vreg313 %vreg321:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg315, %EXEC; VReg_64:%vreg321,%vreg8 VReg_32:%vreg315 %vreg316 = S_LOAD_DWORD_IMM %vreg0, 96; mem:LD4[%653] SReg_32:%vreg316 SReg_64:%vreg0 %vreg318 = COPY %vreg316; VReg_32:%vreg318 SReg_32:%vreg316 %vreg321:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg318, %EXEC; VReg_64:%vreg321,%vreg8 VReg_32:%vreg318 %vreg323 = S_LOAD_DWORD_IMM %vreg0, 28; mem:LD4[%633] SReg_32:%vreg323 SReg_64:%vreg0 %vreg324 = S_LOAD_DWORD_IMM %vreg0, 29; mem:LD4[%638] SReg_32:%vreg324 SReg_64:%vreg0 %vreg325 = S_LOAD_DWORD_IMM %vreg0, 30; mem:LD4[%643] SReg_32:%vreg325 SReg_64:%vreg0 %vreg326 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%670] SReg_128:%vreg326 SReg_64:%vreg2 %vreg327 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%667] SReg_256:%vreg327 SReg_64:%vreg1 %vreg328 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg321:sub0, %vreg327, %vreg326, %EXEC; VReg_128:%vreg328 VReg_64:%vreg321 SReg_256:%vreg327 SReg_128:%vreg326 %vreg330 = S_LOAD_DWORD_IMM %vreg0, 35; mem:LD4[%693] SReg_32:%vreg330 SReg_64:%vreg0 %vreg332 = COPY %vreg330; VReg_32:%vreg332 SReg_32:%vreg330 %vreg331 = V_MUL_F32_e32 %vreg328:sub3, %vreg332, %EXEC; VReg_32:%vreg331,%vreg332 VReg_128:%vreg328 %vreg333 = V_ADD_F32_e32 %vreg331, %vreg312, %EXEC; VReg_32:%vreg333,%vreg331,%vreg312 %vreg334 = S_LOAD_DWORD_IMM %vreg0, 97; mem:LD4[%702] SReg_32:%vreg334 SReg_64:%vreg0 %vreg336 = COPY %vreg334; VReg_32:%vreg336 SReg_32:%vreg334 %vreg342:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg336, %EXEC; VReg_64:%vreg342,%vreg8 VReg_32:%vreg336 %vreg337 = S_LOAD_DWORD_IMM %vreg0, 96; mem:LD4[%698] SReg_32:%vreg337 SReg_64:%vreg0 %vreg339 = COPY %vreg337; VReg_32:%vreg339 SReg_32:%vreg337 %vreg342:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg339, %EXEC; VReg_64:%vreg342,%vreg8 VReg_32:%vreg339 %vreg344 = S_LOAD_DWORD_IMM %vreg0, 32; mem:LD4[%678] SReg_32:%vreg344 SReg_64:%vreg0 %vreg345 = S_LOAD_DWORD_IMM %vreg0, 33; mem:LD4[%683] SReg_32:%vreg345 SReg_64:%vreg0 %vreg346 = S_LOAD_DWORD_IMM %vreg0, 34; mem:LD4[%688] SReg_32:%vreg346 SReg_64:%vreg0 %vreg347 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%713] SReg_128:%vreg347 SReg_64:%vreg2 %vreg348 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%710] SReg_256:%vreg348 SReg_64:%vreg1 %vreg349 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg342:sub0, %vreg348, %vreg347, %EXEC; VReg_128:%vreg349 VReg_64:%vreg342 SReg_256:%vreg348 SReg_128:%vreg347 %vreg351 = S_LOAD_DWORD_IMM %vreg0, 35; mem:LD4[%736] SReg_32:%vreg351 SReg_64:%vreg0 %vreg353 = COPY %vreg351; VReg_32:%vreg353 SReg_32:%vreg351 %vreg352 = V_MUL_F32_e32 %vreg349:sub3, %vreg353, %EXEC; VReg_32:%vreg352,%vreg353 VReg_128:%vreg349 %vreg354 = V_ADD_F32_e32 %vreg352, %vreg333, %EXEC; VReg_32:%vreg354,%vreg352,%vreg333 %vreg355 = S_LOAD_DWORD_IMM %vreg0, 101; mem:LD4[%746] SReg_32:%vreg355 SReg_64:%vreg0 %vreg357 = COPY %vreg355; VReg_32:%vreg357 SReg_32:%vreg355 %vreg363:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg357, %EXEC; VReg_64:%vreg363,%vreg8 VReg_32:%vreg357 %vreg358 = S_LOAD_DWORD_IMM %vreg0, 100; mem:LD4[%741] SReg_32:%vreg358 SReg_64:%vreg0 %vreg360 = COPY %vreg358; VReg_32:%vreg360 SReg_32:%vreg358 %vreg363:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg360, %EXEC; VReg_64:%vreg363,%vreg8 VReg_32:%vreg360 %vreg365 = S_LOAD_DWORD_IMM %vreg0, 32; mem:LD4[%721] SReg_32:%vreg365 SReg_64:%vreg0 %vreg366 = S_LOAD_DWORD_IMM %vreg0, 33; mem:LD4[%726] SReg_32:%vreg366 SReg_64:%vreg0 %vreg367 = S_LOAD_DWORD_IMM %vreg0, 34; mem:LD4[%731] SReg_32:%vreg367 SReg_64:%vreg0 %vreg368 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%758] SReg_128:%vreg368 SReg_64:%vreg2 %vreg369 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%755] SReg_256:%vreg369 SReg_64:%vreg1 %vreg370 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg363:sub0, %vreg369, %vreg368, %EXEC; VReg_128:%vreg370 VReg_64:%vreg363 SReg_256:%vreg369 SReg_128:%vreg368 %vreg372 = S_LOAD_DWORD_IMM %vreg0, 39; mem:LD4[%781] SReg_32:%vreg372 SReg_64:%vreg0 %vreg374 = COPY %vreg372; VReg_32:%vreg374 SReg_32:%vreg372 %vreg373 = V_MUL_F32_e32 %vreg370:sub3, %vreg374, %EXEC; VReg_32:%vreg373,%vreg374 VReg_128:%vreg370 %vreg375 = V_ADD_F32_e32 %vreg373, %vreg354, %EXEC; VReg_32:%vreg375,%vreg373,%vreg354 %vreg376 = S_LOAD_DWORD_IMM %vreg0, 101; mem:LD4[%790] SReg_32:%vreg376 SReg_64:%vreg0 %vreg378 = COPY %vreg376; VReg_32:%vreg378 SReg_32:%vreg376 %vreg384:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg378, %EXEC; VReg_64:%vreg384,%vreg8 VReg_32:%vreg378 %vreg379 = S_LOAD_DWORD_IMM %vreg0, 100; mem:LD4[%786] SReg_32:%vreg379 SReg_64:%vreg0 %vreg381 = COPY %vreg379; VReg_32:%vreg381 SReg_32:%vreg379 %vreg384:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg381, %EXEC; VReg_64:%vreg384,%vreg8 VReg_32:%vreg381 %vreg386 = S_LOAD_DWORD_IMM %vreg0, 36; mem:LD4[%766] SReg_32:%vreg386 SReg_64:%vreg0 %vreg387 = S_LOAD_DWORD_IMM %vreg0, 37; mem:LD4[%771] SReg_32:%vreg387 SReg_64:%vreg0 %vreg388 = S_LOAD_DWORD_IMM %vreg0, 38; mem:LD4[%776] SReg_32:%vreg388 SReg_64:%vreg0 %vreg389 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%801] SReg_128:%vreg389 SReg_64:%vreg2 %vreg390 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%798] SReg_256:%vreg390 SReg_64:%vreg1 %vreg391 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg384:sub0, %vreg390, %vreg389, %EXEC; VReg_128:%vreg391 VReg_64:%vreg384 SReg_256:%vreg390 SReg_128:%vreg389 %vreg393 = S_LOAD_DWORD_IMM %vreg0, 39; mem:LD4[%824] SReg_32:%vreg393 SReg_64:%vreg0 %vreg395 = COPY %vreg393; VReg_32:%vreg395 SReg_32:%vreg393 %vreg394 = V_MUL_F32_e32 %vreg391:sub3, %vreg395, %EXEC; VReg_32:%vreg394,%vreg395 VReg_128:%vreg391 %vreg396 = V_ADD_F32_e32 %vreg394, %vreg375, %EXEC; VReg_32:%vreg396,%vreg394,%vreg375 %vreg397 = S_LOAD_DWORD_IMM %vreg0, 105; mem:LD4[%834] SReg_32:%vreg397 SReg_64:%vreg0 %vreg399 = COPY %vreg397; VReg_32:%vreg399 SReg_32:%vreg397 %vreg405:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg399, %EXEC; VReg_64:%vreg405,%vreg8 VReg_32:%vreg399 %vreg400 = S_LOAD_DWORD_IMM %vreg0, 104; mem:LD4[%829] SReg_32:%vreg400 SReg_64:%vreg0 %vreg402 = COPY %vreg400; VReg_32:%vreg402 SReg_32:%vreg400 %vreg405:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg402, %EXEC; VReg_64:%vreg405,%vreg8 VReg_32:%vreg402 %vreg407 = S_LOAD_DWORD_IMM %vreg0, 36; mem:LD4[%809] SReg_32:%vreg407 SReg_64:%vreg0 %vreg408 = S_LOAD_DWORD_IMM %vreg0, 37; mem:LD4[%814] SReg_32:%vreg408 SReg_64:%vreg0 %vreg409 = S_LOAD_DWORD_IMM %vreg0, 38; mem:LD4[%819] SReg_32:%vreg409 SReg_64:%vreg0 %vreg410 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%846] SReg_128:%vreg410 SReg_64:%vreg2 %vreg411 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%843] SReg_256:%vreg411 SReg_64:%vreg1 %vreg412 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg405:sub0, %vreg411, %vreg410, %EXEC; VReg_128:%vreg412 VReg_64:%vreg405 SReg_256:%vreg411 SReg_128:%vreg410 %vreg414 = S_LOAD_DWORD_IMM %vreg0, 43; mem:LD4[%869] SReg_32:%vreg414 SReg_64:%vreg0 %vreg416 = COPY %vreg414; VReg_32:%vreg416 SReg_32:%vreg414 %vreg415 = V_MUL_F32_e32 %vreg412:sub3, %vreg416, %EXEC; VReg_32:%vreg415,%vreg416 VReg_128:%vreg412 %vreg417 = V_ADD_F32_e32 %vreg415, %vreg396, %EXEC; VReg_32:%vreg417,%vreg415,%vreg396 %vreg418 = S_LOAD_DWORD_IMM %vreg0, 105; mem:LD4[%878] SReg_32:%vreg418 SReg_64:%vreg0 %vreg420 = COPY %vreg418; VReg_32:%vreg420 SReg_32:%vreg418 %vreg426:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg420, %EXEC; VReg_64:%vreg426,%vreg8 VReg_32:%vreg420 %vreg421 = S_LOAD_DWORD_IMM %vreg0, 104; mem:LD4[%874] SReg_32:%vreg421 SReg_64:%vreg0 %vreg423 = COPY %vreg421; VReg_32:%vreg423 SReg_32:%vreg421 %vreg426:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg423, %EXEC; VReg_64:%vreg426,%vreg8 VReg_32:%vreg423 %vreg428 = S_LOAD_DWORD_IMM %vreg0, 40; mem:LD4[%854] SReg_32:%vreg428 SReg_64:%vreg0 %vreg429 = S_LOAD_DWORD_IMM %vreg0, 41; mem:LD4[%859] SReg_32:%vreg429 SReg_64:%vreg0 %vreg430 = S_LOAD_DWORD_IMM %vreg0, 42; mem:LD4[%864] SReg_32:%vreg430 SReg_64:%vreg0 %vreg431 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%889] SReg_128:%vreg431 SReg_64:%vreg2 %vreg432 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%886] SReg_256:%vreg432 SReg_64:%vreg1 %vreg433 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg426:sub0, %vreg432, %vreg431, %EXEC; VReg_128:%vreg433 VReg_64:%vreg426 SReg_256:%vreg432 SReg_128:%vreg431 %vreg435 = S_LOAD_DWORD_IMM %vreg0, 43; mem:LD4[%912] SReg_32:%vreg435 SReg_64:%vreg0 %vreg437 = COPY %vreg435; VReg_32:%vreg437 SReg_32:%vreg435 %vreg436 = V_MUL_F32_e32 %vreg433:sub3, %vreg437, %EXEC; VReg_32:%vreg436,%vreg437 VReg_128:%vreg433 %vreg438 = V_ADD_F32_e32 %vreg436, %vreg417, %EXEC; VReg_32:%vreg438,%vreg436,%vreg417 %vreg439 = S_LOAD_DWORD_IMM %vreg0, 109; mem:LD4[%922] SReg_32:%vreg439 SReg_64:%vreg0 %vreg441 = COPY %vreg439; VReg_32:%vreg441 SReg_32:%vreg439 %vreg447:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg441, %EXEC; VReg_64:%vreg447,%vreg8 VReg_32:%vreg441 %vreg442 = S_LOAD_DWORD_IMM %vreg0, 108; mem:LD4[%917] SReg_32:%vreg442 SReg_64:%vreg0 %vreg444 = COPY %vreg442; VReg_32:%vreg444 SReg_32:%vreg442 %vreg447:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg444, %EXEC; VReg_64:%vreg447,%vreg8 VReg_32:%vreg444 %vreg449 = S_LOAD_DWORD_IMM %vreg0, 40; mem:LD4[%897] SReg_32:%vreg449 SReg_64:%vreg0 %vreg450 = S_LOAD_DWORD_IMM %vreg0, 41; mem:LD4[%902] SReg_32:%vreg450 SReg_64:%vreg0 %vreg451 = S_LOAD_DWORD_IMM %vreg0, 42; mem:LD4[%907] SReg_32:%vreg451 SReg_64:%vreg0 %vreg452 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%934] SReg_128:%vreg452 SReg_64:%vreg2 %vreg453 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%931] SReg_256:%vreg453 SReg_64:%vreg1 %vreg454 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg447:sub0, %vreg453, %vreg452, %EXEC; VReg_128:%vreg454 VReg_64:%vreg447 SReg_256:%vreg453 SReg_128:%vreg452 %vreg456 = S_LOAD_DWORD_IMM %vreg0, 47; mem:LD4[%957] SReg_32:%vreg456 SReg_64:%vreg0 %vreg458 = COPY %vreg456; VReg_32:%vreg458 SReg_32:%vreg456 %vreg457 = V_MUL_F32_e32 %vreg454:sub3, %vreg458, %EXEC; VReg_32:%vreg457,%vreg458 VReg_128:%vreg454 %vreg459 = V_ADD_F32_e32 %vreg457, %vreg438, %EXEC; VReg_32:%vreg459,%vreg457,%vreg438 %vreg460 = S_LOAD_DWORD_IMM %vreg0, 109; mem:LD4[%966] SReg_32:%vreg460 SReg_64:%vreg0 %vreg462 = COPY %vreg460; VReg_32:%vreg462 SReg_32:%vreg460 %vreg468:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg462, %EXEC; VReg_64:%vreg468,%vreg8 VReg_32:%vreg462 %vreg463 = S_LOAD_DWORD_IMM %vreg0, 108; mem:LD4[%962] SReg_32:%vreg463 SReg_64:%vreg0 %vreg465 = COPY %vreg463; VReg_32:%vreg465 SReg_32:%vreg463 %vreg468:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg465, %EXEC; VReg_64:%vreg468,%vreg8 VReg_32:%vreg465 %vreg470 = S_LOAD_DWORD_IMM %vreg0, 44; mem:LD4[%942] SReg_32:%vreg470 SReg_64:%vreg0 %vreg471 = S_LOAD_DWORD_IMM %vreg0, 45; mem:LD4[%947] SReg_32:%vreg471 SReg_64:%vreg0 %vreg472 = S_LOAD_DWORD_IMM %vreg0, 46; mem:LD4[%952] SReg_32:%vreg472 SReg_64:%vreg0 %vreg473 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%977] SReg_128:%vreg473 SReg_64:%vreg2 %vreg474 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%974] SReg_256:%vreg474 SReg_64:%vreg1 %vreg475 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg468:sub0, %vreg474, %vreg473, %EXEC; VReg_128:%vreg475 VReg_64:%vreg468 SReg_256:%vreg474 SReg_128:%vreg473 %vreg477 = S_LOAD_DWORD_IMM %vreg0, 47; mem:LD4[%1000] SReg_32:%vreg477 SReg_64:%vreg0 %vreg479 = COPY %vreg477; VReg_32:%vreg479 SReg_32:%vreg477 %vreg478 = V_MUL_F32_e32 %vreg475:sub3, %vreg479, %EXEC; VReg_32:%vreg478,%vreg479 VReg_128:%vreg475 %vreg480 = V_ADD_F32_e32 %vreg478, %vreg459, %EXEC; VReg_32:%vreg480,%vreg478,%vreg459 %vreg481 = S_LOAD_DWORD_IMM %vreg0, 113; mem:LD4[%1010] SReg_32:%vreg481 SReg_64:%vreg0 %vreg483 = COPY %vreg481; VReg_32:%vreg483 SReg_32:%vreg481 %vreg489:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg483, %EXEC; VReg_64:%vreg489,%vreg8 VReg_32:%vreg483 %vreg484 = S_LOAD_DWORD_IMM %vreg0, 112; mem:LD4[%1005] SReg_32:%vreg484 SReg_64:%vreg0 %vreg486 = COPY %vreg484; VReg_32:%vreg486 SReg_32:%vreg484 %vreg489:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg486, %EXEC; VReg_64:%vreg489,%vreg8 VReg_32:%vreg486 %vreg491 = S_LOAD_DWORD_IMM %vreg0, 44; mem:LD4[%985] SReg_32:%vreg491 SReg_64:%vreg0 %vreg492 = S_LOAD_DWORD_IMM %vreg0, 45; mem:LD4[%990] SReg_32:%vreg492 SReg_64:%vreg0 %vreg493 = S_LOAD_DWORD_IMM %vreg0, 46; mem:LD4[%995] SReg_32:%vreg493 SReg_64:%vreg0 %vreg494 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%1022] SReg_128:%vreg494 SReg_64:%vreg2 %vreg495 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%1019] SReg_256:%vreg495 SReg_64:%vreg1 %vreg496 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg489:sub0, %vreg495, %vreg494, %EXEC; VReg_128:%vreg496 VReg_64:%vreg489 SReg_256:%vreg495 SReg_128:%vreg494 %vreg498 = S_LOAD_DWORD_IMM %vreg0, 51; mem:LD4[%1045] SReg_32:%vreg498 SReg_64:%vreg0 %vreg500 = COPY %vreg498; VReg_32:%vreg500 SReg_32:%vreg498 %vreg499 = V_MUL_F32_e32 %vreg496:sub3, %vreg500, %EXEC; VReg_32:%vreg499,%vreg500 VReg_128:%vreg496 %vreg501 = V_ADD_F32_e32 %vreg499, %vreg480, %EXEC; VReg_32:%vreg501,%vreg499,%vreg480 %vreg502 = S_LOAD_DWORD_IMM %vreg0, 113; mem:LD4[%1054] SReg_32:%vreg502 SReg_64:%vreg0 %vreg504 = COPY %vreg502; VReg_32:%vreg504 SReg_32:%vreg502 %vreg510:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg504, %EXEC; VReg_64:%vreg510,%vreg8 VReg_32:%vreg504 %vreg505 = S_LOAD_DWORD_IMM %vreg0, 112; mem:LD4[%1050] SReg_32:%vreg505 SReg_64:%vreg0 %vreg507 = COPY %vreg505; VReg_32:%vreg507 SReg_32:%vreg505 %vreg510:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg507, %EXEC; VReg_64:%vreg510,%vreg8 VReg_32:%vreg507 %vreg512 = S_LOAD_DWORD_IMM %vreg0, 48; mem:LD4[%1030] SReg_32:%vreg512 SReg_64:%vreg0 %vreg513 = S_LOAD_DWORD_IMM %vreg0, 49; mem:LD4[%1035] SReg_32:%vreg513 SReg_64:%vreg0 %vreg514 = S_LOAD_DWORD_IMM %vreg0, 50; mem:LD4[%1040] SReg_32:%vreg514 SReg_64:%vreg0 %vreg515 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%1065] SReg_128:%vreg515 SReg_64:%vreg2 %vreg516 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%1062] SReg_256:%vreg516 SReg_64:%vreg1 %vreg517 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg510:sub0, %vreg516, %vreg515, %EXEC; VReg_128:%vreg517 VReg_64:%vreg510 SReg_256:%vreg516 SReg_128:%vreg515 %vreg519 = S_LOAD_DWORD_IMM %vreg0, 51; mem:LD4[%1088] SReg_32:%vreg519 SReg_64:%vreg0 %vreg521 = COPY %vreg519; VReg_32:%vreg521 SReg_32:%vreg519 %vreg520 = V_MUL_F32_e32 %vreg517:sub3, %vreg521, %EXEC; VReg_32:%vreg520,%vreg521 VReg_128:%vreg517 %vreg522 = V_ADD_F32_e32 %vreg520, %vreg501, %EXEC; VReg_32:%vreg522,%vreg520,%vreg501 %vreg523 = S_LOAD_DWORD_IMM %vreg0, 117; mem:LD4[%1098] SReg_32:%vreg523 SReg_64:%vreg0 %vreg525 = COPY %vreg523; VReg_32:%vreg525 SReg_32:%vreg523 %vreg531:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg525, %EXEC; VReg_64:%vreg531,%vreg8 VReg_32:%vreg525 %vreg526 = S_LOAD_DWORD_IMM %vreg0, 116; mem:LD4[%1093] SReg_32:%vreg526 SReg_64:%vreg0 %vreg528 = COPY %vreg526; VReg_32:%vreg528 SReg_32:%vreg526 %vreg531:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg528, %EXEC; VReg_64:%vreg531,%vreg8 VReg_32:%vreg528 %vreg533 = S_LOAD_DWORD_IMM %vreg0, 48; mem:LD4[%1073] SReg_32:%vreg533 SReg_64:%vreg0 %vreg534 = S_LOAD_DWORD_IMM %vreg0, 49; mem:LD4[%1078] SReg_32:%vreg534 SReg_64:%vreg0 %vreg535 = S_LOAD_DWORD_IMM %vreg0, 50; mem:LD4[%1083] SReg_32:%vreg535 SReg_64:%vreg0 %vreg536 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%1110] SReg_128:%vreg536 SReg_64:%vreg2 %vreg537 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%1107] SReg_256:%vreg537 SReg_64:%vreg1 %vreg538 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg531:sub0, %vreg537, %vreg536, %EXEC; VReg_128:%vreg538 VReg_64:%vreg531 SReg_256:%vreg537 SReg_128:%vreg536 %vreg540 = S_LOAD_DWORD_IMM %vreg0, 55; mem:LD4[%1133] SReg_32:%vreg540 SReg_64:%vreg0 %vreg542 = COPY %vreg540; VReg_32:%vreg542 SReg_32:%vreg540 %vreg541 = V_MUL_F32_e32 %vreg538:sub3, %vreg542, %EXEC; VReg_32:%vreg541,%vreg542 VReg_128:%vreg538 %vreg543 = V_ADD_F32_e32 %vreg541, %vreg522, %EXEC; VReg_32:%vreg543,%vreg541,%vreg522 %vreg544 = S_LOAD_DWORD_IMM %vreg0, 117; mem:LD4[%1142] SReg_32:%vreg544 SReg_64:%vreg0 %vreg546 = COPY %vreg544; VReg_32:%vreg546 SReg_32:%vreg544 %vreg552:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg546, %EXEC; VReg_64:%vreg552,%vreg8 VReg_32:%vreg546 %vreg547 = S_LOAD_DWORD_IMM %vreg0, 116; mem:LD4[%1138] SReg_32:%vreg547 SReg_64:%vreg0 %vreg549 = COPY %vreg547; VReg_32:%vreg549 SReg_32:%vreg547 %vreg552:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg549, %EXEC; VReg_64:%vreg552,%vreg8 VReg_32:%vreg549 %vreg554 = S_LOAD_DWORD_IMM %vreg0, 52; mem:LD4[%1118] SReg_32:%vreg554 SReg_64:%vreg0 %vreg555 = S_LOAD_DWORD_IMM %vreg0, 53; mem:LD4[%1123] SReg_32:%vreg555 SReg_64:%vreg0 %vreg556 = S_LOAD_DWORD_IMM %vreg0, 54; mem:LD4[%1128] SReg_32:%vreg556 SReg_64:%vreg0 %vreg557 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%1153] SReg_128:%vreg557 SReg_64:%vreg2 %vreg558 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%1150] SReg_256:%vreg558 SReg_64:%vreg1 %vreg559 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg552:sub0, %vreg558, %vreg557, %EXEC; VReg_128:%vreg559 VReg_64:%vreg552 SReg_256:%vreg558 SReg_128:%vreg557 %vreg561 = S_LOAD_DWORD_IMM %vreg0, 55; mem:LD4[%1176] SReg_32:%vreg561 SReg_64:%vreg0 %vreg563 = COPY %vreg561; VReg_32:%vreg563 SReg_32:%vreg561 %vreg562 = V_MUL_F32_e32 %vreg559:sub3, %vreg563, %EXEC; VReg_32:%vreg562,%vreg563 VReg_128:%vreg559 %vreg564 = V_ADD_F32_e32 %vreg562, %vreg543, %EXEC; VReg_32:%vreg564,%vreg562,%vreg543 %vreg565 = S_LOAD_DWORD_IMM %vreg0, 121; mem:LD4[%1186] SReg_32:%vreg565 SReg_64:%vreg0 %vreg567 = COPY %vreg565; VReg_32:%vreg567 SReg_32:%vreg565 %vreg573:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg567, %EXEC; VReg_64:%vreg573,%vreg8 VReg_32:%vreg567 %vreg568 = S_LOAD_DWORD_IMM %vreg0, 120; mem:LD4[%1181] SReg_32:%vreg568 SReg_64:%vreg0 %vreg570 = COPY %vreg568; VReg_32:%vreg570 SReg_32:%vreg568 %vreg573:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg570, %EXEC; VReg_64:%vreg573,%vreg8 VReg_32:%vreg570 %vreg575 = S_LOAD_DWORD_IMM %vreg0, 52; mem:LD4[%1161] SReg_32:%vreg575 SReg_64:%vreg0 %vreg576 = S_LOAD_DWORD_IMM %vreg0, 53; mem:LD4[%1166] SReg_32:%vreg576 SReg_64:%vreg0 %vreg577 = S_LOAD_DWORD_IMM %vreg0, 54; mem:LD4[%1171] SReg_32:%vreg577 SReg_64:%vreg0 %vreg578 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%1198] SReg_128:%vreg578 SReg_64:%vreg2 %vreg579 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%1195] SReg_256:%vreg579 SReg_64:%vreg1 %vreg580 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg573:sub0, %vreg579, %vreg578, %EXEC; VReg_128:%vreg580 VReg_64:%vreg573 SReg_256:%vreg579 SReg_128:%vreg578 %vreg582 = S_LOAD_DWORD_IMM %vreg0, 59; mem:LD4[%1221] SReg_32:%vreg582 SReg_64:%vreg0 %vreg584 = COPY %vreg582; VReg_32:%vreg584 SReg_32:%vreg582 %vreg583 = V_MUL_F32_e32 %vreg580:sub3, %vreg584, %EXEC; VReg_32:%vreg583,%vreg584 VReg_128:%vreg580 %vreg585 = V_ADD_F32_e32 %vreg583, %vreg564, %EXEC; VReg_32:%vreg585,%vreg583,%vreg564 %vreg586 = S_LOAD_DWORD_IMM %vreg0, 121; mem:LD4[%1230] SReg_32:%vreg586 SReg_64:%vreg0 %vreg588 = COPY %vreg586; VReg_32:%vreg588 SReg_32:%vreg586 %vreg594:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg588, %EXEC; VReg_64:%vreg594,%vreg8 VReg_32:%vreg588 %vreg589 = S_LOAD_DWORD_IMM %vreg0, 120; mem:LD4[%1226] SReg_32:%vreg589 SReg_64:%vreg0 %vreg591 = COPY %vreg589; VReg_32:%vreg591 SReg_32:%vreg589 %vreg594:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg591, %EXEC; VReg_64:%vreg594,%vreg8 VReg_32:%vreg591 %vreg596 = S_LOAD_DWORD_IMM %vreg0, 56; mem:LD4[%1206] SReg_32:%vreg596 SReg_64:%vreg0 %vreg597 = S_LOAD_DWORD_IMM %vreg0, 57; mem:LD4[%1211] SReg_32:%vreg597 SReg_64:%vreg0 %vreg598 = S_LOAD_DWORD_IMM %vreg0, 58; mem:LD4[%1216] SReg_32:%vreg598 SReg_64:%vreg0 %vreg599 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%1241] SReg_128:%vreg599 SReg_64:%vreg2 %vreg600 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%1238] SReg_256:%vreg600 SReg_64:%vreg1 %vreg601 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg594:sub0, %vreg600, %vreg599, %EXEC; VReg_128:%vreg601 VReg_64:%vreg594 SReg_256:%vreg600 SReg_128:%vreg599 %vreg603 = S_LOAD_DWORD_IMM %vreg0, 59; mem:LD4[%1264] SReg_32:%vreg603 SReg_64:%vreg0 %vreg605 = COPY %vreg603; VReg_32:%vreg605 SReg_32:%vreg603 %vreg604 = V_MUL_F32_e32 %vreg601:sub3, %vreg605, %EXEC; VReg_32:%vreg604,%vreg605 VReg_128:%vreg601 %vreg606 = V_ADD_F32_e32 %vreg604, %vreg585, %EXEC; VReg_32:%vreg606,%vreg604,%vreg585 %vreg607 = S_LOAD_DWORD_IMM %vreg0, 125; mem:LD4[%1274] SReg_32:%vreg607 SReg_64:%vreg0 %vreg609 = COPY %vreg607; VReg_32:%vreg609 SReg_32:%vreg607 %vreg615:sub1 = V_SUB_F32_e32 %vreg8:sub1, %vreg609, %EXEC; VReg_64:%vreg615,%vreg8 VReg_32:%vreg609 %vreg610 = S_LOAD_DWORD_IMM %vreg0, 124; mem:LD4[%1269] SReg_32:%vreg610 SReg_64:%vreg0 %vreg612 = COPY %vreg610; VReg_32:%vreg612 SReg_32:%vreg610 %vreg615:sub0 = V_SUB_F32_e32 %vreg8:sub0, %vreg612, %EXEC; VReg_64:%vreg615,%vreg8 VReg_32:%vreg612 %vreg617 = S_LOAD_DWORD_IMM %vreg0, 56; mem:LD4[%1249] SReg_32:%vreg617 SReg_64:%vreg0 %vreg618 = S_LOAD_DWORD_IMM %vreg0, 57; mem:LD4[%1254] SReg_32:%vreg618 SReg_64:%vreg0 %vreg619 = S_LOAD_DWORD_IMM %vreg0, 58; mem:LD4[%1259] SReg_32:%vreg619 SReg_64:%vreg0 %vreg620 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%1286] SReg_128:%vreg620 SReg_64:%vreg2 %vreg621 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%1283] SReg_256:%vreg621 SReg_64:%vreg1 %vreg622 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg615:sub0, %vreg621, %vreg620, %EXEC; VReg_128:%vreg622 VReg_64:%vreg615 SReg_256:%vreg621 SReg_128:%vreg620 %vreg624 = S_LOAD_DWORD_IMM %vreg0, 63; mem:LD4[%1309] SReg_32:%vreg624 SReg_64:%vreg0 %vreg626 = COPY %vreg624; VReg_32:%vreg626 SReg_32:%vreg624 %vreg625 = V_MUL_F32_e32 %vreg622:sub3, %vreg626, %EXEC; VReg_32:%vreg625,%vreg626 VReg_128:%vreg622 %vreg627 = V_ADD_F32_e32 %vreg625, %vreg606, %EXEC; VReg_32:%vreg627,%vreg625,%vreg606 %vreg628 = S_LOAD_DWORD_IMM %vreg0, 125; mem:LD4[%1318] SReg_32:%vreg628 SReg_64:%vreg0 %vreg630 = COPY %vreg628; VReg_32:%vreg630 SReg_32:%vreg628 %vreg636:sub1 = V_ADD_F32_e32 %vreg8:sub1, %vreg630, %EXEC; VReg_64:%vreg636,%vreg8 VReg_32:%vreg630 %vreg631 = S_LOAD_DWORD_IMM %vreg0, 124; mem:LD4[%1314] SReg_32:%vreg631 SReg_64:%vreg0 %vreg633 = COPY %vreg631; VReg_32:%vreg633 SReg_32:%vreg631 %vreg636:sub0 = V_ADD_F32_e32 %vreg8:sub0, %vreg633, %EXEC; VReg_64:%vreg636,%vreg8 VReg_32:%vreg633 %vreg638 = S_LOAD_DWORD_IMM %vreg0, 60; mem:LD4[%1294] SReg_32:%vreg638 SReg_64:%vreg0 %vreg639 = S_LOAD_DWORD_IMM %vreg0, 61; mem:LD4[%1299] SReg_32:%vreg639 SReg_64:%vreg0 %vreg640 = S_LOAD_DWORD_IMM %vreg0, 62; mem:LD4[%1304] SReg_32:%vreg640 SReg_64:%vreg0 %vreg641 = S_LOAD_DWORDX4_IMM %vreg2, 0; mem:LD16[%1329] SReg_128:%vreg641 SReg_64:%vreg2 %vreg642 = S_LOAD_DWORDX8_IMM %vreg1, 0; mem:LD32[%1326] SReg_256:%vreg642 SReg_64:%vreg1 %vreg643 = IMAGE_SAMPLE 15, 0, 0, 0, 0, 0, 0, 0, %vreg636:sub0, %vreg642, %vreg641, %EXEC; VReg_128:%vreg643 VReg_64:%vreg636 SReg_256:%vreg642 SReg_128:%vreg641 %vreg645 = S_LOAD_DWORD_IMM %vreg0, 63; mem:LD4[%1352] SReg_32:%vreg645 SReg_64:%vreg0 %vreg647 = COPY %vreg645; VReg_32:%vreg647 SReg_32:%vreg645 %vreg646 = V_MUL_F32_e32 %vreg643:sub3, %vreg647, %EXEC; VReg_32:%vreg646,%vreg647 VReg_128:%vreg643 %vreg648 = V_ADD_F32_e32 %vreg646, %vreg627, %EXEC; VReg_32:%vreg648,%vreg646,%vreg627 %vreg649 = V_ADD_F32_e64 %vreg648, 128, 128, 0, 1, 0, 0, %EXEC; VReg_32:%vreg649,%vreg648 %vreg652 = COPY %vreg52; VReg_32:%vreg652 SReg_32:%vreg52 %vreg651 = V_MUL_F32_e32 %vreg31:sub2, %vreg652, %EXEC; VReg_32:%vreg651,%vreg652 VReg_128:%vreg31 %vreg655 = COPY %vreg27; VReg_32:%vreg655 SReg_32:%vreg27 %vreg654 = V_MUL_F32_e32 %vreg14:sub2, %vreg655, %EXEC; VReg_32:%vreg654,%vreg655 VReg_128:%vreg14 %vreg656 = V_ADD_F32_e32 %vreg651, %vreg654, %EXEC; VReg_32:%vreg656,%vreg651,%vreg654 %vreg659 = COPY %vreg73; VReg_32:%vreg659 SReg_32:%vreg73 %vreg658 = V_MUL_F32_e32 %vreg55:sub2, %vreg659, %EXEC; VReg_32:%vreg658,%vreg659 VReg_128:%vreg55 %vreg660 = V_ADD_F32_e32 %vreg658, %vreg656, %EXEC; VReg_32:%vreg660,%vreg658,%vreg656 %vreg663 = COPY %vreg94; VReg_32:%vreg663 SReg_32:%vreg94 %vreg662 = V_MUL_F32_e32 %vreg76:sub2, %vreg663, %EXEC; VReg_32:%vreg662,%vreg663 VReg_128:%vreg76 %vreg664 = V_ADD_F32_e32 %vreg662, %vreg660, %EXEC; VReg_32:%vreg664,%vreg662,%vreg660 %vreg667 = COPY %vreg115; VReg_32:%vreg667 SReg_32:%vreg115 %vreg666 = V_MUL_F32_e32 %vreg97:sub2, %vreg667, %EXEC; VReg_32:%vreg666,%vreg667 VReg_128:%vreg97 %vreg668 = V_ADD_F32_e32 %vreg666, %vreg664, %EXEC; VReg_32:%vreg668,%vreg666,%vreg664 %vreg671 = COPY %vreg136; VReg_32:%vreg671 SReg_32:%vreg136 %vreg670 = V_MUL_F32_e32 %vreg118:sub2, %vreg671, %EXEC; VReg_32:%vreg670,%vreg671 VReg_128:%vreg118 %vreg672 = V_ADD_F32_e32 %vreg670, %vreg668, %EXEC; VReg_32:%vreg672,%vreg670,%vreg668 %vreg675 = COPY %vreg157; VReg_32:%vreg675 SReg_32:%vreg157 %vreg674 = V_MUL_F32_e32 %vreg139:sub2, %vreg675, %EXEC; VReg_32:%vreg674,%vreg675 VReg_128:%vreg139 %vreg676 = V_ADD_F32_e32 %vreg674, %vreg672, %EXEC; VReg_32:%vreg676,%vreg674,%vreg672 %vreg679 = COPY %vreg178; VReg_32:%vreg679 SReg_32:%vreg178 %vreg678 = V_MUL_F32_e32 %vreg160:sub2, %vreg679, %EXEC; VReg_32:%vreg678,%vreg679 VReg_128:%vreg160 %vreg680 = V_ADD_F32_e32 %vreg678, %vreg676, %EXEC; VReg_32:%vreg680,%vreg678,%vreg676 %vreg683 = COPY %vreg199; VReg_32:%vreg683 SReg_32:%vreg199 %vreg682 = V_MUL_F32_e32 %vreg181:sub2, %vreg683, %EXEC; VReg_32:%vreg682,%vreg683 VReg_128:%vreg181 %vreg684 = V_ADD_F32_e32 %vreg682, %vreg680, %EXEC; VReg_32:%vreg684,%vreg682,%vreg680 %vreg687 = COPY %vreg220; VReg_32:%vreg687 SReg_32:%vreg220 %vreg686 = V_MUL_F32_e32 %vreg202:sub2, %vreg687, %EXEC; VReg_32:%vreg686,%vreg687 VReg_128:%vreg202 %vreg688 = V_ADD_F32_e32 %vreg686, %vreg684, %EXEC; VReg_32:%vreg688,%vreg686,%vreg684 %vreg691 = COPY %vreg241; VReg_32:%vreg691 SReg_32:%vreg241 %vreg690 = V_MUL_F32_e32 %vreg223:sub2, %vreg691, %EXEC; VReg_32:%vreg690,%vreg691 VReg_128:%vreg223 %vreg692 = V_ADD_F32_e32 %vreg690, %vreg688, %EXEC; VReg_32:%vreg692,%vreg690,%vreg688 %vreg695 = COPY %vreg262; VReg_32:%vreg695 SReg_32:%vreg262 %vreg694 = V_MUL_F32_e32 %vreg244:sub2, %vreg695, %EXEC; VReg_32:%vreg694,%vreg695 VReg_128:%vreg244 %vreg696 = V_ADD_F32_e32 %vreg694, %vreg692, %EXEC; VReg_32:%vreg696,%vreg694,%vreg692 %vreg699 = COPY %vreg283; VReg_32:%vreg699 SReg_32:%vreg283 %vreg698 = V_MUL_F32_e32 %vreg265:sub2, %vreg699, %EXEC; VReg_32:%vreg698,%vreg699 VReg_128:%vreg265 %vreg700 = V_ADD_F32_e32 %vreg698, %vreg696, %EXEC; VReg_32:%vreg700,%vreg698,%vreg696 %vreg703 = COPY %vreg304; VReg_32:%vreg703 SReg_32:%vreg304 %vreg702 = V_MUL_F32_e32 %vreg286:sub2, %vreg703, %EXEC; VReg_32:%vreg702,%vreg703 VReg_128:%vreg286 %vreg704 = V_ADD_F32_e32 %vreg702, %vreg700, %EXEC; VReg_32:%vreg704,%vreg702,%vreg700 %vreg707 = COPY %vreg325; VReg_32:%vreg707 SReg_32:%vreg325 %vreg706 = V_MUL_F32_e32 %vreg307:sub2, %vreg707, %EXEC; VReg_32:%vreg706,%vreg707 VReg_128:%vreg307 %vreg708 = V_ADD_F32_e32 %vreg706, %vreg704, %EXEC; VReg_32:%vreg708,%vreg706,%vreg704 %vreg711 = COPY %vreg346; VReg_32:%vreg711 SReg_32:%vreg346 %vreg710 = V_MUL_F32_e32 %vreg328:sub2, %vreg711, %EXEC; VReg_32:%vreg710,%vreg711 VReg_128:%vreg328 %vreg712 = V_ADD_F32_e32 %vreg710, %vreg708, %EXEC; VReg_32:%vreg712,%vreg710,%vreg708 %vreg715 = COPY %vreg367; VReg_32:%vreg715 SReg_32:%vreg367 %vreg714 = V_MUL_F32_e32 %vreg349:sub2, %vreg715, %EXEC; VReg_32:%vreg714,%vreg715 VReg_128:%vreg349 %vreg716 = V_ADD_F32_e32 %vreg714, %vreg712, %EXEC; VReg_32:%vreg716,%vreg714,%vreg712 %vreg719 = COPY %vreg388; VReg_32:%vreg719 SReg_32:%vreg388 %vreg718 = V_MUL_F32_e32 %vreg370:sub2, %vreg719, %EXEC; VReg_32:%vreg718,%vreg719 VReg_128:%vreg370 %vreg720 = V_ADD_F32_e32 %vreg718, %vreg716, %EXEC; VReg_32:%vreg720,%vreg718,%vreg716 %vreg723 = COPY %vreg409; VReg_32:%vreg723 SReg_32:%vreg409 %vreg722 = V_MUL_F32_e32 %vreg391:sub2, %vreg723, %EXEC; VReg_32:%vreg722,%vreg723 VReg_128:%vreg391 %vreg724 = V_ADD_F32_e32 %vreg722, %vreg720, %EXEC; VReg_32:%vreg724,%vreg722,%vreg720 %vreg727 = COPY %vreg430; VReg_32:%vreg727 SReg_32:%vreg430 %vreg726 = V_MUL_F32_e32 %vreg412:sub2, %vreg727, %EXEC; VReg_32:%vreg726,%vreg727 VReg_128:%vreg412 %vreg728 = V_ADD_F32_e32 %vreg726, %vreg724, %EXEC; VReg_32:%vreg728,%vreg726,%vreg724 %vreg731 = COPY %vreg451; VReg_32:%vreg731 SReg_32:%vreg451 %vreg730 = V_MUL_F32_e32 %vreg433:sub2, %vreg731, %EXEC; VReg_32:%vreg730,%vreg731 VReg_128:%vreg433 %vreg732 = V_ADD_F32_e32 %vreg730, %vreg728, %EXEC; VReg_32:%vreg732,%vreg730,%vreg728 %vreg735 = COPY %vreg472; VReg_32:%vreg735 SReg_32:%vreg472 %vreg734 = V_MUL_F32_e32 %vreg454:sub2, %vreg735, %EXEC; VReg_32:%vreg734,%vreg735 VReg_128:%vreg454 %vreg736 = V_ADD_F32_e32 %vreg734, %vreg732, %EXEC; VReg_32:%vreg736,%vreg734,%vreg732 %vreg739 = COPY %vreg493; VReg_32:%vreg739 SReg_32:%vreg493 %vreg738 = V_MUL_F32_e32 %vreg475:sub2, %vreg739, %EXEC; VReg_32:%vreg738,%vreg739 VReg_128:%vreg475 %vreg740 = V_ADD_F32_e32 %vreg738, %vreg736, %EXEC; VReg_32:%vreg740,%vreg738,%vreg736 %vreg743 = COPY %vreg514; VReg_32:%vreg743 SReg_32:%vreg514 %vreg742 = V_MUL_F32_e32 %vreg496:sub2, %vreg743, %EXEC; VReg_32:%vreg742,%vreg743 VReg_128:%vreg496 %vreg744 = V_ADD_F32_e32 %vreg742, %vreg740, %EXEC; VReg_32:%vreg744,%vreg742,%vreg740 %vreg747 = COPY %vreg535; VReg_32:%vreg747 SReg_32:%vreg535 %vreg746 = V_MUL_F32_e32 %vreg517:sub2, %vreg747, %EXEC; VReg_32:%vreg746,%vreg747 VReg_128:%vreg517 %vreg748 = V_ADD_F32_e32 %vreg746, %vreg744, %EXEC; VReg_32:%vreg748,%vreg746,%vreg744 %vreg751 = COPY %vreg556; VReg_32:%vreg751 SReg_32:%vreg556 %vreg750 = V_MUL_F32_e32 %vreg538:sub2, %vreg751, %EXEC; VReg_32:%vreg750,%vreg751 VReg_128:%vreg538 %vreg752 = V_ADD_F32_e32 %vreg750, %vreg748, %EXEC; VReg_32:%vreg752,%vreg750,%vreg748 %vreg755 = COPY %vreg577; VReg_32:%vreg755 SReg_32:%vreg577 %vreg754 = V_MUL_F32_e32 %vreg559:sub2, %vreg755, %EXEC; VReg_32:%vreg754,%vreg755 VReg_128:%vreg559 %vreg756 = V_ADD_F32_e32 %vreg754, %vreg752, %EXEC; VReg_32:%vreg756,%vreg754,%vreg752 %vreg759 = COPY %vreg598; VReg_32:%vreg759 SReg_32:%vreg598 %vreg758 = V_MUL_F32_e32 %vreg580:sub2, %vreg759, %EXEC; VReg_32:%vreg758,%vreg759 VReg_128:%vreg580 %vreg760 = V_ADD_F32_e32 %vreg758, %vreg756, %EXEC; VReg_32:%vreg760,%vreg758,%vreg756 %vreg763 = COPY %vreg619; VReg_32:%vreg763 SReg_32:%vreg619 %vreg762 = V_MUL_F32_e32 %vreg601:sub2, %vreg763, %EXEC; VReg_32:%vreg762,%vreg763 VReg_128:%vreg601 %vreg764 = V_ADD_F32_e32 %vreg762, %vreg760, %EXEC; VReg_32:%vreg764,%vreg762,%vreg760 %vreg767 = COPY %vreg640; VReg_32:%vreg767 SReg_32:%vreg640 %vreg766 = V_MUL_F32_e32 %vreg622:sub2, %vreg767, %EXEC; VReg_32:%vreg766,%vreg767 VReg_128:%vreg622 %vreg768 = V_ADD_F32_e32 %vreg766, %vreg764, %EXEC; VReg_32:%vreg768,%vreg766,%vreg764 %vreg770 = S_LOAD_DWORD_IMM %vreg0, 62; mem:LD4[%1347] SReg_32:%vreg770 SReg_64:%vreg0 %vreg772 = COPY %vreg770; VReg_32:%vreg772 SReg_32:%vreg770 %vreg771 = V_MUL_F32_e32 %vreg643:sub2, %vreg772, %EXEC; VReg_32:%vreg771,%vreg772 VReg_128:%vreg643 %vreg773 = V_ADD_F32_e32 %vreg771, %vreg768, %EXEC; VReg_32:%vreg773,%vreg771,%vreg768 %vreg774 = V_ADD_F32_e64 %vreg773, 128, 128, 0, 1, 0, 0, %EXEC; VReg_32:%vreg774,%vreg773 %vreg775 = V_CVT_PKRTZ_F16_F32_e32 %vreg774, %vreg649, %EXEC; VReg_32:%vreg775,%vreg774,%vreg649 %vreg778 = COPY %vreg51; VReg_32:%vreg778 SReg_32:%vreg51 %vreg777 = V_MUL_F32_e32 %vreg31:sub1, %vreg778, %EXEC; VReg_32:%vreg777,%vreg778 VReg_128:%vreg31 %vreg781 = COPY %vreg26; VReg_32:%vreg781 SReg_32:%vreg26 %vreg780 = V_MUL_F32_e32 %vreg14:sub1, %vreg781, %EXEC; VReg_32:%vreg780,%vreg781 VReg_128:%vreg14 %vreg782 = V_ADD_F32_e32 %vreg777, %vreg780, %EXEC; VReg_32:%vreg782,%vreg777,%vreg780 %vreg785 = COPY %vreg72; VReg_32:%vreg785 SReg_32:%vreg72 %vreg784 = V_MUL_F32_e32 %vreg55:sub1, %vreg785, %EXEC; VReg_32:%vreg784,%vreg785 VReg_128:%vreg55 %vreg786 = V_ADD_F32_e32 %vreg784, %vreg782, %EXEC; VReg_32:%vreg786,%vreg784,%vreg782 %vreg789 = COPY %vreg93; VReg_32:%vreg789 SReg_32:%vreg93 %vreg788 = V_MUL_F32_e32 %vreg76:sub1, %vreg789, %EXEC; VReg_32:%vreg788,%vreg789 VReg_128:%vreg76 %vreg790 = V_ADD_F32_e32 %vreg788, %vreg786, %EXEC; VReg_32:%vreg790,%vreg788,%vreg786 %vreg793 = COPY %vreg114; VReg_32:%vreg793 SReg_32:%vreg114 %vreg792 = V_MUL_F32_e32 %vreg97:sub1, %vreg793, %EXEC; VReg_32:%vreg792,%vreg793 VReg_128:%vreg97 %vreg794 = V_ADD_F32_e32 %vreg792, %vreg790, %EXEC; VReg_32:%vreg794,%vreg792,%vreg790 %vreg797 = COPY %vreg135; VReg_32:%vreg797 SReg_32:%vreg135 %vreg796 = V_MUL_F32_e32 %vreg118:sub1, %vreg797, %EXEC; VReg_32:%vreg796,%vreg797 VReg_128:%vreg118 %vreg798 = V_ADD_F32_e32 %vreg796, %vreg794, %EXEC; VReg_32:%vreg798,%vreg796,%vreg794 %vreg801 = COPY %vreg156; VReg_32:%vreg801 SReg_32:%vreg156 %vreg800 = V_MUL_F32_e32 %vreg139:sub1, %vreg801, %EXEC; VReg_32:%vreg800,%vreg801 VReg_128:%vreg139 %vreg802 = V_ADD_F32_e32 %vreg800, %vreg798, %EXEC; VReg_32:%vreg802,%vreg800,%vreg798 %vreg805 = COPY %vreg177; VReg_32:%vreg805 SReg_32:%vreg177 %vreg804 = V_MUL_F32_e32 %vreg160:sub1, %vreg805, %EXEC; VReg_32:%vreg804,%vreg805 VReg_128:%vreg160 %vreg806 = V_ADD_F32_e32 %vreg804, %vreg802, %EXEC; VReg_32:%vreg806,%vreg804,%vreg802 %vreg809 = COPY %vreg198; VReg_32:%vreg809 SReg_32:%vreg198 %vreg808 = V_MUL_F32_e32 %vreg181:sub1, %vreg809, %EXEC; VReg_32:%vreg808,%vreg809 VReg_128:%vreg181 %vreg810 = V_ADD_F32_e32 %vreg808, %vreg806, %EXEC; VReg_32:%vreg810,%vreg808,%vreg806 %vreg813 = COPY %vreg219; VReg_32:%vreg813 SReg_32:%vreg219 %vreg812 = V_MUL_F32_e32 %vreg202:sub1, %vreg813, %EXEC; VReg_32:%vreg812,%vreg813 VReg_128:%vreg202 %vreg814 = V_ADD_F32_e32 %vreg812, %vreg810, %EXEC; VReg_32:%vreg814,%vreg812,%vreg810 %vreg817 = COPY %vreg240; VReg_32:%vreg817 SReg_32:%vreg240 %vreg816 = V_MUL_F32_e32 %vreg223:sub1, %vreg817, %EXEC; VReg_32:%vreg816,%vreg817 VReg_128:%vreg223 %vreg818 = V_ADD_F32_e32 %vreg816, %vreg814, %EXEC; VReg_32:%vreg818,%vreg816,%vreg814 %vreg821 = COPY %vreg261; VReg_32:%vreg821 SReg_32:%vreg261 %vreg820 = V_MUL_F32_e32 %vreg244:sub1, %vreg821, %EXEC; VReg_32:%vreg820,%vreg821 VReg_128:%vreg244 %vreg822 = V_ADD_F32_e32 %vreg820, %vreg818, %EXEC; VReg_32:%vreg822,%vreg820,%vreg818 %vreg825 = COPY %vreg282; VReg_32:%vreg825 SReg_32:%vreg282 %vreg824 = V_MUL_F32_e32 %vreg265:sub1, %vreg825, %EXEC; VReg_32:%vreg824,%vreg825 VReg_128:%vreg265 %vreg826 = V_ADD_F32_e32 %vreg824, %vreg822, %EXEC; VReg_32:%vreg826,%vreg824,%vreg822 %vreg829 = COPY %vreg303; VReg_32:%vreg829 SReg_32:%vreg303 %vreg828 = V_MUL_F32_e32 %vreg286:sub1, %vreg829, %EXEC; VReg_32:%vreg828,%vreg829 VReg_128:%vreg286 %vreg830 = V_ADD_F32_e32 %vreg828, %vreg826, %EXEC; VReg_32:%vreg830,%vreg828,%vreg826 %vreg833 = COPY %vreg324; VReg_32:%vreg833 SReg_32:%vreg324 %vreg832 = V_MUL_F32_e32 %vreg307:sub1, %vreg833, %EXEC; VReg_32:%vreg832,%vreg833 VReg_128:%vreg307 %vreg834 = V_ADD_F32_e32 %vreg832, %vreg830, %EXEC; VReg_32:%vreg834,%vreg832,%vreg830 %vreg837 = COPY %vreg345; VReg_32:%vreg837 SReg_32:%vreg345 %vreg836 = V_MUL_F32_e32 %vreg328:sub1, %vreg837, %EXEC; VReg_32:%vreg836,%vreg837 VReg_128:%vreg328 %vreg838 = V_ADD_F32_e32 %vreg836, %vreg834, %EXEC; VReg_32:%vreg838,%vreg836,%vreg834 %vreg841 = COPY %vreg366; VReg_32:%vreg841 SReg_32:%vreg366 %vreg840 = V_MUL_F32_e32 %vreg349:sub1, %vreg841, %EXEC; VReg_32:%vreg840,%vreg841 VReg_128:%vreg349 %vreg842 = V_ADD_F32_e32 %vreg840, %vreg838, %EXEC; VReg_32:%vreg842,%vreg840,%vreg838 %vreg845 = COPY %vreg387; VReg_32:%vreg845 SReg_32:%vreg387 %vreg844 = V_MUL_F32_e32 %vreg370:sub1, %vreg845, %EXEC; VReg_32:%vreg844,%vreg845 VReg_128:%vreg370 %vreg846 = V_ADD_F32_e32 %vreg844, %vreg842, %EXEC; VReg_32:%vreg846,%vreg844,%vreg842 %vreg849 = COPY %vreg408; VReg_32:%vreg849 SReg_32:%vreg408 %vreg848 = V_MUL_F32_e32 %vreg391:sub1, %vreg849, %EXEC; VReg_32:%vreg848,%vreg849 VReg_128:%vreg391 %vreg850 = V_ADD_F32_e32 %vreg848, %vreg846, %EXEC; VReg_32:%vreg850,%vreg848,%vreg846 %vreg853 = COPY %vreg429; VReg_32:%vreg853 SReg_32:%vreg429 %vreg852 = V_MUL_F32_e32 %vreg412:sub1, %vreg853, %EXEC; VReg_32:%vreg852,%vreg853 VReg_128:%vreg412 %vreg854 = V_ADD_F32_e32 %vreg852, %vreg850, %EXEC; VReg_32:%vreg854,%vreg852,%vreg850 %vreg857 = COPY %vreg450; VReg_32:%vreg857 SReg_32:%vreg450 %vreg856 = V_MUL_F32_e32 %vreg433:sub1, %vreg857, %EXEC; VReg_32:%vreg856,%vreg857 VReg_128:%vreg433 %vreg858 = V_ADD_F32_e32 %vreg856, %vreg854, %EXEC; VReg_32:%vreg858,%vreg856,%vreg854 %vreg861 = COPY %vreg471; VReg_32:%vreg861 SReg_32:%vreg471 %vreg860 = V_MUL_F32_e32 %vreg454:sub1, %vreg861, %EXEC; VReg_32:%vreg860,%vreg861 VReg_128:%vreg454 %vreg862 = V_ADD_F32_e32 %vreg860, %vreg858, %EXEC; VReg_32:%vreg862,%vreg860,%vreg858 %vreg865 = COPY %vreg492; VReg_32:%vreg865 SReg_32:%vreg492 %vreg864 = V_MUL_F32_e32 %vreg475:sub1, %vreg865, %EXEC; VReg_32:%vreg864,%vreg865 VReg_128:%vreg475 %vreg866 = V_ADD_F32_e32 %vreg864, %vreg862, %EXEC; VReg_32:%vreg866,%vreg864,%vreg862 %vreg869 = COPY %vreg513; VReg_32:%vreg869 SReg_32:%vreg513 %vreg868 = V_MUL_F32_e32 %vreg496:sub1, %vreg869, %EXEC; VReg_32:%vreg868,%vreg869 VReg_128:%vreg496 %vreg870 = V_ADD_F32_e32 %vreg868, %vreg866, %EXEC; VReg_32:%vreg870,%vreg868,%vreg866 %vreg873 = COPY %vreg534; VReg_32:%vreg873 SReg_32:%vreg534 %vreg872 = V_MUL_F32_e32 %vreg517:sub1, %vreg873, %EXEC; VReg_32:%vreg872,%vreg873 VReg_128:%vreg517 %vreg874 = V_ADD_F32_e32 %vreg872, %vreg870, %EXEC; VReg_32:%vreg874,%vreg872,%vreg870 %vreg877 = COPY %vreg555; VReg_32:%vreg877 SReg_32:%vreg555 %vreg876 = V_MUL_F32_e32 %vreg538:sub1, %vreg877, %EXEC; VReg_32:%vreg876,%vreg877 VReg_128:%vreg538 %vreg878 = V_ADD_F32_e32 %vreg876, %vreg874, %EXEC; VReg_32:%vreg878,%vreg876,%vreg874 %vreg881 = COPY %vreg576; VReg_32:%vreg881 SReg_32:%vreg576 %vreg880 = V_MUL_F32_e32 %vreg559:sub1, %vreg881, %EXEC; VReg_32:%vreg880,%vreg881 VReg_128:%vreg559 %vreg882 = V_ADD_F32_e32 %vreg880, %vreg878, %EXEC; VReg_32:%vreg882,%vreg880,%vreg878 %vreg885 = COPY %vreg597; VReg_32:%vreg885 SReg_32:%vreg597 %vreg884 = V_MUL_F32_e32 %vreg580:sub1, %vreg885, %EXEC; VReg_32:%vreg884,%vreg885 VReg_128:%vreg580 %vreg886 = V_ADD_F32_e32 %vreg884, %vreg882, %EXEC; VReg_32:%vreg886,%vreg884,%vreg882 %vreg889 = COPY %vreg618; VReg_32:%vreg889 SReg_32:%vreg618 %vreg888 = V_MUL_F32_e32 %vreg601:sub1, %vreg889, %EXEC; VReg_32:%vreg888,%vreg889 VReg_128:%vreg601 %vreg890 = V_ADD_F32_e32 %vreg888, %vreg886, %EXEC; VReg_32:%vreg890,%vreg888,%vreg886 %vreg893 = COPY %vreg639; VReg_32:%vreg893 SReg_32:%vreg639 %vreg892 = V_MUL_F32_e32 %vreg622:sub1, %vreg893, %EXEC; VReg_32:%vreg892,%vreg893 VReg_128:%vreg622 %vreg894 = V_ADD_F32_e32 %vreg892, %vreg890, %EXEC; VReg_32:%vreg894,%vreg892,%vreg890 %vreg896 = S_LOAD_DWORD_IMM %vreg0, 61; mem:LD4[%1342] SReg_32:%vreg896 SReg_64:%vreg0 %vreg898 = COPY %vreg896; VReg_32:%vreg898 SReg_32:%vreg896 %vreg897 = V_MUL_F32_e32 %vreg643:sub1, %vreg898, %EXEC; VReg_32:%vreg897,%vreg898 VReg_128:%vreg643 %vreg899 = V_ADD_F32_e32 %vreg897, %vreg894, %EXEC; VReg_32:%vreg899,%vreg897,%vreg894 %vreg900 = V_ADD_F32_e64 %vreg899, 128, 128, 0, 1, 0, 0, %EXEC; VReg_32:%vreg900,%vreg899 %vreg903 = COPY %vreg50; VReg_32:%vreg903 SReg_32:%vreg50 %vreg902 = V_MUL_F32_e32 %vreg31:sub0, %vreg903, %EXEC; VReg_32:%vreg902,%vreg903 VReg_128:%vreg31 %vreg906 = COPY %vreg25; VReg_32:%vreg906 SReg_32:%vreg25 %vreg905 = V_MUL_F32_e32 %vreg14:sub0, %vreg906, %EXEC; VReg_32:%vreg905,%vreg906 VReg_128:%vreg14 %vreg907 = V_ADD_F32_e32 %vreg902, %vreg905, %EXEC; VReg_32:%vreg907,%vreg902,%vreg905 %vreg910 = COPY %vreg71; VReg_32:%vreg910 SReg_32:%vreg71 %vreg909 = V_MUL_F32_e32 %vreg55:sub0, %vreg910, %EXEC; VReg_32:%vreg909,%vreg910 VReg_128:%vreg55 %vreg911 = V_ADD_F32_e32 %vreg909, %vreg907, %EXEC; VReg_32:%vreg911,%vreg909,%vreg907 %vreg914 = COPY %vreg92; VReg_32:%vreg914 SReg_32:%vreg92 %vreg913 = V_MUL_F32_e32 %vreg76:sub0, %vreg914, %EXEC; VReg_32:%vreg913,%vreg914 VReg_128:%vreg76 %vreg915 = V_ADD_F32_e32 %vreg913, %vreg911, %EXEC; VReg_32:%vreg915,%vreg913,%vreg911 %vreg918 = COPY %vreg113; VReg_32:%vreg918 SReg_32:%vreg113 %vreg917 = V_MUL_F32_e32 %vreg97:sub0, %vreg918, %EXEC; VReg_32:%vreg917,%vreg918 VReg_128:%vreg97 %vreg919 = V_ADD_F32_e32 %vreg917, %vreg915, %EXEC; VReg_32:%vreg919,%vreg917,%vreg915 %vreg922 = COPY %vreg134; VReg_32:%vreg922 SReg_32:%vreg134 %vreg921 = V_MUL_F32_e32 %vreg118:sub0, %vreg922, %EXEC; VReg_32:%vreg921,%vreg922 VReg_128:%vreg118 %vreg923 = V_ADD_F32_e32 %vreg921, %vreg919, %EXEC; VReg_32:%vreg923,%vreg921,%vreg919 %vreg926 = COPY %vreg155; VReg_32:%vreg926 SReg_32:%vreg155 %vreg925 = V_MUL_F32_e32 %vreg139:sub0, %vreg926, %EXEC; VReg_32:%vreg925,%vreg926 VReg_128:%vreg139 %vreg927 = V_ADD_F32_e32 %vreg925, %vreg923, %EXEC; VReg_32:%vreg927,%vreg925,%vreg923 %vreg930 = COPY %vreg176; VReg_32:%vreg930 SReg_32:%vreg176 %vreg929 = V_MUL_F32_e32 %vreg160:sub0, %vreg930, %EXEC; VReg_32:%vreg929,%vreg930 VReg_128:%vreg160 %vreg931 = V_ADD_F32_e32 %vreg929, %vreg927, %EXEC; VReg_32:%vreg931,%vreg929,%vreg927 %vreg934 = COPY %vreg197; VReg_32:%vreg934 SReg_32:%vreg197 %vreg933 = V_MUL_F32_e32 %vreg181:sub0, %vreg934, %EXEC; VReg_32:%vreg933,%vreg934 VReg_128:%vreg181 %vreg935 = V_ADD_F32_e32 %vreg933, %vreg931, %EXEC; VReg_32:%vreg935,%vreg933,%vreg931 %vreg938 = COPY %vreg218; VReg_32:%vreg938 SReg_32:%vreg218 %vreg937 = V_MUL_F32_e32 %vreg202:sub0, %vreg938, %EXEC; VReg_32:%vreg937,%vreg938 VReg_128:%vreg202 %vreg939 = V_ADD_F32_e32 %vreg937, %vreg935, %EXEC; VReg_32:%vreg939,%vreg937,%vreg935 %vreg942 = COPY %vreg239; VReg_32:%vreg942 SReg_32:%vreg239 %vreg941 = V_MUL_F32_e32 %vreg223:sub0, %vreg942, %EXEC; VReg_32:%vreg941,%vreg942 VReg_128:%vreg223 %vreg943 = V_ADD_F32_e32 %vreg941, %vreg939, %EXEC; VReg_32:%vreg943,%vreg941,%vreg939 %vreg946 = COPY %vreg260; VReg_32:%vreg946 SReg_32:%vreg260 %vreg945 = V_MUL_F32_e32 %vreg244:sub0, %vreg946, %EXEC; VReg_32:%vreg945,%vreg946 VReg_128:%vreg244 %vreg947 = V_ADD_F32_e32 %vreg945, %vreg943, %EXEC; VReg_32:%vreg947,%vreg945,%vreg943 %vreg950 = COPY %vreg281; VReg_32:%vreg950 SReg_32:%vreg281 %vreg949 = V_MUL_F32_e32 %vreg265:sub0, %vreg950, %EXEC; VReg_32:%vreg949,%vreg950 VReg_128:%vreg265 %vreg951 = V_ADD_F32_e32 %vreg949, %vreg947, %EXEC; VReg_32:%vreg951,%vreg949,%vreg947 %vreg954 = COPY %vreg302; VReg_32:%vreg954 SReg_32:%vreg302 %vreg953 = V_MUL_F32_e32 %vreg286:sub0, %vreg954, %EXEC; VReg_32:%vreg953,%vreg954 VReg_128:%vreg286 %vreg955 = V_ADD_F32_e32 %vreg953, %vreg951, %EXEC; VReg_32:%vreg955,%vreg953,%vreg951 %vreg958 = COPY %vreg323; VReg_32:%vreg958 SReg_32:%vreg323 %vreg957 = V_MUL_F32_e32 %vreg307:sub0, %vreg958, %EXEC; VReg_32:%vreg957,%vreg958 VReg_128:%vreg307 %vreg959 = V_ADD_F32_e32 %vreg957, %vreg955, %EXEC; VReg_32:%vreg959,%vreg957,%vreg955 %vreg962 = COPY %vreg344; VReg_32:%vreg962 SReg_32:%vreg344 %vreg961 = V_MUL_F32_e32 %vreg328:sub0, %vreg962, %EXEC; VReg_32:%vreg961,%vreg962 VReg_128:%vreg328 %vreg963 = V_ADD_F32_e32 %vreg961, %vreg959, %EXEC; VReg_32:%vreg963,%vreg961,%vreg959 %vreg966 = COPY %vreg365; VReg_32:%vreg966 SReg_32:%vreg365 %vreg965 = V_MUL_F32_e32 %vreg349:sub0, %vreg966, %EXEC; VReg_32:%vreg965,%vreg966 VReg_128:%vreg349 %vreg967 = V_ADD_F32_e32 %vreg965, %vreg963, %EXEC; VReg_32:%vreg967,%vreg965,%vreg963 %vreg970 = COPY %vreg386; VReg_32:%vreg970 SReg_32:%vreg386 %vreg969 = V_MUL_F32_e32 %vreg370:sub0, %vreg970, %EXEC; VReg_32:%vreg969,%vreg970 VReg_128:%vreg370 %vreg971 = V_ADD_F32_e32 %vreg969, %vreg967, %EXEC; VReg_32:%vreg971,%vreg969,%vreg967 %vreg974 = COPY %vreg407; VReg_32:%vreg974 SReg_32:%vreg407 %vreg973 = V_MUL_F32_e32 %vreg391:sub0, %vreg974, %EXEC; VReg_32:%vreg973,%vreg974 VReg_128:%vreg391 %vreg975 = V_ADD_F32_e32 %vreg973, %vreg971, %EXEC; VReg_32:%vreg975,%vreg973,%vreg971 %vreg978 = COPY %vreg428; VReg_32:%vreg978 SReg_32:%vreg428 %vreg977 = V_MUL_F32_e32 %vreg412:sub0, %vreg978, %EXEC; VReg_32:%vreg977,%vreg978 VReg_128:%vreg412 %vreg979 = V_ADD_F32_e32 %vreg977, %vreg975, %EXEC; VReg_32:%vreg979,%vreg977,%vreg975 %vreg982 = COPY %vreg449; VReg_32:%vreg982 SReg_32:%vreg449 %vreg981 = V_MUL_F32_e32 %vreg433:sub0, %vreg982, %EXEC; VReg_32:%vreg981,%vreg982 VReg_128:%vreg433 %vreg983 = V_ADD_F32_e32 %vreg981, %vreg979, %EXEC; VReg_32:%vreg983,%vreg981,%vreg979 %vreg986 = COPY %vreg470; VReg_32:%vreg986 SReg_32:%vreg470 %vreg985 = V_MUL_F32_e32 %vreg454:sub0, %vreg986, %EXEC; VReg_32:%vreg985,%vreg986 VReg_128:%vreg454 %vreg987 = V_ADD_F32_e32 %vreg985, %vreg983, %EXEC; VReg_32:%vreg987,%vreg985,%vreg983 %vreg990 = COPY %vreg491; VReg_32:%vreg990 SReg_32:%vreg491 %vreg989 = V_MUL_F32_e32 %vreg475:sub0, %vreg990, %EXEC; VReg_32:%vreg989,%vreg990 VReg_128:%vreg475 %vreg991 = V_ADD_F32_e32 %vreg989, %vreg987, %EXEC; VReg_32:%vreg991,%vreg989,%vreg987 %vreg994 = COPY %vreg512; VReg_32:%vreg994 SReg_32:%vreg512 %vreg993 = V_MUL_F32_e32 %vreg496:sub0, %vreg994, %EXEC; VReg_32:%vreg993,%vreg994 VReg_128:%vreg496 %vreg995 = V_ADD_F32_e32 %vreg993, %vreg991, %EXEC; VReg_32:%vreg995,%vreg993,%vreg991 %vreg998 = COPY %vreg533; VReg_32:%vreg998 SReg_32:%vreg533 %vreg997 = V_MUL_F32_e32 %vreg517:sub0, %vreg998, %EXEC; VReg_32:%vreg997,%vreg998 VReg_128:%vreg517 %vreg999 = V_ADD_F32_e32 %vreg997, %vreg995, %EXEC; VReg_32:%vreg999,%vreg997,%vreg995 %vreg1002 = COPY %vreg554; VReg_32:%vreg1002 SReg_32:%vreg554 %vreg1001 = V_MUL_F32_e32 %vreg538:sub0, %vreg1002, %EXEC; VReg_32:%vreg1001,%vreg1002 VReg_128:%vreg538 %vreg1003 = V_ADD_F32_e32 %vreg1001, %vreg999, %EXEC; VReg_32:%vreg1003,%vreg1001,%vreg999 %vreg1006 = COPY %vreg575; VReg_32:%vreg1006 SReg_32:%vreg575 %vreg1005 = V_MUL_F32_e32 %vreg559:sub0, %vreg1006, %EXEC; VReg_32:%vreg1005,%vreg1006 VReg_128:%vreg559 %vreg1007 = V_ADD_F32_e32 %vreg1005, %vreg1003, %EXEC; VReg_32:%vreg1007,%vreg1005,%vreg1003 %vreg1010 = COPY %vreg596; VReg_32:%vreg1010 SReg_32:%vreg596 %vreg1009 = V_MUL_F32_e32 %vreg580:sub0, %vreg1010, %EXEC; VReg_32:%vreg1009,%vreg1010 VReg_128:%vreg580 %vreg1011 = V_ADD_F32_e32 %vreg1009, %vreg1007, %EXEC; VReg_32:%vreg1011,%vreg1009,%vreg1007 %vreg1014 = COPY %vreg617; VReg_32:%vreg1014 SReg_32:%vreg617 %vreg1013 = V_MUL_F32_e32 %vreg601:sub0, %vreg1014, %EXEC; VReg_32:%vreg1013,%vreg1014 VReg_128:%vreg601 %vreg1015 = V_ADD_F32_e32 %vreg1013, %vreg1011, %EXEC; VReg_32:%vreg1015,%vreg1013,%vreg1011 %vreg1018 = COPY %vreg638; VReg_32:%vreg1018 SReg_32:%vreg638 %vreg1017 = V_MUL_F32_e32 %vreg622:sub0, %vreg1018, %EXEC; VReg_32:%vreg1017,%vreg1018 VReg_128:%vreg622 %vreg1019 = V_ADD_F32_e32 %vreg1017, %vreg1015, %EXEC; VReg_32:%vreg1019,%vreg1017,%vreg1015 %vreg1021 = S_LOAD_DWORD_IMM %vreg0, 60; mem:LD4[%1337] SReg_32:%vreg1021 SReg_64:%vreg0 %vreg1023 = COPY %vreg1021; VReg_32:%vreg1023 SReg_32:%vreg1021 %vreg1022 = V_MUL_F32_e32 %vreg643:sub0, %vreg1023, %EXEC; VReg_32:%vreg1022,%vreg1023 VReg_128:%vreg643 %vreg1024 = V_ADD_F32_e32 %vreg1022, %vreg1019, %EXEC; VReg_32:%vreg1024,%vreg1022,%vreg1019 %vreg1025 = V_ADD_F32_e64 %vreg1024, 128, 128, 0, 1, 0, 0, %EXEC; VReg_32:%vreg1025,%vreg1024 %vreg1026 = V_CVT_PKRTZ_F16_F32_e32 %vreg1025, %vreg900, %EXEC; VReg_32:%vreg1026,%vreg1025,%vreg900 EXP 15, 0, 1, 1, 1, %vreg1026, %vreg775, %vreg1026, %vreg775, %EXEC; VReg_32:%vreg1026,%vreg775,%vreg775 S_ENDPGM # End machine code for function main. *** Bad machine code: Using an undefined physical register *** - function: main - basic block: BB#0 main_body (0x1dbaeb0) - instruction: %EXEC = S_WQM_B64 %EXEC - operand 1: %EXEC LLVM ERROR: Found 1 machine code errors. QThreadStorage: Thread 0x13e1910 exited after QThreadStorage 32 destroyed QThreadStorage: Thread 0x13e1910 exited after QThreadStorage 31 destroyed QThreadStorage: Thread 0x13e1910 exited after QThreadStorage 30 destroyed