DCC: 0x00000000 () CHDECMISC: 0x16f000e8 (XOR bank, ch2 enh disabled, ch1 enh enabled, ch0 enh disabled, flex disabled, ep not present) C0DRB0: 0x00000000 (0x0000) C0DRB1: 0x00000000 (0x0000) C0DRB2: 0x00000000 (0x0000) C0DRB3: 0x00000000 (0x0000) C1DRB0: 0x5f1090a0 (0x90a0) C1DRB1: 0x694c5f10 (0x5f10) C1DRB2: 0x6f4c694c (0x694c) C1DRB3: 0x00066f4c (0x6f4c) C0DRA01: 0x00000000 (0x0000) C0DRA23: 0x00000000 (0x0000) C1DRA01: 0x01560006 (0x0006) C1DRA23: 0x03810156 (0x0156) PGETBL_CTL: 0x2ffe0001 VCLK_DIVISOR_VGA0: 0x00021207 (n = 2, m1 = 18, m2 = 7) VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) VCLK_POST_DIV: 0x0000888b (vga0 p1 = 13, p2 = 4, vga1 p1 = 10, p2 = 4) DPLL_TEST: 0x00000000 (, DPLLA input buffer disabled, DPLLB input buffer disabled) CACHE_MODE_0: 0x00000000 D_STATE: 0x00000000 DSPCLK_GATE_D: 0x00000008 (clock gates disabled: OVRUNIT) RENCLK_GATE_D1: 0x00000000 RENCLK_GATE_D2: 0x00000000 SDVOB: 0x00000000 (disabled, pipe A, stall disabled, not detected) SDVOC: 0x00000000 (disabled, pipe A, stall disabled, not detected) SDVOUDI: 0x00000000 DSPARB: 0x0000005f DSPFW1: 0x00000000 DSPFW2: 0x00000000 DSPFW3: 0x00000000 ADPA: 0x80000018 (enabled, pipe A, +hsync, +vsync) LVDS: 0x0000b011 (disabled, pipe A, 18 bit, 1 channel) DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOB: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOC: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOA_SRCDIM: 0x00000000 DVOB_SRCDIM: 0x00000000 DVOC_SRCDIM: 0x00000000 BLC_PWM_CTL: 0x00000000 BLC_PWM_CTL2: 0x00000000 PP_CONTROL: 0x00000000 (power target: off) PP_STATUS: 0x00000000 (off, not ready, sequencing idle) PP_ON_DELAYS: 0x00000000 PP_OFF_DELAYS: 0x00000000 PP_DIVISOR: 0x00000000 PFIT_CONTROL: 0x00000000 PFIT_PGM_RATIOS: 0x00000000 PORT_HOTPLUG_EN: 0x00000000 PORT_HOTPLUG_STAT: 0x00000000 DSPACNTR: 0xd8000000 (enabled, pipe A) DSPASTRIDE: 0x00002000 (8192 bytes) DSPAPOS: 0x00000000 (0, 0) DSPASIZE: 0x00000000 (1, 1) DSPABASE: 0x00800000 DSPASURF: 0x00000000 DSPATILEOFF: 0x00000000 PIPEACONF: 0x80000000 (enabled, single-wide) PIPEASRC: 0x04ff03ff (1280, 1024) PIPEASTAT: 0x00000207 (status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) PIPEA_GMCH_DATA_M: 0x00000000 PIPEA_GMCH_DATA_N: 0x00000000 PIPEA_DP_LINK_M: 0x00000000 PIPEA_DP_LINK_N: 0x00000000 CURSOR_A_BASE: 0x01000000 CURSOR_A_CONTROL: 0xc4000000 CURSOR_A_POSITION: 0x0162029f FPA0: 0x0003160d (n = 3, m1 = 22, m2 = 13) FPA1: 0x0003160d (n = 3, m1 = 22, m2 = 13) DPLL_A: 0x90810000 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 3, p2 = 4) DPLL_A_MD: 0x00000000 HTOTAL_A: 0x069704ff (1280 active, 1688 total) HBLANK_A: 0x069704ff (1280 start, 1688 end) HSYNC_A: 0x059f052f (1328 start, 1440 end) VTOTAL_A: 0x042903ff (1024 active, 1066 total) VBLANK_A: 0x042903ff (1024 start, 1066 end) VSYNC_A: 0x04030400 (1025 start, 1028 end) BCLRPAT_A: 0x00000000 VSYNCSHIFT_A: 0x00000000 DSPBCNTR: 0x00000000 (disabled, pipe A) DSPBSTRIDE: 0x00000000 (0 bytes) DSPBPOS: 0x00000000 (0, 0) DSPBSIZE: 0x00000000 (1, 1) DSPBBASE: 0x00000000 DSPBSURF: 0x00000000 DSPBTILEOFF: 0x00000000 PIPEBCONF: 0x00000000 (disabled, single-wide) PIPEBSRC: 0x00000000 (1, 1) PIPEBSTAT: 0x00000000 (status:) PIPEB_GMCH_DATA_M: 0x00000000 PIPEB_GMCH_DATA_N: 0x00000000 PIPEB_DP_LINK_M: 0x00000000 PIPEB_DP_LINK_N: 0x00000000 CURSOR_B_BASE: 0x00000000 CURSOR_B_CONTROL: 0x00000000 CURSOR_B_POSITION: 0x00000000 FPB0: 0x00000000 (n = 0, m1 = 0, m2 = 0) FPB1: 0x00000000 (n = 0, m1 = 0, m2 = 0) DPLL_B: 0x00000000 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 2, p2 = 2) DPLL_B_MD: 0x00000000 HTOTAL_B: 0x00000000 (1 active, 1 total) HBLANK_B: 0x00000000 (1 start, 1 end) HSYNC_B: 0x00000000 (1 start, 1 end) VTOTAL_B: 0x00000000 (1 active, 1 total) VBLANK_B: 0x00000000 (1 start, 1 end) VSYNC_B: 0x00000000 (1 start, 1 end) BCLRPAT_B: 0x00000000 VSYNCSHIFT_B: 0x00000000 VCLK_DIVISOR_VGA0: 0x00021207 VCLK_DIVISOR_VGA1: 0x00031406 VCLK_POST_DIV: 0x0000888b VGACNTRL: 0x80000000 (disabled) TV_CTL: 0x069704ff TV_DAC: 0x069704ff TV_CSC_Y: 0x042903ff TV_CSC_Y2: 0x04030400 TV_CSC_U: 0x00000000 TV_CSC_U2: 0x04ff03ff TV_CSC_V: 0x00000000 TV_CSC_V2: 0x00000000 TV_CLR_KNOBS: 0x00000000 TV_CLR_LEVEL: 0x00000000 TV_H_CTL_1: 0x00000000 TV_H_CTL_2: 0x00000000 TV_H_CTL_3: 0x00000000 TV_V_CTL_1: 0x00000000 TV_V_CTL_2: 0x00000000 TV_V_CTL_3: 0x00000000 TV_V_CTL_4: 0x00000000 TV_V_CTL_5: 0x00000000 TV_V_CTL_6: 0x00000000 TV_V_CTL_7: 0x00000000 TV_SC_CTL_1: 0x000248c3 TV_SC_CTL_2: 0x0014cc0c TV_SC_CTL_3: 0x00000000 TV_WIN_POS: 0x00000000 TV_WIN_SIZE: 0x00000000 TV_FILTER_CTL_1: 0x00000000 TV_FILTER_CTL_2: 0x00000000 TV_FILTER_CTL_3: 0x00000000 TV_CC_CONTROL: 0x00000000 TV_CC_DATA: 0x00000000 TV_H_LUMA_0: 0x00000000 TV_H_LUMA_59: 0x00000000 TV_H_CHROMA_0: 0x069704ff TV_H_CHROMA_59: 0x00000000 FBC_CFB_BASE: 0x00000000 FBC_LL_BASE: 0x00000000 FBC_CONTROL: 0x00000000 FBC_COMMAND: 0x00000000 FBC_STATUS: 0x00000000 FBC_CONTROL2: 0x00000000 FBC_FENCE_OFF: 0x00000000 FBC_MOD_NUM: 0x00000000 MI_MODE: 0x00000000 MI_ARB_STATE: 0x00000000 MI_RDRET_STATE: 0x00000000 ECOSKPD: 0x00000307 DP_B: 0x00000000 DPB_AUX_CH_CTL: 0x00000000 DPB_AUX_CH_DATA1: 0x00000000 DPB_AUX_CH_DATA2: 0x00000000 DPB_AUX_CH_DATA3: 0x00000000 DPB_AUX_CH_DATA4: 0x00000000 DPB_AUX_CH_DATA5: 0x00000000 DP_C: 0x069704ff DPC_AUX_CH_CTL: 0x042903ff DPC_AUX_CH_DATA1: 0x04030400 DPC_AUX_CH_DATA2: 0x00000000 DPC_AUX_CH_DATA3: 0x04ff03ff DPC_AUX_CH_DATA4: 0x00000000 DPC_AUX_CH_DATA5: 0x00000000 DP_D: 0x00000000 DPD_AUX_CH_CTL: 0x00000000 DPD_AUX_CH_DATA1: 0x00000000 DPD_AUX_CH_DATA2: 0x00000000 DPD_AUX_CH_DATA3: 0x00000000 DPD_AUX_CH_DATA4: 0x00000000 DPD_AUX_CH_DATA5: 0x00000000 AUD_CONFIG: 0x069704ff AUD_HDMIW_STATUS: 0x00000000 AUD_CONV_CHCNT: 0x00000000 VIDEO_DIP_CTL: 0x00000000 AUD_PINW_CNTR: 0x00000000 AUD_CNTL_ST: 0x00000000 AUD_PIN_CAP: 0x00000000 AUD_PINW_CAP: 0x00000000 AUD_PINW_UNSOLRESP: 0x00000000 AUD_OUT_DIG_CNVT: 0x00000000 AUD_OUT_CWCAP: 0x00000000 AUD_GRP_CAP: 0x00000000 FENCE 0: 0x00800461 (enabled, X tiled, 32768 pitch, 0x00800000 - 0x01800000 (16384kb)) FENCE 1: 0x01800021 (enabled, X tiled, 2048 pitch, 0x01800000 - 0x01900000 (1024kb)) FENCE 2: 0x02e80021 (enabled, X tiled, 2048 pitch, 0x02e00000 - 0x02f00000 (1024kb)) FENCE 3: 0x01700021 (enabled, X tiled, 2048 pitch, 0x01700000 - 0x01800000 (1024kb)) FENCE 4: 0x02f00051 (enabled, X tiled, 16384 pitch, 0x02f00000 - 0x03000000 (1024kb)) FENCE 5: 0x02a80051 (enabled, X tiled, 16384 pitch, 0x02a00000 - 0x02b00000 (1024kb)) FENCE 6: 0x02d00041 (enabled, X tiled, 8192 pitch, 0x02d00000 - 0x02e00000 (1024kb)) FENCE 7: 0x02d80041 (enabled, X tiled, 8192 pitch, 0x02d00000 - 0x02e00000 (1024kb)) FENCE 8: 0x00000000 (disabled) FENCE 9: 0x00000000 (disabled) FENCE 10: 0x00000000 (disabled) FENCE 11: 0x00000000 (disabled) FENCE 12: 0x00000000 (disabled) FENCE 13: 0x00000000 (disabled) FENCE 14: 0x00000000 (disabled) FENCE 15: 0x00000000 (disabled) FENCE START 0: 0x00000000 (disabled) FENCE END 0: 0x00000000 (disabled) FENCE START 1: 0x00000000 (disabled) FENCE END 1: 0x00000000 (disabled) FENCE START 2: 0x00000000 (disabled) FENCE END 2: 0x00000000 (disabled) FENCE START 3: 0x00000000 (disabled) FENCE END 3: 0x00000000 (disabled) FENCE START 4: 0x00000000 (disabled) FENCE END 4: 0x00000000 (disabled) FENCE START 5: 0x00000000 (disabled) FENCE END 5: 0x00000000 (disabled) FENCE START 6: 0x00000000 (disabled) FENCE END 6: 0x00000000 (disabled) FENCE START 7: 0x00000000 (disabled) FENCE END 7: 0x00000000 (disabled) FENCE START 8: 0x00000000 (disabled) FENCE END 8: 0x00000000 (disabled) FENCE START 9: 0x00000000 (disabled) FENCE END 9: 0x00000000 (disabled) FENCE START 10: 0x00000000 (disabled) FENCE END 10: 0x00000000 (disabled) FENCE START 11: 0x00000000 (disabled) FENCE END 11: 0x00000000 (disabled) FENCE START 12: 0x00000000 (disabled) FENCE END 12: 0x00000000 (disabled) FENCE START 13: 0x00000000 (disabled) FENCE END 13: 0x00000000 (disabled) FENCE START 14: 0x00000000 (disabled) FENCE END 14: 0x00000000 (disabled) FENCE START 15: 0x00000000 (disabled) FENCE END 15: 0x00000000 (disabled) INST_PM: 0x00000000 pipe A dot 108000 n 3 m1 22 m2 13 p1 3 p2 4 pipe B dot 72000 n 0 m1 0 m2 0 p1 2 p2 2