From 4a6f7edd1d375a5b303e05dfda13f4497800b2c9 Mon Sep 17 00:00:00 2001
From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Wed, 19 Jun 2013 15:57:51 +0100
Subject: [PATCH] drm/i915: Detect invalid scanout pitches

Report back the user error of attempting to setup a CRTC with an invalid
framebuffer pitch. This is trickier than it should be as on gen4, there
is a restriction that tiled surfaces must have a stride less than 16k -
which is less than the largest supported CRTC size.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 39e7b1b..cdb768a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1871,6 +1871,7 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
 	struct drm_i915_gem_object *obj;
 	int plane = intel_crtc->plane;
 	unsigned long linear_offset;
+	int pitch_limit;
 	u32 dspcntr;
 	u32 reg;
 
@@ -1886,6 +1887,21 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
 	intel_fb = to_intel_framebuffer(fb);
 	obj = intel_fb->obj;
 
+	if (IS_VLV(dev)) {
+		pitch_limit = 32*1024;
+	} else if (IS_GEN4(dev)) {
+		if (obj->tiling_mode)
+			pitch_limit = 16*1024;
+		else
+			pitch_limit = 32*1024;
+	} else
+		pitch_limit = 8*1024;
+
+	if (fb->pitches[0] > pitch_limit) {
+		DRM_DEBUG_KMS("Invalid pitch (%d) for scanout\n", fb->pitches[0]);
+		return -EINVAL;
+	}
+
 	reg = DSPCNTR(plane);
 	dspcntr = I915_READ(reg);
 	/* Mask out pixel format bits in case we change it */
@@ -1983,6 +1999,11 @@ static int ironlake_update_plane(struct drm_crtc *crtc,
 		return -EINVAL;
 	}
 
+	if (fb->pitches[0] > 32*1024) {
+		DRM_DEBUG_KMS("Invalid pitch (%d) for scanout\n", fb->pitches[0]);
+		return -EINVAL;
+	}
+
 	intel_fb = to_intel_framebuffer(fb);
 	obj = intel_fb->obj;
 
-- 
1.8.3.1