diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/hdminv84.c b/drivers/gpu/drm/nouveau/core/engine/disp/hdminv84.c
index 7fdade6..f9e3542 100644
--- a/drivers/gpu/drm/nouveau/core/engine/disp/hdminv84.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/hdminv84.c
@@ -44,15 +44,15 @@ nv84_hdmi_ctrl(struct nv50_disp_priv *priv, int head, int or, u32 data)
 	nv_wr32(priv, 0x616528 + hoff, 0x000d0282);
 	nv_wr32(priv, 0x61652c + hoff, 0x0000006f);
 	nv_wr32(priv, 0x616530 + hoff, 0x00000000);
-	nv_wr32(priv, 0x616534 + hoff, 0x00000000);
-	nv_wr32(priv, 0x616538 + hoff, 0x00000000);
 	nv_mask(priv, 0x616520 + hoff, 0x00000001, 0x00000001);
 
 	/* Audio InfoFrame */
 	nv_mask(priv, 0x616500 + hoff, 0x00000001, 0x00000000);
 	nv_wr32(priv, 0x616508 + hoff, 0x000a0184);
-	nv_wr32(priv, 0x61650c + hoff, 0x00000071);
+	nv_wr32(priv, 0x61650c + hoff, 0x00000170);
 	nv_wr32(priv, 0x616510 + hoff, 0x00000000);
+	nv_wr32(priv, 0x616514 + hoff, 0x00000000);
+	nv_wr32(priv, 0x616518 + hoff, 0x00000000);
 	nv_mask(priv, 0x616500 + hoff, 0x00000001, 0x00000001);
 
 	nv_mask(priv, 0x6165d0 + hoff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/hdminva3.c b/drivers/gpu/drm/nouveau/core/engine/disp/hdminva3.c
index db8c6fd..32ad7cf 100644
--- a/drivers/gpu/drm/nouveau/core/engine/disp/hdminva3.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/hdminva3.c
@@ -44,15 +44,15 @@ nva3_hdmi_ctrl(struct nv50_disp_priv *priv, int head, int or, u32 data)
 	nv_wr32(priv, 0x61c528 + soff, 0x000d0282);
 	nv_wr32(priv, 0x61c52c + soff, 0x0000006f);
 	nv_wr32(priv, 0x61c530 + soff, 0x00000000);
-	nv_wr32(priv, 0x61c534 + soff, 0x00000000);
-	nv_wr32(priv, 0x61c538 + soff, 0x00000000);
 	nv_mask(priv, 0x61c520 + soff, 0x00000001, 0x00000001);
 
 	/* Audio InfoFrame */
 	nv_mask(priv, 0x61c500 + soff, 0x00000001, 0x00000000);
 	nv_wr32(priv, 0x61c508 + soff, 0x000a0184);
-	nv_wr32(priv, 0x61c50c + soff, 0x00000071);
+	nv_wr32(priv, 0x61c50c + soff, 0x00000170);
 	nv_wr32(priv, 0x61c510 + soff, 0x00000000);
+	nv_wr32(priv, 0x61c514 + soff, 0x00000000);
+	nv_wr32(priv, 0x61c518 + soff, 0x00000000);
 	nv_mask(priv, 0x61c500 + soff, 0x00000001, 0x00000001);
 
 	nv_mask(priv, 0x61c5d0 + soff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
-- 
1.8.1.5