diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/hdminva3.c b/drivers/gpu/drm/nouveau/core/engine/disp/hdminva3.c
index 3ce747f..8db7456 100644
--- a/drivers/gpu/drm/nouveau/core/engine/disp/hdminva3.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/hdminva3.c
@@ -33,12 +33,15 @@ nva3_hdmi_ctrl(struct nv50_disp_priv *priv, int head, int or, u32 data)
 	const u32 soff = (or * 0x800);
 
 	if (!(data & NV84_DISP_SOR_HDMI_PWR_STATE_ON)) {
+		nv_info("disabling hdmi: %d, %d, %d\n", head, or, data);
 		nv_mask(priv, 0x61c5a4 + soff, 0x40000000, 0x00000000);
 		nv_mask(priv, 0x61c520 + soff, 0x00000001, 0x00000000);
 		nv_mask(priv, 0x61c500 + soff, 0x00000001, 0x00000000);
 		return 0;
 	}
 
+	nv_info("enabling hdmi: %d, %d, %d\n", head, or, data);
+
 	/* AVI InfoFrame */
 	nv_mask(priv, 0x61c520 + soff, 0x00000001, 0x00000000);
 	nv_wr32(priv, 0x61c528 + soff, 0x000d0282);
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/sornv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/sornv50.c
index ab1e918..ef72222 100644
--- a/drivers/gpu/drm/nouveau/core/engine/disp/sornv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/sornv50.c
@@ -62,8 +62,12 @@ nv50_sor_mthd(struct nouveau_object *object, u32 mthd, void *args, u32 size)
 		return -EINVAL;
 	data = *(u32 *)args;
 
-	if (type && !dcb_outp_match(bios, type, mask, &ver, &hdr, &outp))
+	nv_info(priv, "nv50_sor_mthd: type: %d, head: %d, link: %d, or: %d\n",
+		type, head, link, or);
+	if (type && !dcb_outp_match(bios, type, mask, &ver, &hdr, &outp)) {
+		nv_info(priv, "output didn't match");
 		return -ENODEV;
+        }
 
 	switch (mthd & ~0x3f) {
 	case NV50_DISP_SOR_PWR:
@@ -73,6 +77,7 @@ nv50_sor_mthd(struct nouveau_object *object, u32 mthd, void *args, u32 size)
 		ret = priv->sor.hda_eld(priv, or, args, size);
 		break;
 	case NV84_DISP_SOR_HDMI_PWR:
+		nv_info(priv, "calling nv84_disp_sor_hdmi_pwr(%d, %d, %d)\n", head, or, data);
 		ret = priv->sor.hdmi(priv, head, or, data);
 		break;
 	case NV50_DISP_SOR_LVDS_SCRIPT:
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 54dc635..534dfcc 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -1657,6 +1657,7 @@ nv50_hdmi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode)
 	u32 rekey = 56; /* binary driver, and tegra constant */
 	u32 max_ac_packet;
 
+	nv_info("nv50_hdmi_mode_set: index: %d, or: %d, moff = 0x%x\n", nv_crtc->index, nv_encoder->or, moff);
 	nv_connector = nouveau_encoder_connector_get(nv_encoder);
 	if (!drm_detect_hdmi_monitor(nv_connector->edid))
 		return;
@@ -1666,6 +1667,8 @@ nv50_hdmi_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode)
 	max_ac_packet -= 18; /* constant from tegra */
 	max_ac_packet /= 32;
 
+	nv_info("nv50_hdmi_mode_set: calling NV84_DISP_SOR_HDMI_PWR\n");
+
 	nv_call(disp->core, NV84_DISP_SOR_HDMI_PWR + moff,
 			    NV84_DISP_SOR_HDMI_PWR_STATE_ON |
 			    (max_ac_packet << 16) | rekey);