From de88bcaac94f993e899d9ec529f05427d7b3c74f Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Sat, 27 Jul 2013 20:50:34 +0100 Subject: [PATCH] drm/i915: Random patch to assign a value for Valleyview get_clock() --- drivers/gpu/drm/i915/i915_reg.h | 6 ++++++ drivers/gpu/drm/i915/intel_display.c | 36 +++++++++++++++++++++++++++++++++++- 2 files changed, 41 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 88d97c5..62bf3e5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -405,11 +405,17 @@ #define DPIO_POST_DIV_LVDS2 3 #define DPIO_K_SHIFT (24) /* 4 bits */ #define DPIO_P1_SHIFT (21) /* 3 bits */ +#define DPIO_P1_MASK (7) #define DPIO_P2_SHIFT (16) /* 5 bits */ +#define DPIO_P2_MASK (0x1f) #define DPIO_N_SHIFT (12) /* 4 bits */ +#define DPIO_N_MASK (0xf) #define DPIO_ENABLE_CALIBRATION (1<<11) #define DPIO_M1DIV_SHIFT (8) /* 3 bits */ +#define DPIO_M1DIV_MASK (7) #define DPIO_M2DIV_MASK 0xff +#define DPIO_M2DIV_SHIFT 0 + #define _DPIO_DIV_B 0x802c #define DPIO_DIV(pipe) _PIPE(pipe, _DPIO_DIV_A, _DPIO_DIV_B) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a46168e..320f75a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -49,6 +49,8 @@ static void i9xx_crtc_clock_get(struct intel_crtc *crtc, struct intel_crtc_config *pipe_config); static void ironlake_crtc_clock_get(struct intel_crtc *crtc, struct intel_crtc_config *pipe_config); +static void vlv_crtc_clock_get(struct intel_crtc *crtc, + struct intel_crtc_config *pipe_config); typedef struct { int min, max; @@ -453,6 +455,14 @@ static void i9xx_clock(int refclk, intel_clock_t *clock) clock->dot = clock->vco / clock->p; } +static int vlv_clock(int refclk, intel_clock_t *clock) +{ + u64 m = 100 * refclk * clock->m1 * (2*clock->m2 - 1); + u64 p = clock->p1 * clock->p2 * clock->n; + do_div(m, p); + return m; +} + /** * Returns whether any output on the specified pipe is of the specified type */ @@ -7205,6 +7215,30 @@ static void ironlake_crtc_clock_get(struct intel_crtc *crtc, pipe_config->adjusted_mode.clock = clock; } +static void vlv_crtc_clock_get(struct intel_crtc *crtc, + struct intel_crtc_config *pipe_config) +{ + struct drm_device *dev = crtc->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + int pipe = pipe_config->cpu_transcoder; + u32 val; + intel_clock_t clock; + + mutex_lock(&dev_priv->dpio_lock); + val = vlv_dpio_read(dev_priv, DPIO_DIV(pipe)); + mutex_unlock(&dev_priv->dpio_lock); + + clock.m1 = (val & DPIO_M1DIV_MASK) >> DPIO_M1DIV_SHIFT; + clock.m2 = (val & DPIO_M2DIV_MASK) >> DPIO_M2DIV_SHIFT; + clock.p1 = (val & DPIO_P1_MASK) >> DPIO_P1_SHIFT; + clock.p2 = (val & DPIO_P2_MASK) >> DPIO_P2_SHIFT; + clock.n = (val & DPIO_N_MASK) >> DPIO_N_SHIFT; + + pipe_config->adjusted_mode.clock = + vlv_clock(vlv_get_refclk(&crtc->base), &clock) * + pipe_config->pixel_multiplier; +} + /** Returns the currently programmed mode of the given pipe. */ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, struct drm_crtc *crtc) @@ -9578,7 +9612,7 @@ static void intel_init_display(struct drm_device *dev) dev_priv->display.update_plane = ironlake_update_plane; } else if (IS_VALLEYVIEW(dev)) { dev_priv->display.get_pipe_config = i9xx_get_pipe_config; - dev_priv->display.get_clock = i9xx_crtc_clock_get; + dev_priv->display.get_clock = vlv_crtc_clock_get; dev_priv->display.crtc_mode_set = i9xx_crtc_mode_set; dev_priv->display.crtc_enable = valleyview_crtc_enable; dev_priv->display.crtc_disable = i9xx_crtc_disable; -- 1.8.3.2