diff --git a/drivers/gpu/drm/radeon/rv6xx_dpm.c b/drivers/gpu/drm/radeon/rv6xx_dpm.c
index 363018c..116b1ae 100644
--- a/drivers/gpu/drm/radeon/rv6xx_dpm.c
+++ b/drivers/gpu/drm/radeon/rv6xx_dpm.c
@@ -1965,6 +1965,7 @@ int rv6xx_dpm_init(struct radeon_device *rdev)
 	if (rdev->pm.dpm.backbias_response_time == 0)
 		rdev->pm.dpm.backbias_response_time = R600_BACKBIASRESPONSETIME_DFLT;
 
+#if 1
 	ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM,
 					     0, false, &dividers);
 	if (ret)
@@ -1978,19 +1979,25 @@ int rv6xx_dpm_init(struct radeon_device *rdev)
 		pi->mpll_ref_div = dividers.ref_div + 1;
 	else
 		pi->mpll_ref_div = R600_REFERENCEDIVIDER_DFLT;
+#else
+	pi->spll_ref_div = R600_REFERENCEDIVIDER_DFLT;
+	pi->mpll_ref_div = R600_REFERENCEDIVIDER_DFLT;
+#endif
+
+	DRM_INFO("spll_ref_div: 0x%x mpll_ref_div: 0x%x\n", pi->spll_ref_div, pi->mpll_ref_div);
 
 	if (rdev->family >= CHIP_RV670)
 		pi->fb_div_scale = 1;
 	else
 		pi->fb_div_scale = 0;
 
-	pi->voltage_control =
-		radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0);
+	pi->voltage_control = false;
+//		radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0);
 
-	pi->gfx_clock_gating = true;
+	pi->gfx_clock_gating = false;
 
-	if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size,
-                                   &frev, &crev, &data_offset)) {
+	if (0/*atom_parse_data_header(rdev->mode_info.atom_context, index, &size,
+	       &frev, &crev, &data_offset)*/) {
 		pi->sclk_ss = true;
 		pi->mclk_ss = true;
 		pi->dynamic_ss = true;
@@ -2000,7 +2007,7 @@ int rv6xx_dpm_init(struct radeon_device *rdev)
 		pi->dynamic_ss = false;
 	}
 
-	pi->dynamic_pcie_gen2 = true;
+	pi->dynamic_pcie_gen2 = false;//true;
 
 	if (pi->gfx_clock_gating &&
 	    (rdev->pm.int_thermal_type != THERMAL_TYPE_NONE))