From 8d570ddd83ba205da9dbff9090e53e1b2a66e711 Mon Sep 17 00:00:00 2001 From: Ilia Mirkin Date: Tue, 27 Aug 2013 23:18:05 -0400 Subject: [PATCH] drm/nouveau: introduce helper to treat nv1a as pre-nv17 Signed-off-by: Ilia Mirkin --- drivers/gpu/drm/nouveau/core/engine/device/base.c | 2 +- drivers/gpu/drm/nouveau/core/engine/graph/nv10.c | 11 +++++------ drivers/gpu/drm/nouveau/core/include/core/device.h | 7 +++++++ drivers/gpu/drm/nouveau/core/subdev/devinit/nv04.c | 3 ++- drivers/gpu/drm/nouveau/core/subdev/devinit/nv10.c | 2 +- drivers/gpu/drm/nouveau/nouveau_drm.c | 2 +- 6 files changed, 17 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/nouveau/core/engine/device/base.c b/drivers/gpu/drm/nouveau/core/engine/device/base.c index 4c72571..79abba5 100644 --- a/drivers/gpu/drm/nouveau/core/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/core/engine/device/base.c @@ -212,7 +212,7 @@ nouveau_devobj_ctor(struct nouveau_object *parent, nv_info(device, "Family : NV%02X\n", device->card_type); /* determine frequency of timing crystal */ - if ( device->chipset < 0x17 || + if (!nv_chipset_17(device) || (device->chipset >= 0x20 && device->chipset < 0x25)) strap &= 0x00000040; else diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv10.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv10.c index 23c143a..f579f69 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nv10.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv10.c @@ -945,7 +945,7 @@ nv10_graph_load_context(struct nv10_graph_chan *chan, int chid) for (i = 0; i < ARRAY_SIZE(nv10_graph_ctx_regs); i++) nv_wr32(priv, nv10_graph_ctx_regs[i], chan->nv10[i]); - if (nv_device(priv)->chipset >= 0x17) { + if (nv_chipset_17(priv)) { for (i = 0; i < ARRAY_SIZE(nv17_graph_ctx_regs); i++) nv_wr32(priv, nv17_graph_ctx_regs[i], chan->nv17[i]); } @@ -970,7 +970,7 @@ nv10_graph_unload_context(struct nv10_graph_chan *chan) for (i = 0; i < ARRAY_SIZE(nv10_graph_ctx_regs); i++) chan->nv10[i] = nv_rd32(priv, nv10_graph_ctx_regs[i]); - if (nv_device(priv)->chipset >= 0x17) { + if (nv_chipset_17(priv)) { for (i = 0; i < ARRAY_SIZE(nv17_graph_ctx_regs); i++) chan->nv17[i] = nv_rd32(priv, nv17_graph_ctx_regs[i]); } @@ -1052,7 +1052,7 @@ nv10_graph_context_ctor(struct nouveau_object *parent, NV_WRITE_CTX(0x00400e14, 0x00001000); NV_WRITE_CTX(0x00400e30, 0x00080008); NV_WRITE_CTX(0x00400e34, 0x00080008); - if (nv_device(priv)->chipset >= 0x17) { + if (nv_chipset_17(priv)) { /* is it really needed ??? */ NV17_WRITE_CTX(NV10_PGRAPH_DEBUG_4, nv_rd32(priv, NV10_PGRAPH_DEBUG_4)); @@ -1230,8 +1230,7 @@ nv10_graph_ctor(struct nouveau_object *parent, struct nouveau_object *engine, if (nv_device(priv)->chipset <= 0x10) nv_engine(priv)->sclass = nv10_graph_sclass; else - if (nv_device(priv)->chipset < 0x17 || - nv_device(priv)->chipset == 0x1a) + if (!nv_chipset_17(priv)) nv_engine(priv)->sclass = nv15_graph_sclass; else nv_engine(priv)->sclass = nv17_graph_sclass; @@ -1270,7 +1269,7 @@ nv10_graph_init(struct nouveau_object *object) nv_wr32(priv, NV04_PGRAPH_DEBUG_2, 0x25f92ad9); nv_wr32(priv, NV04_PGRAPH_DEBUG_3, 0x55DE0830 | (1 << 29) | (1 << 31)); - if (nv_device(priv)->chipset >= 0x17) { + if (nv_chipset_17(priv)) { nv_wr32(priv, NV10_PGRAPH_DEBUG_4, 0x1f000000); nv_wr32(priv, 0x400a10, 0x03ff3fb6); nv_wr32(priv, 0x400838, 0x002f8684); diff --git a/drivers/gpu/drm/nouveau/core/include/core/device.h b/drivers/gpu/drm/nouveau/core/include/core/device.h index 99b6600..c246e4d 100644 --- a/drivers/gpu/drm/nouveau/core/include/core/device.h +++ b/drivers/gpu/drm/nouveau/core/include/core/device.h @@ -135,4 +135,11 @@ nv_device_match(struct nouveau_object *object, u16 dev, u16 ven, u16 sub) device->pdev->subsystem_device == sub; } +static inline bool +nv_chipset_17(void *object) +{ + struct nouveau_device *device = nv_device(object); + return device->chipset >= 0x17 && device->chipset != 0x1a; +} + #endif diff --git a/drivers/gpu/drm/nouveau/core/subdev/devinit/nv04.c b/drivers/gpu/drm/nouveau/core/subdev/devinit/nv04.c index b22357d..27c8235 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/devinit/nv04.c +++ b/drivers/gpu/drm/nouveau/core/subdev/devinit/nv04.c @@ -168,7 +168,8 @@ setPLL_single(struct nouveau_devinit *devinit, u32 reg, /* downclock -- write new NM first */ nv_wr32(devinit, reg, (oldpll & 0xffff0000) | pv->NM1); - if (chip_version < 0x17 && chip_version != 0x11) + if ((chip_version < 0x17 || chip_version == 0x1a) && + chip_version != 0x11) /* wait a bit on older chips */ msleep(64); nv_rd32(devinit, reg); diff --git a/drivers/gpu/drm/nouveau/core/subdev/devinit/nv10.c b/drivers/gpu/drm/nouveau/core/subdev/devinit/nv10.c index 463b08f..677a83e 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/devinit/nv10.c +++ b/drivers/gpu/drm/nouveau/core/subdev/devinit/nv10.c @@ -39,7 +39,7 @@ nv10_devinit_meminit(struct nouveau_devinit *devinit) { struct nv10_devinit_priv *priv = (void *)devinit; const int mem_width[] = { 0x10, 0x00, 0x20 }; - const int mem_width_count = nv_device(priv)->chipset >= 0x17 ? 3 : 2; + const int mem_width_count = nv_chipset_17(priv) ? 3 : 2; uint32_t patt = 0xdeadbeef; struct io_mapping *fb; int i, j, k; diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index 6197266..41e1f7c 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -170,7 +170,7 @@ nouveau_accel_init(struct nouveau_drm *drm) /* initialise synchronisation routines */ if (device->card_type < NV_10) ret = nv04_fence_create(drm); - else if (device->chipset < 0x17) ret = nv10_fence_create(drm); + else if (!nv_chipset_17(device) ) ret = nv10_fence_create(drm); else if (device->card_type < NV_50) ret = nv17_fence_create(drm); else if (device->chipset < 0x84) ret = nv50_fence_create(drm); else if (device->card_type < NV_C0) ret = nv84_fence_create(drm); -- 1.8.1.5