diff -ur a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h --- a/src/gallium/drivers/r600/r600_pipe.h 2013-08-14 03:34:42.000000000 +0200 +++ b/src/gallium/drivers/r600/r600_pipe.h 2013-08-29 15:12:20.047517678 +0200 @@ -528,23 +528,30 @@ struct pipe_context context; struct r600_screen *screen; struct radeon_winsys *ws; - struct r600_rings rings; struct blitter_context *blitter; - struct u_upload_mgr *uploader; + struct util_slab_mempool pool_transfers; + struct u_upload_mgr *uploader; + enum radeon_family family; + enum chip_class chip_class; + boolean current_render_cond_cond; + unsigned current_render_cond_mode; + unsigned default_ps_gprs, default_vs_gprs; + struct pipe_query *current_render_cond; + unsigned backend_mask; + unsigned max_db; /* for OQ */ + unsigned flags; + boolean predicate_drawing; + struct pipe_index_buffer index_buffer; + struct r600_constbuf_state constbuf_state[PIPE_SHADER_TYPES]; // end of shared members + struct r600_rings rings; struct u_suballocator *allocator_so_filled_size; struct u_suballocator *allocator_fetch_shader; - struct util_slab_mempool pool_transfers; unsigned initial_gfx_cs_size; /* Hardware info. */ - enum radeon_family family; - enum chip_class chip_class; boolean has_vertex_cache; boolean keep_tiling_flags; - unsigned default_ps_gprs, default_vs_gprs; unsigned r6xx_num_clause_temp_gprs; - unsigned backend_mask; - unsigned max_db; /* for OQ */ /* current unaccounted memory usage */ uint64_t vram; @@ -596,7 +603,6 @@ struct r600_shader_state vertex_shader; struct r600_shader_state pixel_shader; struct r600_cs_shader_state cs_shader_state; - struct r600_constbuf_state constbuf_state[PIPE_SHADER_TYPES]; struct r600_textures_info samplers[PIPE_SHADER_TYPES]; /** Vertex buffers for fetch shaders */ struct r600_vertexbuf_state vertex_buffer_state; @@ -605,7 +611,6 @@ struct r600_streamout streamout; /* Additional context states. */ - unsigned flags; unsigned compute_cb_target_mask; struct r600_pipe_shader_selector *ps_shader; struct r600_pipe_shader_selector *vs_shader; @@ -615,9 +620,6 @@ boolean dual_src_blend; unsigned zwritemask; - /* Index buffer. */ - struct pipe_index_buffer index_buffer; - /* Last draw state (-1 = unset). */ int last_primitive_type; /* Last primitive type used in draw_vbo. */ int last_start_instance; @@ -636,10 +638,6 @@ unsigned num_draw_calls; /* Render condition. */ - struct pipe_query *current_render_cond; - unsigned current_render_cond_mode; - boolean current_render_cond_cond; - boolean predicate_drawing; void *sb_context; struct r600_isa *isa; diff -ur a/src/gallium/drivers/radeonsi/radeonsi_pipe.h b/src/gallium/drivers/radeonsi/radeonsi_pipe.h --- a/src/gallium/drivers/radeonsi/radeonsi_pipe.h 2013-08-14 03:34:42.000000000 +0200 +++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.h 2013-08-29 15:12:22.058517775 +0200 @@ -133,15 +133,27 @@ struct r600_context { struct pipe_context context; + struct r600_screen *screen; + struct radeon_winsys *ws; struct blitter_context *blitter; + struct util_slab_mempool pool_transfers; + struct u_upload_mgr *uploader; enum radeon_family family; enum chip_class chip_class; + boolean current_render_cond_cond; + unsigned current_render_cond_mode; + unsigned default_ps_gprs, default_vs_gprs; + struct pipe_query *current_render_cond; + unsigned backend_mask; + unsigned max_db; /* for OQ */ + unsigned flags; + boolean predicate_drawing; + struct pipe_index_buffer index_buffer; + struct r600_constbuf_state constbuf_state[PIPE_SHADER_TYPES]; // end of shared members void *custom_dsa_flush_depth_stencil; void *custom_dsa_flush_depth; void *custom_dsa_flush_stencil; void *custom_dsa_flush_inplace; - struct r600_screen *screen; - struct radeon_winsys *ws; struct si_vertex_element *vertex_elements; struct pipe_framebuffer_state framebuffer; unsigned pa_sc_line_stipple; @@ -151,26 +163,17 @@ struct si_pipe_shader_selector *ps_shader; struct si_pipe_shader_selector *vs_shader; struct si_cs_shader_state cs_shader_state; - struct pipe_query *current_render_cond; - unsigned current_render_cond_mode; - boolean current_render_cond_cond; struct pipe_query *saved_render_cond; unsigned saved_render_cond_mode; boolean saved_render_cond_cond; /* shader information */ unsigned sprite_coord_enable; unsigned export_16bpc; - struct r600_constbuf_state constbuf_state[PIPE_SHADER_TYPES]; struct r600_textures_info vs_samplers; struct r600_textures_info ps_samplers; struct si_resource *border_color_table; unsigned border_color_offset; - struct u_upload_mgr *uploader; - struct util_slab_mempool pool_transfers; - - unsigned default_ps_gprs, default_vs_gprs; - /* Below are variables from the old r600_context. */ struct radeon_winsys_cs *cs; @@ -182,11 +185,6 @@ unsigned num_cs_dw_queries_suspend; unsigned num_cs_dw_streamout_end; - unsigned backend_mask; - unsigned max_db; /* for OQ */ - unsigned flags; - boolean predicate_drawing; - unsigned num_so_targets; struct r600_so_target *so_targets[PIPE_MAX_SO_BUFFERS]; boolean streamout_start; @@ -196,7 +194,6 @@ /* Vertex and index buffers. */ bool vertex_buffers_dirty; - struct pipe_index_buffer index_buffer; struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS]; unsigned nr_vertex_buffers;