PGETBL_CTL: 0x7ffc0001 PGTBL_ER: 0x00000000 EXCC: 0x00000000 HWS_PGA: 0x33dda000 IPEIR: 0x00000000 IPEHR: 0x01000000 INST_DONE: 0x7fffffc0 NOPID: 0x00000000 HWSTAM: 0xffffeffe SCPD0: 0x00000200 IER: 0x00028053 IIR: 0x00000000 IMR: 0xfffd73ae ISR: 0x00000000 EIR: 0x00000000 EMR: 0xffffffed ESR: 0x00000000 INST_PM: 0x00000800 ECOSKPD: 0x00000306 DCC: 0x000f0202 (dual channel interleaved, XOR randomization: enabled, XOR bit: 17) CHDECMISC: 0x33db7431 (XOR bank/rank, ch2 enh enabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep present) C0DRB0: 0x000f0202 (0x0202) C0DRB1: 0x0000000f (0x000f) C0DRB2: 0x00000000 (0x0000) C0DRB3: 0x08040000 (0x0000) C1DRB0: 0x0e0d0d0c (0x0d0c) C1DRB1: 0x0f0e0e0d (0x0e0d) C1DRB2: 0x100f0f0e (0x0f0e) C1DRB3: 0x0e0d100f (0x100f) C0DRA01: 0x02010804 (0x0804) C0DRA23: 0x00000201 (0x0201) C1DRA01: 0x100f0e0d (0x0e0d) C1DRA23: 0x1211100f (0x100f) PGETBL_CTL: 0x7ffc0001 VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) DPLL_TEST: 0x00010001 () CACHE_MODE_0: 0x00006820 D_STATE: 0x0000000b DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) RENCLK_GATE_D1: 0x00000000 RENCLK_GATE_D2: 0x00000000 SDVOB: 0x00300004 (disabled, pipe A, stall disabled, detected) SDVOC: 0x00300000 (disabled, pipe A, stall disabled, not detected) SDVOUDI: 0x0000000e DSPARB: 0x00001d9c DSPFW1: 0x00000000 DSPFW2: 0x00000000 DSPFW3: 0x00000000 ADPA: 0x80000000 (enabled, pipe A, -hsync, -vsync) LVDS: 0x40000000 (disabled, pipe B, 18 bit, 1 channel) DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync) DVOB: 0x00300004 (disabled, pipe A, no stall, -hsync, -vsync) DVOC: 0x00300000 (disabled, pipe A, no stall, -hsync, -vsync) DVOA_SRCDIM: 0x00000000 DVOB_SRCDIM: 0x00000000 DVOC_SRCDIM: 0x00000000 PP_CONTROL: 0x00000000 (power target: off) PP_STATUS: 0x00000000 (off, not ready, sequencing idle) PP_ON_DELAYS: 0x019007d0 PP_OFF_DELAYS: 0x015e07d0 PP_DIVISOR: 0x00270f04 PFIT_CONTROL: 0x00000000 PFIT_PGM_RATIOS: 0x00000000 PORT_HOTPLUG_EN: 0x00000220 PORT_HOTPLUG_STAT: 0x00000700 DSPACNTR: 0xd9000000 (enabled, pipe B) DSPASTRIDE: 0x00001000 (4096 bytes) DSPAPOS: 0x00000000 (0, 0) DSPASIZE: 0x02ff03ff (1024, 768) DSPABASE: 0x07800000 DSPASURF: 0x00000000 DSPATILEOFF: 0x00000000 PIPEACONF: 0x80000000 (enabled, single-wide) PIPEASRC: 0x03ff02ff (1024, 768) PIPEASTAT: 0x00000203 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) PIPEA_GMCH_DATA_M: 0x00000000 PIPEA_GMCH_DATA_N: 0x00000000 PIPEA_DP_LINK_M: 0x00000000 PIPEA_DP_LINK_N: 0x00000000 CURSOR_A_BASE: 0x339c4000 CURSOR_A_CONTROL: 0x04000027 CURSOR_A_POSITION: 0x00bc0071 FPA0: 0x00010d04 (n = 1, m1 = 13, m2 = 4) FPA1: 0x00010d04 (n = 1, m1 = 13, m2 = 4) DPLL_A: 0x94080000 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 4, p2 = 10, SDVO mult 1) DPLL_A_MD: 0x00000000 HTOTAL_A: 0x053f03ff (1024 active, 1344 total) HBLANK_A: 0x053f03ff (1024 start, 1344 end) HSYNC_A: 0x049f0417 (1048 start, 1184 end) VTOTAL_A: 0x032502ff (768 active, 806 total) VBLANK_A: 0x032502ff (768 start, 806 end) VSYNC_A: 0x03080302 (771 start, 777 end) BCLRPAT_A: 0x00000000 VSYNCSHIFT_A: 0x00000000 DSPBCNTR: 0xd8000000 (enabled, pipe A) DSPBSTRIDE: 0x00001000 (4096 bytes) DSPBPOS: 0x00000000 (0, 0) DSPBSIZE: 0x02ff03ff (1024, 768) DSPBBASE: 0x07800000 DSPBSURF: 0x00000000 DSPBTILEOFF: 0x00000000 PIPEBCONF: 0x80000000 (enabled, single-wide) PIPEBSRC: 0x03ff02ff (1024, 768) PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS) PIPEB_GMCH_DATA_M: 0x00000000 PIPEB_GMCH_DATA_N: 0x00000000 PIPEB_DP_LINK_M: 0x00000000 PIPEB_DP_LINK_N: 0x00000000 CURSOR_B_BASE: 0x339cc000 CURSOR_B_CONTROL: 0x14000027 CURSOR_B_POSITION: 0x00bc0071 FPB0: 0x00020f03 (n = 2, m1 = 15, m2 = 3) FPB1: 0x00020f03 (n = 2, m1 = 15, m2 = 3) DPLL_B: 0x94020000 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10, SDVO mult 1) DPLL_B_MD: 0x00000000 HTOTAL_B: 0x045f03ff (1024 active, 1120 total) HBLANK_B: 0x045f03ff (1024 start, 1120 end) HSYNC_B: 0x043f0400 (1025 start, 1088 end) VTOTAL_B: 0x032002ff (768 active, 801 total) VBLANK_B: 0x032002ff (768 start, 801 end) VSYNC_B: 0x031f0300 (769 start, 800 end) BCLRPAT_B: 0x00000000 VSYNCSHIFT_B: 0x00000000 VCLK_DIVISOR_VGA0: 0x00031108 VCLK_DIVISOR_VGA1: 0x00031406 VCLK_POST_DIV: 0x00020002 VGACNTRL: 0x80000000 (disabled) TV_CTL: 0xc00c0000 TV_DAC: 0x70000000 TV_CSC_Y: 0x0332012d TV_CSC_Y2: 0x07d30104 TV_CSC_U: 0x0733052d TV_CSC_U2: 0x05c70200 TV_CSC_V: 0x0340030c TV_CSC_V2: 0x06d00200 TV_CLR_KNOBS: 0x00606000 TV_CLR_LEVEL: 0x010b00e1 TV_H_CTL_1: 0x00400359 TV_H_CTL_2: 0x80480022 TV_H_CTL_3: 0x007c0344 TV_V_CTL_1: 0x00f01415 TV_V_CTL_2: 0x00060607 TV_V_CTL_3: 0x80120001 TV_V_CTL_4: 0x000900f0 TV_V_CTL_5: 0x000a00f0 TV_V_CTL_6: 0x000900f0 TV_V_CTL_7: 0x000a00f0 TV_SC_CTL_1: 0xc1710087 TV_SC_CTL_2: 0x6b405140 TV_SC_CTL_3: 0x00000000 TV_WIN_POS: 0x00360024 TV_WIN_SIZE: 0x02640198 TV_FILTER_CTL_1: 0x80000d63 TV_FILTER_CTL_2: 0x0001e1e2 TV_FILTER_CTL_3: 0x0000f0f1 TV_CC_CONTROL: 0x00000000 TV_CC_DATA: 0x00000000 TV_H_LUMA_0: 0xb1403000 TV_H_LUMA_59: 0x0000b060 TV_H_CHROMA_0: 0xb1403000 TV_H_CHROMA_59: 0x0000b060 FBC_CFB_BASE: 0x00000000 FBC_LL_BASE: 0x00000000 FBC_CONTROL: 0x00000000 FBC_COMMAND: 0x00000000 FBC_STATUS: 0x20000000 FBC_CONTROL2: 0x00000000 FBC_FENCE_OFF: 0x00000000 FBC_MOD_NUM: 0x00000000 MI_MODE: 0x00000200 MI_ARB_STATE: 0x00000840 MI_RDRET_STATE: 0x00000000 ECOSKPD: 0x00000306 DP_B: 0x00000000 DPB_AUX_CH_CTL: 0x00000000 DPB_AUX_CH_DATA1: 0x00000000 DPB_AUX_CH_DATA2: 0x00000000 DPB_AUX_CH_DATA3: 0x00000000 DPB_AUX_CH_DATA4: 0x00000000 DPB_AUX_CH_DATA5: 0x00000000 DP_C: 0x00000000 DPC_AUX_CH_CTL: 0x00000000 DPC_AUX_CH_DATA1: 0x00000000 DPC_AUX_CH_DATA2: 0x00000000 DPC_AUX_CH_DATA3: 0x00000000 DPC_AUX_CH_DATA4: 0x00000000 DPC_AUX_CH_DATA5: 0x00000000 DP_D: 0x00000000 DPD_AUX_CH_CTL: 0x00000000 DPD_AUX_CH_DATA1: 0x00000000 DPD_AUX_CH_DATA2: 0x00000000 DPD_AUX_CH_DATA3: 0x00000000 DPD_AUX_CH_DATA4: 0x00000000 DPD_AUX_CH_DATA5: 0x00000000 AUD_CONFIG: 0x00000000 AUD_HDMIW_STATUS: 0x00000000 AUD_CONV_CHCNT: 0x00000000 VIDEO_DIP_CTL: 0x00000000 AUD_PINW_CNTR: 0x00000000 AUD_CNTL_ST: 0x00000000 AUD_PIN_CAP: 0x00000000 AUD_PINW_CAP: 0x00000000 AUD_PINW_UNSOLRESP: 0x00000000 AUD_OUT_DIG_CNVT: 0x00000000 AUD_OUT_CWCAP: 0x00000000 AUD_GRP_CAP: 0x00000000 FENCE 0: 0x00000000 (disabled) FENCE 1: 0x01000231 (enabled, X tiled, 4096 pitch, 0x01000000 - 0x01400000 (4096kb)) FENCE 2: 0x08900011 (enabled, X tiled, 1024 pitch, 0x08900000 - 0x08a00000 (1024kb)) FENCE 3: 0x06c00231 (enabled, X tiled, 4096 pitch, 0x06c00000 - 0x07000000 (4096kb)) FENCE 4: 0x00000000 (disabled) FENCE 5: 0x0fd00021 (enabled, X tiled, 2048 pitch, 0x0fd00000 - 0x0fe00000 (1024kb)) FENCE 6: 0x02400031 (enabled, X tiled, 4096 pitch, 0x02400000 - 0x02500000 (1024kb)) FENCE 7: 0x02600011 (enabled, X tiled, 1024 pitch, 0x02600000 - 0x02700000 (1024kb)) FENCE 8: 0x04300011 (enabled, X tiled, 1024 pitch, 0x04300000 - 0x04400000 (1024kb)) FENCE 9: 0x08400231 (enabled, X tiled, 4096 pitch, 0x08400000 - 0x08800000 (4096kb)) FENCE 10: 0x03000231 (enabled, X tiled, 4096 pitch, 0x03000000 - 0x03400000 (4096kb)) FENCE 11: 0x07800231 (enabled, X tiled, 4096 pitch, 0x07800000 - 0x07c00000 (4096kb)) FENCE 12: 0x00000000 (disabled) FENCE 13: 0x00000000 (disabled) FENCE 14: 0x00000000 (disabled) FENCE 15: 0x0fc00021 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 0: 0x04300011 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 0: 0x08400231 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 1: 0x03000231 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 1: 0x07800231 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 2: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 2: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 3: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 3: 0x0fc00021 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 4: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 4: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 5: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 5: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 6: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 6: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 7: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 7: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 8: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 8: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 9: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 9: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 10: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 10: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 11: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 11: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 12: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 12: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 13: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 13: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 14: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 14: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE START 15: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) FENCE END 15: 0x00000000 (enabled, X tiled, 2048 pitch, 0x0fc00000 - 0x0fd00000 (1024kb)) INST_PM: 0x00000800 pipe A dot 64800 n 1 m1 13 m2 4 p1 4 p2 10 pipe B dot 108000 n 2 m1 15 m2 3 p1 2 p2 10