-------------------------------------------------------------- FRAG PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1 DCL IN[0], GENERIC[19], PERSPECTIVE DCL OUT[0], COLOR DCL SAMP[0] DCL CONST[1..2] DCL TEMP[0..1], LOCAL IMM[0] INT32 {0, 3, 1, 2} 0: USEQ TEMP[0].x, CONST[1].xxxx, IMM[0].xxxx 1: UIF TEMP[0].xxxx :0 2: USNE TEMP[0].x, CONST[2].xxxx, IMM[0].xxxx 3: USNE TEMP[1].x, CONST[2].xxxx, IMM[0].yyyy 4: AND TEMP[0].x, TEMP[0].xxxx, TEMP[1].xxxx 5: UIF TEMP[0].xxxx :0 6: MOV TEMP[0].xy, IN[0].xyyy 7: TEX TEMP[0], TEMP[0], SAMP[0], 2D 8: MOV TEMP[0], TEMP[0].zyxw 9: ELSE :0 10: MOV TEMP[1].xy, IN[0].xyyy 11: TEX TEMP[1], TEMP[1], SAMP[0], 2D 12: MOV TEMP[0], TEMP[1] 13: ENDIF 14: ELSE :0 15: USEQ TEMP[1].x, CONST[2].xxxx, IMM[0].zzzz 16: UIF TEMP[1].xxxx :0 17: MOV TEMP[1].xy, IN[0].xyyy 18: TEX TEMP[1], TEMP[1], SAMP[0], 2D 19: MOV TEMP[0], TEMP[1].wxyz 20: ELSE :0 21: USEQ TEMP[1].x, CONST[2].xxxx, IMM[0].xxxx 22: UIF TEMP[1].xxxx :0 23: MOV TEMP[1].xy, IN[0].xyyy 24: TEX TEMP[1], TEMP[1], SAMP[0], 2D 25: MOV TEMP[0], TEMP[1].wzyx 26: ELSE :0 27: USEQ TEMP[1].x, CONST[2].xxxx, IMM[0].wwww 28: UIF TEMP[1].xxxx :0 29: MOV TEMP[1].xy, IN[0].xyyy 30: TEX TEMP[1], TEMP[1], SAMP[0], 2D 31: MOV TEMP[0], TEMP[1].yzwx 32: ELSE :0 33: USEQ TEMP[1].x, CONST[2].xxxx, IMM[0].yyyy 34: UIF TEMP[1].xxxx :0 35: MOV TEMP[1].xy, IN[0].xyyy 36: TEX TEMP[1], TEMP[1], SAMP[0], 2D 37: MOV TEMP[0], TEMP[1].wzyx 38: ENDIF 39: ENDIF 40: ENDIF 41: ENDIF 42: ENDIF 43: MOV OUT[0], TEMP[0] 44: END ; ModuleID = 'tgsi' define void @main() #0 { main_body: %0 = call float @llvm.R600.interp.input(i32 0, i32 0) %1 = call float @llvm.R600.interp.input(i32 1, i32 0) %2 = call float @llvm.R600.interp.input(i32 2, i32 0) %3 = call float @llvm.R600.interp.input(i32 3, i32 0) %4 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1) %5 = extractelement <4 x float> %4, i32 0 %6 = bitcast float %5 to i32 %7 = icmp eq i32 %6, 0 %8 = sext i1 %7 to i32 %9 = bitcast i32 %8 to float %10 = bitcast float %9 to i32 %11 = icmp ne i32 %10, 0 %12 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2) %13 = extractelement <4 x float> %12, i32 0 %14 = bitcast float %13 to i32 br i1 %11, label %IF, label %ELSE IF: ; preds = %main_body %15 = icmp ne i32 %14, 0 %16 = sext i1 %15 to i32 %17 = bitcast i32 %16 to float %18 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2) %19 = extractelement <4 x float> %18, i32 0 %20 = bitcast float %19 to i32 %21 = icmp ne i32 %20, 3 %22 = sext i1 %21 to i32 %23 = bitcast i32 %22 to float %24 = bitcast float %17 to i32 %25 = bitcast float %23 to i32 %26 = and i32 %24, %25 %27 = bitcast i32 %26 to float %28 = bitcast float %27 to i32 %29 = icmp ne i32 %28, 0 %30 = insertelement <4 x float> undef, float %0, i32 0 %31 = insertelement <4 x float> %30, float %1, i32 1 %32 = insertelement <4 x float> %31, float 0.000000e+00, i32 2 %33 = insertelement <4 x float> %32, float 0.000000e+00, i32 3 %34 = extractelement <4 x float> %33, i32 0 %35 = extractelement <4 x float> %33, i32 1 %36 = insertelement <4 x float> undef, float %34, i32 0 %37 = insertelement <4 x float> %36, float %35, i32 1 %38 = insertelement <4 x float> %37, float undef, i32 2 %39 = insertelement <4 x float> %38, float undef, i32 3 %40 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %39, i32 16, i32 0, i32 2) %41 = extractelement <4 x float> %40, i32 0 %42 = extractelement <4 x float> %40, i32 1 %43 = extractelement <4 x float> %40, i32 2 %44 = extractelement <4 x float> %40, i32 3 %. = select i1 %29, float %43, float %41 %.23 = select i1 %29, float %41, float %43 br label %ENDIF ELSE: ; preds = %main_body %45 = icmp eq i32 %14, 1 %46 = sext i1 %45 to i32 %47 = bitcast i32 %46 to float %48 = bitcast float %47 to i32 %49 = icmp ne i32 %48, 0 br i1 %49, label %IF12, label %ELSE13 ENDIF: ; preds = %IF21, %ELSE19, %IF18, %IF15, %IF12, %IF %temp.0 = phi float [ %., %IF ], [ %68, %IF12 ], [ %91, %IF15 ], [ %112, %IF18 ], [ %137, %IF21 ], [ %9, %ELSE19 ] %temp1.0 = phi float [ %42, %IF ], [ %65, %IF12 ], [ %90, %IF15 ], [ %113, %IF18 ], [ %136, %IF21 ], [ 0.000000e+00, %ELSE19 ] %temp2.0 = phi float [ %.23, %IF ], [ %66, %IF12 ], [ %89, %IF15 ], [ %114, %IF18 ], [ %135, %IF21 ], [ 0.000000e+00, %ELSE19 ] %temp3.0 = phi float [ %44, %IF ], [ %67, %IF12 ], [ %88, %IF15 ], [ %111, %IF18 ], [ %134, %IF21 ], [ 0.000000e+00, %ELSE19 ] %50 = insertelement <4 x float> undef, float %temp.0, i32 0 %51 = insertelement <4 x float> %50, float %temp1.0, i32 1 %52 = insertelement <4 x float> %51, float %temp2.0, i32 2 %53 = insertelement <4 x float> %52, float %temp3.0, i32 3 call void @llvm.R600.store.swizzle(<4 x float> %53, i32 0, i32 0) ret void IF12: ; preds = %ELSE %54 = insertelement <4 x float> undef, float %0, i32 0 %55 = insertelement <4 x float> %54, float %1, i32 1 %56 = insertelement <4 x float> %55, float 0.000000e+00, i32 2 %57 = insertelement <4 x float> %56, float 0.000000e+00, i32 3 %58 = extractelement <4 x float> %57, i32 0 %59 = extractelement <4 x float> %57, i32 1 %60 = insertelement <4 x float> undef, float %58, i32 0 %61 = insertelement <4 x float> %60, float %59, i32 1 %62 = insertelement <4 x float> %61, float undef, i32 2 %63 = insertelement <4 x float> %62, float undef, i32 3 %64 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %63, i32 16, i32 0, i32 2) %65 = extractelement <4 x float> %64, i32 0 %66 = extractelement <4 x float> %64, i32 1 %67 = extractelement <4 x float> %64, i32 2 %68 = extractelement <4 x float> %64, i32 3 br label %ENDIF ELSE13: ; preds = %ELSE %69 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2) %70 = extractelement <4 x float> %69, i32 0 %71 = bitcast float %70 to i32 %72 = icmp eq i32 %71, 0 %73 = sext i1 %72 to i32 %74 = bitcast i32 %73 to float %75 = bitcast float %74 to i32 %76 = icmp ne i32 %75, 0 br i1 %76, label %IF15, label %ELSE16 IF15: ; preds = %ELSE13 %77 = insertelement <4 x float> undef, float %0, i32 0 %78 = insertelement <4 x float> %77, float %1, i32 1 %79 = insertelement <4 x float> %78, float 0.000000e+00, i32 2 %80 = insertelement <4 x float> %79, float 0.000000e+00, i32 3 %81 = extractelement <4 x float> %80, i32 0 %82 = extractelement <4 x float> %80, i32 1 %83 = insertelement <4 x float> undef, float %81, i32 0 %84 = insertelement <4 x float> %83, float %82, i32 1 %85 = insertelement <4 x float> %84, float undef, i32 2 %86 = insertelement <4 x float> %85, float undef, i32 3 %87 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %86, i32 16, i32 0, i32 2) %88 = extractelement <4 x float> %87, i32 0 %89 = extractelement <4 x float> %87, i32 1 %90 = extractelement <4 x float> %87, i32 2 %91 = extractelement <4 x float> %87, i32 3 br label %ENDIF ELSE16: ; preds = %ELSE13 %92 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2) %93 = extractelement <4 x float> %92, i32 0 %94 = bitcast float %93 to i32 %95 = icmp eq i32 %94, 2 %96 = sext i1 %95 to i32 %97 = bitcast i32 %96 to float %98 = bitcast float %97 to i32 %99 = icmp ne i32 %98, 0 br i1 %99, label %IF18, label %ELSE19 IF18: ; preds = %ELSE16 %100 = insertelement <4 x float> undef, float %0, i32 0 %101 = insertelement <4 x float> %100, float %1, i32 1 %102 = insertelement <4 x float> %101, float 0.000000e+00, i32 2 %103 = insertelement <4 x float> %102, float 0.000000e+00, i32 3 %104 = extractelement <4 x float> %103, i32 0 %105 = extractelement <4 x float> %103, i32 1 %106 = insertelement <4 x float> undef, float %104, i32 0 %107 = insertelement <4 x float> %106, float %105, i32 1 %108 = insertelement <4 x float> %107, float undef, i32 2 %109 = insertelement <4 x float> %108, float undef, i32 3 %110 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %109, i32 16, i32 0, i32 2) %111 = extractelement <4 x float> %110, i32 0 %112 = extractelement <4 x float> %110, i32 1 %113 = extractelement <4 x float> %110, i32 2 %114 = extractelement <4 x float> %110, i32 3 br label %ENDIF ELSE19: ; preds = %ELSE16 %115 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2) %116 = extractelement <4 x float> %115, i32 0 %117 = bitcast float %116 to i32 %118 = icmp eq i32 %117, 3 %119 = sext i1 %118 to i32 %120 = bitcast i32 %119 to float %121 = bitcast float %120 to i32 %122 = icmp ne i32 %121, 0 br i1 %122, label %IF21, label %ENDIF IF21: ; preds = %ELSE19 %123 = insertelement <4 x float> undef, float %0, i32 0 %124 = insertelement <4 x float> %123, float %1, i32 1 %125 = insertelement <4 x float> %124, float 0.000000e+00, i32 2 %126 = insertelement <4 x float> %125, float 0.000000e+00, i32 3 %127 = extractelement <4 x float> %126, i32 0 %128 = extractelement <4 x float> %126, i32 1 %129 = insertelement <4 x float> undef, float %127, i32 0 %130 = insertelement <4 x float> %129, float %128, i32 1 %131 = insertelement <4 x float> %130, float undef, i32 2 %132 = insertelement <4 x float> %131, float undef, i32 3 %133 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %132, i32 16, i32 0, i32 2) %134 = extractelement <4 x float> %133, i32 0 %135 = extractelement <4 x float> %133, i32 1 %136 = extractelement <4 x float> %133, i32 2 %137 = extractelement <4 x float> %133, i32 3 br label %ENDIF } ; Function Attrs: readnone declare float @llvm.R600.interp.input(i32, i32) #1 ; Function Attrs: readnone declare <4 x float> @llvm.AMDGPU.tex(<4 x float>, i32, i32, i32) #1 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) attributes #0 = { "ShaderType"="0" } attributes #1 = { readnone } # Machine code for function main: Post SSA, not tracking liveness Function Live Ins: %T0_X, %T0_Y, %T0_X, %T0_Y BB#0: derived from LLVM BB %main_body Live Ins: %T0_X %T0_Y %T0_X %T0_Y CF_ALU_PUSH_BEFORE 40, 0, 0, 2, 0, 0, 0, 6, 1 CF_JUMP_EG 24, 0 CF_ALU_PUSH_BEFORE 47, 0, 0, 0, 0, 0, 0, 1, 1 CF_JUMP_EG 21, 0 CF_ALU_PUSH_BEFORE 49, 0, 0, 2, 0, 0, 0, 1, 1 CF_JUMP_EG 8, 0 CF_TC_EG 30, 0 CF_ALU 51, 0, 0, 0, 0, 0, 0, 3, 1 CF_ELSE_EG 21, 1 CF_ALU_PUSH_BEFORE 55, 0, 0, 2, 0, 0, 0, 2, 1 CF_JUMP_EG 17, 0 CF_ALU_PUSH_BEFORE 58, 0, 0, 2, 0, 0, 0, 2, 1 CF_JUMP_EG 14, 0 CF_ALU 61, 0, 0, 2, 0, 0, 0, 4, 1 CF_ELSE_EG 17, 1 CF_TC_EG 32, 0 CF_ALU_POP_AFTER 66, 0, 0, 0, 0, 0, 0, 3, 1 CF_ELSE_EG 20, 1 CF_TC_EG 34, 0 CF_ALU_POP_AFTER 70, 0, 0, 0, 0, 0, 0, 3, 1 POP_EG 21, 1 CF_ELSE_EG 24, 1 CF_TC_EG 36, 0 CF_ALU_POP_AFTER 74, 0, 0, 0, 0, 0, 0, 3, 1 CF_ELSE_EG 27, 1 CF_TC_EG 38, 0 CF_ALU_POP_AFTER 78, 0, 0, 2, 0, 0, 0, 7, 1 EG_ExportSwz %T0_XYZW, 0, 0, 0, 1, 2, 3, 84, 1 CF_END_EG PAD FETCH_CLAUSE 30 %T1_XYZW = TEX_SAMPLE %T0_XYZW, 0, 1, 2, 3, 0, 0, 0, 0, 1, 2, 3, 16, 0, 1, 1, 1, 1 FETCH_CLAUSE 32 %T1_XYZW = TEX_SAMPLE %T0_XYZW, 0, 1, 2, 3, 0, 0, 0, 0, 1, 2, 3, 16, 0, 1, 1, 1, 1 FETCH_CLAUSE 34 %T1_XYZW = TEX_SAMPLE %T0_XYZW, 0, 1, 2, 3, 0, 0, 0, 0, 1, 2, 3, 16, 0, 1, 1, 1, 1 FETCH_CLAUSE 36 %T1_XYZW = TEX_SAMPLE %T0_XYZW, 0, 1, 2, 3, 0, 0, 0, 0, 1, 2, 3, 16, 0, 1, 1, 1, 1 FETCH_CLAUSE 38 %T2_XYZW = TEX_SAMPLE %T0_XYZW, 0, 1, 2, 3, 0, 0, 0, 0, 1, 2, 3, 16, 0, 1, 1, 1, 1 ALU_CLAUSE 40 %T1_W = MOV 1, 0, 0, 0, %KC0_130_X, 0, 0, 0, 2056, 0, pred:%PRED_SEL_OFF, 0, 0 %T2_W = SETNE_INT 0, 0, 1, 0, 0, 0, %KC0_129_X, 0, 0, 0, 2052, %ZERO, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0 %T0_X = INTERP_XY 0, 0, 1, 0, 0, 0, %T0_Y, 0, 0, 0, -1, %ArrayBase448, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0 %T0_Y = INTERP_XY 0, 0, 1, 0, 0, 0, %T0_X, 0, 0, 0, -1, %ArrayBase448, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0 %T0_Z = INTERP_XY 0, 0, 0, 0, 0, 0, %T0_Y, 0, 0, 0, -1, %ArrayBase448, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0 %T0_W = INTERP_XY 0, 0, 0, 0, 0, 0, %T0_X, 0, 0, 0, -1, %ArrayBase448, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0 %PREDICATE_BIT = PRED_SETNE_INT 1, 0, 0, 0, 0, 0, %T2_W, 0, 0, 0, -1, %ZERO, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0 ALU_CLAUSE 47 %T1_W = SETE_INT 0, 0, 1, 0, 0, 0, %T1_W, 0, 0, 0, -1, %ONE_INT, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0 %PREDICATE_BIT = PRED_SETE_INT 1, 0, 0, 0, 0, 0, %PV_W, 0, 0, 0, -1, %ZERO, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0 ALU_CLAUSE 49 %T1_W = SETNE_INT 0, 0, 1, 0, 0, 0, %KC0_130_X, 0, 0, 0, 2056, %ZERO, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0 %PREDICATE_BIT = PRED_SETE_INT 1, 0, 0, 0, 0, 0, %PV_W, 0, 0, 0, -1, %ZERO, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0 ALU_CLAUSE 51 %T0_X = MOV 1, 0, 0, 0, %T1_W, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_Y = MOV 1, 0, 0, 0, %T1_Z, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_Z = MOV 1, 0, 0, 0, %T1_Y, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_W = MOV 1, 0, 0, 0, %T1_X, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW ALU_CLAUSE 55 %T1_W = SETNE_INT 0, 0, 1, 0, 0, 0, %KC0_130_X, 0, 0, 0, 2056, %ALU_LITERAL_X, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 2, 0 LITERALS 2, 0 %PREDICATE_BIT = PRED_SETNE_INT 1, 0, 0, 0, 0, 0, %PV_W, 0, 0, 0, -1, %ZERO, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0 ALU_CLAUSE 58 %T1_W = SETNE_INT 0, 0, 1, 0, 0, 0, %KC0_130_X, 0, 0, 0, 2056, %ALU_LITERAL_X, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 3, 0 LITERALS 3, 0 %PREDICATE_BIT = PRED_SETNE_INT 1, 0, 0, 0, 0, 0, %PV_W, 0, 0, 0, -1, %ZERO, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0 ALU_CLAUSE 61 %T0_X = SETE_INT 0, 0, 1, 0, 0, 0, %KC0_129_X, 0, 0, 0, 2052, %ZERO, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_Y = MOV 1, 0, 0, 0, %ALU_LITERAL_X, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW, %T0_XYZW LITERALS 0, 0 %T0_Z = MOV 1, 0, 0, 0, %PV_Y, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_W = MOV 1, 0, 0, 0, %T0_Y, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW ALU_CLAUSE 66 %T0_X = MOV 1, 0, 0, 0, %T1_W, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_Y = MOV 1, 0, 0, 0, %T1_Z, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_Z = MOV 1, 0, 0, 0, %T1_Y, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_W = MOV 1, 0, 0, 0, %T1_X, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW ALU_CLAUSE 70 %T0_X = MOV 1, 0, 0, 0, %T1_Y, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_Y = MOV 1, 0, 0, 0, %T1_Z, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_Z = MOV 1, 0, 0, 0, %T1_W, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_W = MOV 1, 0, 0, 0, %T1_X, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW ALU_CLAUSE 74 %T0_X = MOV 1, 0, 0, 0, %T1_W, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_Y = MOV 1, 0, 0, 0, %T1_X, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_Z = MOV 1, 0, 0, 0, %T1_Y, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_W = MOV 1, 0, 0, 0, %T1_Z, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW ALU_CLAUSE 78 %T0_W = SETNE_INT 0, 0, 1, 0, 0, 0, %T1_W, 0, 0, 0, -1, %ZERO, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0 %T1_W = SETNE_INT 0, 0, 1, 0, 0, 0, %KC0_130_X, 0, 0, 0, 2056, %ALU_LITERAL_X, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 3, 0 LITERALS 3, 0 %T1_W = AND_INT 0, 0, 1, 0, 0, 0, %PV_W, 0, 0, 0, -1, %PS, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0 %T0_X = CNDE_INT 0, 0, %PV_W, 0, 0, -1, %T2_X, 0, 0, -1, %T2_Z, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_Z = CNDE_INT 0, 0, %PV_W, 0, 0, -1, %T2_Z, 0, 0, -1, %T2_X, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW, %T0_XYZW %T0_Y = MOV 1, 0, 0, 0, %T2_Y, 0, 0, 0, -1, 0, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW %T0_W = MOV 1, 0, 0, 0, %T2_W, 0, 0, 0, -1, 1, pred:%PRED_SEL_OFF, 0, 0, %T0_XYZW # End machine code for function main. ===== SHADER #35 ======================================= PS/PALM/EVERGREEN ===== ===== 172 dw ===== 3 gprs ===== 2 stack ======================================== 0000 80000028 a4180000 ALU_PUSH_BEFORE 7 @80 KC0[CB0:0-31] 0080 00000082 60200c90 1 w: MOV R1.w, KC0[2].x 0082 801f0081 60401e90 t: SETNE_INT R2.w, KC0[1].x, 0 0084 00380400 00146b10 2 x: INTERP_XY R0.x, R0.y, Param0.x VEC_210 0086 00380000 20146b10 y: INTERP_XY R0.y, R0.x, Param0.x VEC_210 0088 00380400 40146b00 z: INTERP_XY __.z, R0.y, Param0.x VEC_210 0090 80380000 60146b00 w: INTERP_XY __.w, R0.x, Param0.x VEC_210 0092 801f0c02 00002284 3 M x: PRED_SETNE_INT __.x, R2.w, 0 0002 00000018 82800000 JUMP @48 0004 0000002f a4040000 ALU_PUSH_BEFORE 2 @94 0094 801f4c01 60201d10 4 w: SETE_INT R1.w, R1.w, 1 0096 801f0cfe 00002104 5 M x: PRED_SETE_INT __.x, PV.w, 0 0006 00000015 82800000 JUMP @42 0008 80000031 a4040000 ALU_PUSH_BEFORE 2 @98 KC0[CB0:0-31] 0098 801f0082 60201e90 6 w: SETNE_INT R1.w, KC0[2].x, 0 0100 801f0cfe 00002104 7 M x: PRED_SETE_INT __.x, PV.w, 0 0010 00000008 82800000 JUMP @16 0012 0000001e 80400000 TEX 1 @60 0060 00001010 f00d1001 68800000 SAMPLE R1.xyzw, R0.xyzw, RID:16, SID:0 CT:NNNN 0014 00000033 a00c0000 ALU 4 @102 0102 00000c01 00000c90 8 x: MOV R0.x, R1.w 0104 00000801 20000c90 y: MOV R0.y, R1.z 0106 00000401 40000c90 z: MOV R0.z, R1.y 0108 80000001 60000c90 w: MOV R0.w, R1.x 0016 00000015 83400001 ELSE @42 POP:1 0018 80000037 a4080000 ALU_PUSH_BEFORE 3 @110 KC0[CB0:0-31] 0110 801fa082 60201e90 9 w: SETNE_INT R1.w, KC0[2].x, [0x00000002 2.8026e-45].x 0112 00000002 0114 801f0cfe 00002284 10 M x: PRED_SETNE_INT __.x, PV.w, 0 0020 00000011 82800000 JUMP @34 0022 8000003a a4080000 ALU_PUSH_BEFORE 3 @116 KC0[CB0:0-31] 0116 801fa082 60201e90 11 w: SETNE_INT R1.w, KC0[2].x, [0x00000003 4.2039e-45].x 0118 00000003 0120 801f0cfe 00002284 12 M x: PRED_SETNE_INT __.x, PV.w, 0 0024 0000000e 82800000 JUMP @28 0026 8000003d a0100000 ALU 5 @122 KC0[CB0:0-31] 0122 001f0081 00001d10 13 x: SETE_INT R0.x, KC0[1].x, 0 0124 800000fd 20000c90 y: MOV R0.y, [0x00000000 0].x 0126 00000000 0128 800004fe 40000c90 14 z: MOV R0.z, PV.y 0130 80000400 60000c90 15 w: MOV R0.w, R0.y 0028 00000011 83400001 ELSE @34 POP:1 0030 00000020 80400000 TEX 1 @64 0064 00001010 f00d1001 68800000 SAMPLE R1.xyzw, R0.xyzw, RID:16, SID:0 CT:NNNN 0032 00000042 a80c0000 ALU_POP_AFTER 4 @132 0132 00000c01 00000c90 16 x: MOV R0.x, R1.w 0134 00000801 20000c90 y: MOV R0.y, R1.z 0136 00000401 40000c90 z: MOV R0.z, R1.y 0138 80000001 60000c90 w: MOV R0.w, R1.x 0034 00000014 83400001 ELSE @40 POP:1 0036 00000022 80400000 TEX 1 @68 0068 00001010 f00d1001 68800000 SAMPLE R1.xyzw, R0.xyzw, RID:16, SID:0 CT:NNNN 0038 00000046 a80c0000 ALU_POP_AFTER 4 @140 0140 00000401 00000c90 17 x: MOV R0.x, R1.y 0142 00000801 20000c90 y: MOV R0.y, R1.z 0144 00000c01 40000c90 z: MOV R0.z, R1.w 0146 80000001 60000c90 w: MOV R0.w, R1.x 0040 00000015 83800001 POP @42 POP:1 0042 00000018 83400001 ELSE @48 POP:1 0044 00000024 80400000 TEX 1 @72 0072 00001010 f00d1001 68800000 SAMPLE R1.xyzw, R0.xyzw, RID:16, SID:0 CT:NNNN 0046 0000004a a80c0000 ALU_POP_AFTER 4 @148 0148 00000c01 00000c90 18 x: MOV R0.x, R1.w 0150 00000001 20000c90 y: MOV R0.y, R1.x 0152 00000401 40000c90 z: MOV R0.z, R1.y 0154 80000801 60000c90 w: MOV R0.w, R1.z 0048 0000001b 83400001 ELSE @54 POP:1 0050 00000026 80400000 TEX 1 @76 0076 00001010 f00d1002 68800000 SAMPLE R2.xyzw, R0.xyzw, RID:16, SID:0 CT:NNNN 0052 8000004e a81c0000 ALU_POP_AFTER 8 @156 KC0[CB0:0-31] 0156 001f0c01 60001e90 19 w: SETNE_INT R0.w, R1.w, 0 0158 801fa082 60201e90 t: SETNE_INT R1.w, KC0[2].x, [0x00000003 4.2039e-45].x 0160 00000003 0162 801fecfe 60201810 20 w: AND_INT R1.w, PV.w, PS 0164 00004cfe 00038802 21 x: CNDE_INT R0.x, PV.w, R2.x, R2.z 0166 81004cfe 40038002 z: CNDE_INT R0.z, PV.w, R2.z, R2.x 0168 00000402 20000c90 22 y: MOV R0.y, R2.y 0170 80000c02 60000c90 w: MOV R0.w, R2.w 0054 c0000000 95300688 EXPORT_DONE PIXEL 0 R0.xyzw VPM EOP ===== SHADER_END =============================================================== ###### after parse { preloaded inputs [R0.xF@R0.x, R0.yF@R0.y] ALU_PUSH_BEFORE < [ MOV R1.w, C2.x SETNE_INT R2.w, C1.x, 0|00000000 ] [ INTERP_XY 4S INTERP_XY R0.xF@R0.x, R0.yF@R0.y, Param0x 4S INTERP_XY R0.yF@R0.y, R0.xF@R0.x, Param0y 4S INTERP_XY __, R0.yF@R0.y, Param0z 4S INTERP_XY __, R0.xF@R0.x, Param0w ] [ PRED_SETNE_INT __, __, EM, R2.w, 0|00000000 ] > region #0 depart region #0 after { if EM { depart region #0 after { JUMP @48 ALU_PUSH_BEFORE < [ SETE_INT R1.w, R1.w, 1.4013e-45|00000001 ] [ PRED_SETE_INT __, __, EM, R1.w, 0|00000000 ] > region #1 depart region #1 after { if EM { depart region #1 after { JUMP @42 ALU_PUSH_BEFORE < [ SETNE_INT R1.w, C2.x, 0|00000000 ] [ PRED_SETE_INT __, __, EM, R1.w, 0|00000000 ] > region #2 depart region #2 after { if EM { depart region #2 after { JUMP @16 TEX < SAMPLE R1.x, R1.y, R1.z, R1.w, R0.xF@R0.x, R0.yF@R0.y, R0.z, R0.w > ALU < [ MOV R0.xF@R0.x, R1.w MOV R0.yF@R0.y, R1.z MOV R0.z, R1.y MOV R0.w, R1.x ] > } end_depart } endif ELSE @42 ALU_PUSH_BEFORE < [ SETNE_INT R1.w, C2.x, 2.8026e-45|00000002 ] [ PRED_SETNE_INT __, __, EM, R1.w, 0|00000000 ] > region #3 depart region #3 after { if EM { depart region #3 after { JUMP @34 ALU_PUSH_BEFORE < [ SETNE_INT R1.w, C2.x, 4.2039e-45|00000003 ] [ PRED_SETNE_INT __, __, EM, R1.w, 0|00000000 ] > region #4 depart region #4 after { if EM { depart region #4 after { JUMP @28 ALU < [ SETE_INT R0.xF@R0.x, C1.x, 0|00000000 MOV R0.yF@R0.y, 0|00000000 ] [ MOV R0.z, R0.yF@R0.y ] [ MOV R0.w, R0.yF@R0.y ] > } end_depart } endif ELSE @34 TEX < SAMPLE R1.x, R1.y, R1.z, R1.w, R0.xF@R0.x, R0.yF@R0.y, R0.z, R0.w > ALU_POP_AFTER < [ MOV R0.xF@R0.x, R1.w MOV R0.yF@R0.y, R1.z MOV R0.z, R1.y MOV R0.w, R1.x ] > } end_depart } end_depart } endif ELSE @40 TEX < SAMPLE R1.x, R1.y, R1.z, R1.w, R0.xF@R0.x, R0.yF@R0.y, R0.z, R0.w > ALU_POP_AFTER < [ MOV R0.xF@R0.x, R1.y MOV R0.yF@R0.y, R1.z MOV R0.z, R1.w MOV R0.w, R1.x ] > } end_depart POP @42 } end_depart } end_depart } endif ELSE @48 TEX < SAMPLE R1.x, R1.y, R1.z, R1.w, R0.xF@R0.x, R0.yF@R0.y, R0.z, R0.w > ALU_POP_AFTER < [ MOV R0.xF@R0.x, R1.w MOV R0.yF@R0.y, R1.x MOV R0.z, R1.y MOV R0.w, R1.z ] > } end_depart } end_depart } endif ELSE @54 TEX < SAMPLE R2.x, R2.y, R2.z, R2.w, R0.xF@R0.x, R0.yF@R0.y, R0.z, R0.w > ALU_POP_AFTER < [ SETNE_INT R0.w, R1.w, 0|00000000 SETNE_INT R1.w, C2.x, 4.2039e-45|00000003 ] [ AND_INT R1.w, R0.w, R1.w ] [ CNDE_INT R0.xF@R0.x, R1.w, R2.x, R2.z CNDE_INT R0.z, R1.w, R2.z, R2.x ] [ MOV R0.yF@R0.y, R2.y MOV R0.w, R2.w ] > } end_depart EXPORT PIXEL 0 R0.xF@R0.x, R0.yF@R0.y, R0.z, R0.w } ###### after ssa_rename { preloaded inputs [R0.xF@R0.x, R0.yF@R0.y] ALU_PUSH_BEFORE < [ MOV R1.w.1, C2.x SETNE_INT R2.w.1, C1.x, 0|00000000 ] [ INTERP_XY R0.x.1, R0.y.1, __, __, R0.yF@R0.y, Param0x, R0.xF@R0.x, Param0y, R0.yF@R0.y, Param0z, R0.xF@R0.x, Param0w ] [ PRED_SETNE_INT __, __, EM.1, R2.w.1, 0|00000000 ] > region #0 depart region #0 after { if EM.1 { depart region #0 after { JUMP @48 ALU_PUSH_BEFORE < [ SETE_INT R1.w.2, R1.w.1, 1.4013e-45|00000001 ] [ PRED_SETE_INT __, __, EM.2, R1.w.2, 0|00000000 ] > region #1 depart region #1 after { if EM.2 { depart region #1 after { JUMP @42 ALU_PUSH_BEFORE < [ SETNE_INT R1.w.3, C2.x, 0|00000000 ] [ PRED_SETE_INT __, __, EM.3, R1.w.3, 0|00000000 ] > region #2 depart region #2 after { if EM.3 { depart region #2 after { JUMP @16 TEX < SAMPLE R1.x.1, R1.y.1, R1.z.1, R1.w.4, R0.x.1, R0.y.1, R0.z, R0.w > ALU < [ MOV R0.x.2, R1.w.4 MOV R0.y.2, R1.z.1 MOV R0.z.1, R1.y.1 MOV R0.w.1, R1.x.1 ] > } end_depart } endif ELSE @42 ALU_PUSH_BEFORE < [ SETNE_INT R1.w.5, C2.x, 2.8026e-45|00000002 ] [ PRED_SETNE_INT __, __, EM.4, R1.w.5, 0|00000000 ] > region #3 depart region #3 after { if EM.4 { depart region #3 after { JUMP @34 ALU_PUSH_BEFORE < [ SETNE_INT R1.w.6, C2.x, 4.2039e-45|00000003 ] [ PRED_SETNE_INT __, __, EM.5, R1.w.6, 0|00000000 ] > region #4 depart region #4 after { if EM.5 { depart region #4 after { JUMP @28 ALU < [ SETE_INT R0.x.3, C1.x, 0|00000000 MOV R0.y.3, 0|00000000 ] [ MOV R0.z.2, R0.y.3 ] [ MOV R0.w.2, R0.y.3 ] > } end_depart } endif ELSE @34 TEX < SAMPLE R1.x.2, R1.y.2, R1.z.2, R1.w.7, R0.x.1, R0.y.1, R0.z, R0.w > ALU_POP_AFTER < [ MOV R0.x.4, R1.w.7 MOV R0.y.4, R1.z.2 MOV R0.z.3, R1.y.2 MOV R0.w.3, R1.x.2 ] > } end_depart { * phi R0.x.5, R0.x.3, R0.x.4 * phi R0.y.5, R0.y.3, R0.y.4 * phi R1.w.8, R1.w.6, R1.w.7 * phi R1.x.3, R1.x, R1.x.2 * phi R1.y.3, R1.y, R1.y.2 * phi R1.z.3, R1.z, R1.z.2 * phi R0.z.4, R0.z.2, R0.z.3 * phi R0.w.4, R0.w.2, R0.w.3 } } end_depart } endif ELSE @40 TEX < SAMPLE R1.x.4, R1.y.4, R1.z.4, R1.w.9, R0.x.1, R0.y.1, R0.z, R0.w > ALU_POP_AFTER < [ MOV R0.x.6, R1.y.4 MOV R0.y.6, R1.z.4 MOV R0.z.5, R1.w.9 MOV R0.w.5, R1.x.4 ] > } end_depart { * phi R0.x.7, R0.x.5, R0.x.6 * phi R0.y.7, R0.y.5, R0.y.6 * phi R1.w.10, R1.w.8, R1.w.9 * phi EM.6, EM.5, EM.4 * phi R1.x.5, R1.x.3, R1.x.4 * phi R1.y.5, R1.y.3, R1.y.4 * phi R1.z.5, R1.z.3, R1.z.4 * phi R0.z.6, R0.z.4, R0.z.5 * phi R0.w.6, R0.w.4, R0.w.5 } POP @42 } end_depart { * phi R0.x.8, R0.x.2, R0.x.7 * phi R0.y.8, R0.y.2, R0.y.7 * phi R1.w.11, R1.w.4, R1.w.10 * phi EM.7, EM.3, EM.6 * phi R1.x.6, R1.x.1, R1.x.5 * phi R1.y.6, R1.y.1, R1.y.5 * phi R1.z.6, R1.z.1, R1.z.5 * phi R0.z.7, R0.z.1, R0.z.6 * phi R0.w.7, R0.w.1, R0.w.6 } } end_depart } endif ELSE @48 TEX < SAMPLE R1.x.7, R1.y.7, R1.z.7, R1.w.12, R0.x.1, R0.y.1, R0.z, R0.w > ALU_POP_AFTER < [ MOV R0.x.9, R1.w.12 MOV R0.y.9, R1.x.7 MOV R0.z.8, R1.y.7 MOV R0.w.8, R1.z.7 ] > } end_depart { * phi R0.x.10, R0.x.8, R0.x.9 * phi R0.y.10, R0.y.8, R0.y.9 * phi R1.w.13, R1.w.11, R1.w.12 * phi EM.8, EM.7, EM.2 * phi R1.x.8, R1.x.6, R1.x.7 * phi R1.y.8, R1.y.6, R1.y.7 * phi R1.z.8, R1.z.6, R1.z.7 * phi R0.z.9, R0.z.7, R0.z.8 * phi R0.w.9, R0.w.7, R0.w.8 } } end_depart } endif ELSE @54 TEX < SAMPLE R2.x.1, R2.y.1, R2.z.1, R2.w.2, R0.x.1, R0.y.1, R0.z, R0.w > ALU_POP_AFTER < [ SETNE_INT R0.w.10, R1.w.1, 0|00000000 SETNE_INT R1.w.14, C2.x, 4.2039e-45|00000003 ] [ AND_INT R1.w.15, R0.w.10, R1.w.14 ] [ CNDE_INT R0.x.11, R1.w.15, R2.x.1, R2.z.1 CNDE_INT R0.z.10, R1.w.15, R2.z.1, R2.x.1 ] [ MOV R0.y.11, R2.y.1 MOV R0.w.11, R2.w.2 ] > } end_depart { * phi R0.x.12, R0.x.10, R0.x.11 * phi R0.y.12, R0.y.10, R0.y.11 * phi R1.w.16, R1.w.13, R1.w.15 * phi R2.w.3, R2.w.1, R2.w.2 * phi EM.9, EM.8, EM.1 * phi R1.x.9, R1.x.8, R1.x * phi R1.y.9, R1.y.8, R1.y * phi R1.z.9, R1.z.8, R1.z * phi R0.z.11, R0.z.9, R0.z.10 * phi R0.w.12, R0.w.9, R0.w.11 * phi R2.x.2, R2.x, R2.x.1 * phi R2.y.2, R2.y, R2.y.1 * phi R2.z.2, R2.z, R2.z.1 } EXPORT PIXEL 0 R0.x.12, R0.y.12, R0.z.11, R0.w.12 } ###### after if_conversion { preloaded inputs [R0.xF@R0.x, R0.yF@R0.y] live_before: [R0.z R0.w ] MOV R1.w.1, C2.x SETNE_INT R2.w.1, C1.x, 0|00000000 INTERP_XY R0.x.1, R0.y.1, __, __, R0.yF@R0.y, Param0x, R0.xF@R0.x, Param0y, R0.yF@R0.y, Param0z, R0.xF@R0.x, Param0w PRED_SETNE_INT __, __, EM.1, R2.w.1, 0|00000000 region #0 live_before: [R0.z R0.w R1.w.1 R0.x.1 R0.y.1 EM.1 ] depart region #0 after { if EM.1 { depart region #0 after { SETE_INT R1.w.2, R1.w.1, 1.4013e-45|00000001 PRED_SETE_INT __, __, EM.2, R1.w.2, 0|00000000 region #1 live_before: [R0.z R0.w R0.x.1 R0.y.1 EM.2 ] depart region #1 after { if EM.2 { depart region #1 after { SETNE_INT R1.w.3, C2.x, 0|00000000 PRED_SETE_INT __, __, EM.3, R1.w.3, 0|00000000 region #2 live_before: [R0.z R0.w R0.x.1 R0.y.1 EM.3 ] depart region #2 after { if EM.3 { depart region #2 after { SAMPLE R1.x.1, R1.y.1, R1.z.1, R1.w.4, R0.x.1, R0.y.1, R0.z, R0.w MOV R0.x.2, R1.w.4 MOV R0.y.2, R1.z.1 MOV R0.z.1, R1.y.1 MOV R0.w.1, R1.x.1 } end_depart } endif live_after: [R0.z R0.w R0.x.1 R0.y.1 ] SETNE_INT R1.w.5, C2.x, 2.8026e-45|00000002 PRED_SETNE_INT __, __, EM.4, R1.w.5, 0|00000000 region #3 live_before: [R0.z R0.w R0.x.1 R0.y.1 EM.4 ] depart region #3 after { if EM.4 { depart region #3 after { SETNE_INT R1.w.6, C2.x, 4.2039e-45|00000003 PRED_SETNE_INT __, __, EM.5, R1.w.6, 0|00000000 region #4 live_before: [R0.z R0.w R0.x.1 R0.y.1 EM.5 ] depart region #4 after { if EM.5 { depart region #4 after { SETE_INT R0.x.3, C1.x, 0|00000000 MOV R0.y.3, 0|00000000 MOV R0.z.2, R0.y.3 MOV R0.w.2, R0.y.3 } end_depart } endif live_after: [R0.z R0.w R0.x.1 R0.y.1 ] SAMPLE R1.x.2, R1.y.2, R1.z.2, R1.w.7, R0.x.1, R0.y.1, R0.z, R0.w MOV R0.x.4, R1.w.7 MOV R0.y.4, R1.z.2 MOV R0.z.3, R1.y.2 MOV R0.w.3, R1.x.2 } end_depart { * phi R0.x.5, R0.x.3, R0.x.4 * phi R0.y.5, R0.y.3, R0.y.4 * phi R0.z.4, R0.z.2, R0.z.3 * phi R0.w.4, R0.w.2, R0.w.3 } live_after: [R0.x.5 R0.y.5 R0.z.4 R0.w.4 ] } end_depart } endif live_after: [R0.z R0.w R0.x.1 R0.y.1 ] SAMPLE R1.x.4, R1.y.4, R1.z.4, R1.w.9, R0.x.1, R0.y.1, R0.z, R0.w MOV R0.x.6, R1.y.4 MOV R0.y.6, R1.z.4 MOV R0.z.5, R1.w.9 MOV R0.w.5, R1.x.4 } end_depart { * phi R0.x.7, R0.x.5, R0.x.6 * phi R0.y.7, R0.y.5, R0.y.6 * phi R0.z.6, R0.z.4, R0.z.5 * phi R0.w.6, R0.w.4, R0.w.5 } live_after: [R0.x.7 R0.y.7 R0.z.6 R0.w.6 ] } end_depart { * phi R0.x.8, R0.x.2, R0.x.7 * phi R0.y.8, R0.y.2, R0.y.7 * phi R0.z.7, R0.z.1, R0.z.6 * phi R0.w.7, R0.w.1, R0.w.6 } live_after: [R0.x.8 R0.y.8 R0.z.7 R0.w.7 ] } end_depart } endif live_after: [R0.z R0.w R0.x.1 R0.y.1 ] SAMPLE R1.x.7, R1.y.7, R1.z.7, R1.w.12, R0.x.1, R0.y.1, R0.z, R0.w MOV R0.x.9, R1.w.12 MOV R0.y.9, R1.x.7 MOV R0.z.8, R1.y.7 MOV R0.w.8, R1.z.7 } end_depart { * phi R0.x.10, R0.x.8, R0.x.9 * phi R0.y.10, R0.y.8, R0.y.9 * phi R0.z.9, R0.z.7, R0.z.8 * phi R0.w.9, R0.w.7, R0.w.8 } live_after: [R0.x.10 R0.y.10 R0.z.9 R0.w.9 ] } end_depart } endif live_after: [R0.z R0.w R1.w.1 R0.x.1 R0.y.1 ] SAMPLE R2.x.1, R2.y.1, R2.z.1, R2.w.2, R0.x.1, R0.y.1, R0.z, R0.w SETNE_INT R0.w.10, R1.w.1, 0|00000000 SETNE_INT R1.w.14, C2.x, 4.2039e-45|00000003 AND_INT R1.w.15, R0.w.10, R1.w.14 CNDE_INT R0.x.11, R1.w.15, R2.x.1, R2.z.1 CNDE_INT R0.z.10, R1.w.15, R2.z.1, R2.x.1 MOV R0.y.11, R2.y.1 MOV R0.w.11, R2.w.2 } end_depart { * phi R0.x.12, R0.x.10, R0.x.11 * phi R0.y.12, R0.y.10, R0.y.11 * phi R0.z.11, R0.z.9, R0.z.10 * phi R0.w.12, R0.w.9, R0.w.11 } live_after: [R0.x.12 R0.y.12 R0.z.11 R0.w.12 ] EXPORT PIXEL 0 R0.x.12, R0.y.12, R0.z.11, R0.w.12 } ###### after peephole { preloaded inputs [R0.xF@R0.x, R0.yF@R0.y] live_before: [R0.z R0.w ] MOV R1.w.1, C2.x SETNE_INT R2.w.1, C1.x, 0|00000000 INTERP_XY R0.x.1, R0.y.1, __, __, R0.yF@R0.y, Param0x, R0.xF@R0.x, Param0y, R0.yF@R0.y, Param0z, R0.xF@R0.x, Param0w PRED_SETNE_INT __, __, EM.1, C1.x, 0|00000000 region #0 live_before: [R0.z R0.w R1.w.1 R0.x.1 R0.y.1 EM.1 ] depart region #0 after { if EM.1 { depart region #0 after { SETE_INT R1.w.2, R1.w.1, 1.4013e-45|00000001 PRED_SETNE_INT __, __, EM.2, R1.w.1, 1.4013e-45|00000001 region #1 live_before: [R0.z R0.w R0.x.1 R0.y.1 EM.2 ] depart region #1 after { if EM.2 { depart region #1 after { SETNE_INT R1.w.3, C2.x, 0|00000000 PRED_SETE_INT __, __, EM.3, C2.x, 0|00000000 region #2 live_before: [R0.z R0.w R0.x.1 R0.y.1 EM.3 ] depart region #2 after { if EM.3 { depart region #2 after { SAMPLE R1.x.1, R1.y.1, R1.z.1, R1.w.4, R0.x.1, R0.y.1, R0.z, R0.w MOV R0.x.2, R1.w.4 MOV R0.y.2, R1.z.1 MOV R0.z.1, R1.y.1 MOV R0.w.1, R1.x.1 } end_depart } endif live_after: [R0.z R0.w R0.x.1 R0.y.1 ] SETNE_INT R1.w.5, C2.x, 2.8026e-45|00000002 PRED_SETNE_INT __, __, EM.4, C2.x, 2.8026e-45|00000002 region #3 live_before: [R0.z R0.w R0.x.1 R0.y.1 EM.4 ] depart region #3 after { if EM.4 { depart region #3 after { SETNE_INT R1.w.6, C2.x, 4.2039e-45|00000003 PRED_SETNE_INT __, __, EM.5, C2.x, 4.2039e-45|00000003 region #4 live_before: [R0.z R0.w R0.x.1 R0.y.1 EM.5 ] depart region #4 after { if EM.5 { depart region #4 after { SETE_INT R0.x.3, C1.x, 0|00000000 MOV R0.y.3, 0|00000000 MOV R0.z.2, R0.y.3 MOV R0.w.2, R0.y.3 } end_depart } endif live_after: [R0.z R0.w R0.x.1 R0.y.1 ] SAMPLE R1.x.2, R1.y.2, R1.z.2, R1.w.7, R0.x.1, R0.y.1, R0.z, R0.w MOV R0.x.4, R1.w.7 MOV R0.y.4, R1.z.2 MOV R0.z.3, R1.y.2 MOV R0.w.3, R1.x.2 } end_depart { * phi R0.x.5, R0.x.3, R0.x.4 * phi R0.y.5, R0.y.3, R0.y.4 * phi R0.z.4, R0.z.2, R0.z.3 * phi R0.w.4, R0.w.2, R0.w.3 } live_after: [R0.x.5 R0.y.5 R0.z.4 R0.w.4 ] } end_depart } endif live_after: [R0.z R0.w R0.x.1 R0.y.1 ] SAMPLE R1.x.4, R1.y.4, R1.z.4, R1.w.9, R0.x.1, R0.y.1, R0.z, R0.w MOV R0.x.6, R1.y.4 MOV R0.y.6, R1.z.4 MOV R0.z.5, R1.w.9 MOV R0.w.5, R1.x.4 } end_depart { * phi R0.x.7, R0.x.5, R0.x.6 * phi R0.y.7, R0.y.5, R0.y.6 * phi R0.z.6, R0.z.4, R0.z.5 * phi R0.w.6, R0.w.4, R0.w.5 } live_after: [R0.x.7 R0.y.7 R0.z.6 R0.w.6 ] } end_depart { * phi R0.x.8, R0.x.2, R0.x.7 * phi R0.y.8, R0.y.2, R0.y.7 * phi R0.z.7, R0.z.1, R0.z.6 * phi R0.w.7, R0.w.1, R0.w.6 } live_after: [R0.x.8 R0.y.8 R0.z.7 R0.w.7 ] } end_depart } endif live_after: [R0.z R0.w R0.x.1 R0.y.1 ] SAMPLE R1.x.7, R1.y.7, R1.z.7, R1.w.12, R0.x.1, R0.y.1, R0.z, R0.w MOV R0.x.9, R1.w.12 MOV R0.y.9, R1.x.7 MOV R0.z.8, R1.y.7 MOV R0.w.8, R1.z.7 } end_depart { * phi R0.x.10, R0.x.8, R0.x.9 * phi R0.y.10, R0.y.8, R0.y.9 * phi R0.z.9, R0.z.7, R0.z.8 * phi R0.w.9, R0.w.7, R0.w.8 } live_after: [R0.x.10 R0.y.10 R0.z.9 R0.w.9 ] } end_depart } endif live_after: [R0.z R0.w R1.w.1 R0.x.1 R0.y.1 ] SAMPLE R2.x.1, R2.y.1, R2.z.1, R2.w.2, R0.x.1, R0.y.1, R0.z, R0.w SETNE_INT R0.w.10, R1.w.1, 0|00000000 SETNE_INT R1.w.14, C2.x, 4.2039e-45|00000003 AND_INT R1.w.15, R0.w.10, R1.w.14 CNDE_INT R0.x.11, R1.w.15, R2.x.1, R2.z.1 CNDE_INT R0.z.10, R1.w.15, R2.z.1, R2.x.1 MOV R0.y.11, R2.y.1 MOV R0.w.11, R2.w.2 } end_depart { * phi R0.x.12, R0.x.10, R0.x.11 * phi R0.y.12, R0.y.10, R0.y.11 * phi R0.z.11, R0.z.9, R0.z.10 * phi R0.w.12, R0.w.9, R0.w.11 } live_after: [R0.x.12 R0.y.12 R0.z.11 R0.w.12 ] EXPORT PIXEL 0 R0.x.12, R0.y.12, R0.z.11, R0.w.12 } ###### after gvn { preloaded inputs [R0.xF@R0.x, R0.yF@R0.y] live_before: [R0.z R0.w ] MOV R1.w.1, C2.x SETNE_INT R2.w.1, C1.x, 0|00000000 INTERP_XY R0.x.1, R0.y.1, __, __, R0.yF@R0.y, Param0x, R0.xF@R0.x, Param0y, R0.yF@R0.y, Param0z, R0.xF@R0.x, Param0w PRED_SETNE_INT __, __, EM.1, C1.x, 0|00000000 region #0 live_before: [R0.z R0.w R1.w.1 R0.x.1 R0.y.1 EM.1 ] depart region #0 after { if EM.1 { depart region #0 after { SETE_INT R1.w.2, C2.x, 1.4013e-45|00000001 PRED_SETNE_INT __, __, EM.2, C2.x, 1.4013e-45|00000001 region #1 live_before: [R0.z R0.w R0.x.1 R0.y.1 EM.2 ] depart region #1 after { if EM.2 { depart region #1 after { SETNE_INT R1.w.3, C2.x, 0|00000000 PRED_SETE_INT __, __, EM.3, C2.x, 0|00000000 region #2 live_before: [R0.z R0.w R0.x.1 R0.y.1 EM.3 ] depart region #2 after { if EM.3 { depart region #2 after { SAMPLE R1.x.1, R1.y.1, R1.z.1, R1.w.4, R0.x.1, R0.y.1, undef, undef MOV R0.x.2, R1.w.4 MOV R0.y.2, R1.z.1 MOV R0.z.1, R1.y.1 MOV R0.w.1, R1.x.1 } end_depart } endif live_after: [R0.z R0.w R0.x.1 R0.y.1 ] SETNE_INT R1.w.5, C2.x, 2.8026e-45|00000002 PRED_SETNE_INT __, __, EM.4, C2.x, 2.8026e-45|00000002 region #3 live_before: [R0.z R0.w R0.x.1 R0.y.1 EM.4 ] depart region #3 after { if EM.4 { depart region #3 after { SETNE_INT R1.w.6, C2.x, 4.2039e-45|00000003 PRED_SETNE_INT __, __, EM.5, C2.x, 4.2039e-45|00000003 region #4 live_before: [R0.z R0.w R0.x.1 R0.y.1 EM.5 ] depart region #4 after { if EM.5 { depart region #4 after { SETE_INT R0.x.3, C1.x, 0|00000000 MOV R0.y.3, 0|00000000 MOV R0.z.2, 0|00000000 MOV R0.w.2, 0|00000000 } end_depart } endif live_after: [R0.z R0.w R0.x.1 R0.y.1 ] SAMPLE R1.x.2, R1.y.2, R1.z.2, R1.w.7, R0.x.1, R0.y.1, undef, undef MOV R0.x.4, R1.w.7 MOV R0.y.4, R1.z.2 MOV R0.z.3, R1.y.2 MOV R0.w.3, R1.x.2 } end_depart { * phi R0.x.5, R0.x.3, R1.w.7 * phi R0.y.5, 0|00000000, R1.z.2 * phi R0.z.4, 0|00000000, R1.y.2 * phi R0.w.4, 0|00000000, R1.x.2 } live_after: [R0.x.5 R0.y.5 R0.z.4 R0.w.4 ] } end_depart } endif live_after: [R0.z R0.w R0.x.1 R0.y.1 ] SAMPLE R1.x.4, R1.y.4, R1.z.4, R1.w.9, R0.x.1, R0.y.1, undef, undef MOV R0.x.6, R1.y.4 MOV R0.y.6, R1.z.4 MOV R0.z.5, R1.w.9 MOV R0.w.5, R1.x.4 } end_depart { * phi R0.x.7, R0.x.5, R1.y.4 * phi R0.y.7, R0.y.5, R1.z.4 * phi R0.z.6, R0.z.4, R1.w.9 * phi R0.w.6, R0.w.4, R1.x.4 } live_after: [R0.x.7 R0.y.7 R0.z.6 R0.w.6 ] } end_depart { * phi R0.x.8, R1.w.4, R0.x.7 * phi R0.y.8, R1.z.1, R0.y.7 * phi R0.z.7, R1.y.1, R0.z.6 * phi R0.w.7, R1.x.1, R0.w.6 } live_after: [R0.x.8 R0.y.8 R0.z.7 R0.w.7 ] } end_depart } endif live_after: [R0.z R0.w R0.x.1 R0.y.1 ] SAMPLE R1.x.7, R1.y.7, R1.z.7, R1.w.12, R0.x.1, R0.y.1, undef, undef MOV R0.x.9, R1.w.12 MOV R0.y.9, R1.x.7 MOV R0.z.8, R1.y.7 MOV R0.w.8, R1.z.7 } end_depart { * phi R0.x.10, R0.x.8, R1.w.12 * phi R0.y.10, R0.y.8, R1.x.7 * phi R0.z.9, R0.z.7, R1.y.7 * phi R0.w.9, R0.w.7, R1.z.7 } live_after: [R0.x.10 R0.y.10 R0.z.9 R0.w.9 ] } end_depart } endif live_after: [R0.z R0.w R1.w.1 R0.x.1 R0.y.1 ] SAMPLE R2.x.1, R2.y.1, R2.z.1, R2.w.2, R0.x.1, R0.y.1, undef, undef SETNE_INT R0.w.10, C2.x, 0|00000000 SETNE_INT R1.w.14, C2.x, 4.2039e-45|00000003 AND_INT R1.w.15, R1.w.3, R1.w.6 CNDE_INT R0.x.11, R1.w.15, R2.x.1, R2.z.1 CNDE_INT R0.z.10, R1.w.15, R2.z.1, R2.x.1 MOV R0.y.11, R2.y.1 MOV R0.w.11, R2.w.2 } end_depart { * phi R0.x.12, R0.x.10, R0.x.11 * phi R0.y.12, R0.y.10, R2.y.1 * phi R0.z.11, R0.z.9, R0.z.10 * phi R0.w.12, R0.w.9, R2.w.2 } live_after: [R0.x.12 R0.y.12 R0.z.11 R0.w.12 ] EXPORT PIXEL 0 R0.x.12, R0.y.12, R0.z.11, R0.w.12 } ###### after dce_cleanup { preloaded inputs [R0.xF@R0.x, R0.yF@R0.y] live_before: [{R1.w.3} {R1.w.6} undef ] INTERP_XY R0.x.1, R0.y.1, __, __, R0.yF@R0.y, Param0x, R0.xF@R0.x, Param0y, R0.yF@R0.y, Param0z, R0.xF@R0.x, Param0w PRED_SETNE_INT __, __, EM.1, C1.x, 0|00000000 region #0 live_before: [R0.x.1 R0.y.1 EM.1 {R1.w.3} {R1.w.6} undef ] depart region #0 after { if EM.1 { depart region #0 after { PRED_SETNE_INT __, __, EM.2, C2.x, 1.4013e-45|00000001 region #1 live_before: [R0.x.1 R0.y.1 EM.2 undef ] depart region #1 after { if EM.2 { depart region #1 after { PRED_SETE_INT __, __, EM.3, C2.x, 0|00000000 region #2 live_before: [R0.x.1 R0.y.1 EM.3 undef ] depart region #2 after { if EM.3 { depart region #2 after { SAMPLE R1.x.1, R1.y.1, R1.z.1, R1.w.4, R0.x.1, R0.y.1, undef, undef } end_depart } endif live_after: [R0.x.1 R0.y.1 undef ] PRED_SETNE_INT __, __, EM.4, C2.x, 2.8026e-45|00000002 region #3 live_before: [R0.x.1 R0.y.1 EM.4 undef ] depart region #3 after { if EM.4 { depart region #3 after { PRED_SETNE_INT __, __, EM.5, C2.x, 4.2039e-45|00000003 region #4 live_before: [R0.x.1 R0.y.1 EM.5 undef ] depart region #4 after { if EM.5 { depart region #4 after { SETE_INT R0.x.3, C1.x, 0|00000000 } end_depart } endif live_after: [R0.x.1 R0.y.1 undef ] SAMPLE R1.x.2, R1.y.2, R1.z.2, R1.w.7, R0.x.1, R0.y.1, undef, undef } end_depart { * phi R0.x.5, R0.x.3, R1.w.7 * phi R0.y.5, 0|00000000, R1.z.2 * phi R0.z.4, 0|00000000, R1.y.2 * phi R0.w.4, 0|00000000, R1.x.2 } live_after: [R0.x.5 R0.y.5 R0.z.4 R0.w.4 ] } end_depart } endif live_after: [R0.x.1 R0.y.1 undef ] SAMPLE R1.x.4, R1.y.4, R1.z.4, R1.w.9, R0.x.1, R0.y.1, undef, undef } end_depart { * phi R0.x.7, R0.x.5, R1.y.4 * phi R0.y.7, R0.y.5, R1.z.4 * phi R0.z.6, R0.z.4, R1.w.9 * phi R0.w.6, R0.w.4, R1.x.4 } live_after: [R0.x.7 R0.y.7 R0.z.6 R0.w.6 ] } end_depart { * phi R0.x.8, R1.w.4, R0.x.7 * phi R0.y.8, R1.z.1, R0.y.7 * phi R0.z.7, R1.y.1, R0.z.6 * phi R0.w.7, R1.x.1, R0.w.6 } live_after: [R0.x.8 R0.y.8 R0.z.7 R0.w.7 ] } end_depart } endif live_after: [R0.x.1 R0.y.1 undef ] SAMPLE R1.x.7, R1.y.7, R1.z.7, R1.w.12, R0.x.1, R0.y.1, undef, undef } end_depart { * phi R0.x.10, R0.x.8, R1.w.12 * phi R0.y.10, R0.y.8, R1.x.7 * phi R0.z.9, R0.z.7, R1.y.7 * phi R0.w.9, R0.w.7, R1.z.7 } live_after: [R0.x.10 R0.y.10 R0.z.9 R0.w.9 ] } end_depart } endif live_after: [R0.x.1 R0.y.1 {R1.w.3} {R1.w.6} undef ] SAMPLE R2.x.1, R2.y.1, R2.z.1, R2.w.2, R0.x.1, R0.y.1, undef, undef AND_INT R1.w.15, {R1.w.3}, {R1.w.6} CNDE_INT R0.x.11, R1.w.15, R2.x.1, R2.z.1 CNDE_INT R0.z.10, R1.w.15, R2.z.1, R2.x.1 } end_depart { * phi R0.x.12, R0.x.10, R0.x.11 * phi R0.y.12, R0.y.10, R2.y.1 * phi R0.z.11, R0.z.9, R0.z.10 * phi R0.w.12, R0.w.9, R2.w.2 } live_after: [R0.x.12 R0.y.12 R0.z.11 R0.w.12 ] EXPORT PIXEL 0 R0.x.12, R0.y.12, R0.z.11, R0.w.12 } ##### gcm_sched_early_pass: unscheduled ops: AND_INT R1.w.15, {R1.w.3}, {R1.w.6}(EE) (EE) Backtrace: (EE) 0: /usr/bin/X (xorg_backtrace+0x36) [0x7f5a480c1676] (EE) 1: /usr/bin/X (0x7f5a47f11000+0x1b44b9) [0x7f5a480c54b9] (EE) 2: /lib/x86_64-linux-gnu/libpthread.so.0 (0x7f5a47014000+0xfbd0) [0x7f5a47023bd0] (EE) 3: /usr/local/lib/dri/r600_dri.so (_ZN7r600_sb3gcm15bu_find_best_bbEPNS_4nodeERNS0_7op_infoE+0x26) [0x7f5a41e099b6] (EE) 4: /usr/local/lib/dri/r600_dri.so (_ZN7r600_sb3gcm13bu_release_opEPNS_4nodeE+0x9f) [0x7f5a41e09e0f] (EE) 5: /usr/local/lib/dri/r600_dri.so (_ZN7r600_sb3gcm14bu_release_valEPNS_5valueE+0x18b) [0x7f5a41e0a9eb] (EE) 6: /usr/local/lib/dri/r600_dri.so (_ZN7r600_sb3gcm15bu_release_defsERSt6vectorIPNS_5valueESaIS3_EEb+0x38) [0x7f5a41e0aa28] (EE) 7: /usr/local/lib/dri/r600_dri.so (_ZN7r600_sb3gcm11bu_scheduleEPNS_14container_nodeEPNS_4nodeE+0x2a) [0x7f5a41e0aaea] (EE) 8: /usr/local/lib/dri/r600_dri.so (_ZN7r600_sb3gcm11bu_sched_bbEPNS_7bb_nodeE+0x30f) [0x7f5a41e0ae2f] (EE) 9: /usr/local/lib/dri/r600_dri.so (_ZN7r600_sb3gcm10sched_lateEPNS_14container_nodeE+0x5d) [0x7f5a41e0b2fd] (EE) 10: /usr/local/lib/dri/r600_dri.so (_ZN7r600_sb3gcm10sched_lateEPNS_14container_nodeE+0x3d) [0x7f5a41e0b2dd] (EE) 11: /usr/local/lib/dri/r600_dri.so (_ZN7r600_sb3gcm10sched_lateEPNS_14container_nodeE+0x3d) [0x7f5a41e0b2dd] (EE) 12: /usr/local/lib/dri/r600_dri.so (_ZN7r600_sb3gcm3runEv+0x11f) [0x7f5a41e0b54f] (EE) 13: /usr/local/lib/dri/r600_dri.so (r600_sb_bytecode_process+0x19a9) [0x7f5a41e020a9] (EE) 14: /usr/local/lib/dri/r600_dri.so (0x7f5a41a61000+0x37c8a0) [0x7f5a41ddd8a0] (EE) 15: /usr/local/lib/dri/r600_dri.so (0x7f5a41a61000+0x38d5c5) [0x7f5a41dee5c5] (EE) 16: /usr/local/lib/dri/r600_dri.so (0x7f5a41a61000+0x38d76e) [0x7f5a41dee76e] (EE) 17: /usr/local/lib/dri/r600_dri.so (0x7f5a41a61000+0x1b6b8e) [0x7f5a41c17b8e] (EE) 18: /usr/local/lib/dri/r600_dri.so (0x7f5a41a61000+0x1b769e) [0x7f5a41c1869e] (EE) 19: /usr/local/lib/dri/r600_dri.so (0x7f5a41a61000+0x185247) [0x7f5a41be6247] (EE) 20: /usr/local/lib/dri/r600_dri.so (0x7f5a41a61000+0x1820c7) [0x7f5a41be30c7] (EE) 21: /usr/local/lib/dri/r600_dri.so (0x7f5a41a61000+0x19597d) [0x7f5a41bf697d] (EE) 22: /usr/local/lib/dri/r600_dri.so (0x7f5a41a61000+0x16ea64) [0x7f5a41bcfa64] (EE) 23: /usr/lib/libglamor.so.0 (0x7f5a444ea000+0x4d54) [0x7f5a444eed54] (EE) 24: /usr/lib/libglamor.so.0 (0x7f5a444ea000+0x53ef) [0x7f5a444ef3ef] (EE) 25: /usr/lib/libglamor.so.0 (0x7f5a444ea000+0x65f6) [0x7f5a444f05f6] (EE) 26: /usr/lib/libglamor.so.0 (glamor_copy_n_to_n_nf+0x4a) [0x7f5a444f0bea] (EE) 27: /usr/lib/libglamor.so.0 (0x7f5a444ea000+0x9e13) [0x7f5a444f3e13] (EE) 28: /usr/lib/libglamor.so.0 (0x7f5a444ea000+0xae18) [0x7f5a444f4e18] (EE) 29: /usr/lib/libglamor.so.0 (0x7f5a444ea000+0xbd83) [0x7f5a444f5d83] (EE) 30: /usr/bin/X (0x7f5a47f11000+0x13a0d8) [0x7f5a4804b0d8] (EE) 31: /usr/bin/X (0x7f5a47f11000+0x1332e6) [0x7f5a480442e6] (EE) 32: /usr/bin/X (0x7f5a47f11000+0x58ac1) [0x7f5a47f69ac1] (EE) 33: /usr/bin/X (0x7f5a47f11000+0x4757a) [0x7f5a47f5857a] (EE) 34: /lib/x86_64-linux-gnu/libc.so.6 (__libc_start_main+0xf5) [0x7f5a45c60ea5] (EE) 35: /usr/bin/X (0x7f5a47f11000+0x478c1) [0x7f5a47f588c1] (EE) (EE) Segmentation fault at address 0xbc Fatal server error: Caught signal 11 (Segmentation fault). Server aborting (EE) Please consult the The X.Org Foundation support at http://wiki.x.org for help. (EE) Please also check the log file at "/var/log/Xorg.0.log" for additional information. (EE) Server terminated with error (1). Closing log file.