This is a pre-release version of the X server from The X.Org Foundation. It is not supported in any way. Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/. Select the "xorg" product for bugs you find in this release. Before reporting bugs in pre-release versions please check the latest version in the X.Org Foundation git repository. See http://wiki.x.org/wiki/GitPage for git access instructions. X Window System Version 1.2.99.903 (1.3.0 RC 3) Release Date: 26 March 2007 X Protocol Version 11, Revision 0, Release 1.2.99.903 Build Operating System: PLD/Linux PLD/Team Current Operating System: Linux warp 2.6.20.4-1 #1 SMP Fri Mar 23 21:38:33 UTC 2007 i686 Build Date: 27 March 2007 Before reporting problems, check http://wiki.x.org to make sure that you have the latest version. Module Loader present Markers: (--) probed, (**) from config file, (==) default setting, (++) from command line, (!!) notice, (II) informational, (WW) warning, (EE) error, (NI) not implemented, (??) unknown. (==) Log file: "/var/log/Xorg.0.log", Time: Tue Mar 27 19:55:06 2007 (==) Using config file: "/etc/X11/xorg.conf" (==) ServerLayout "X.org Configured" (**) |-->Screen "Screen0" (0) (**) | |-->Monitor "LCD" (**) | |-->Device "VGA" (**) |-->Input Device "Mouse0" (**) |-->Input Device "Keyboard0" (WW) `fonts.dir' not found (or not valid) in "/usr/share/fonts/100dpi/". Entry deleted from font path. (Run 'mkfontdir' on "/usr/share/fonts/100dpi/"). (**) FontPath set to: /usr/share/fonts/TTF/, /usr/share/fonts/Type1/, /usr/share/fonts/misc/ (**) RgbPath set to "/usr/share/X11/rgb" (==) ModulePath set to "/usr/lib/xorg/modules" (II) Open ACPI successful (/var/run/acpid.socket) (II) Loader magic: 0x81cf420 (II) Module ABI versions: X.Org ANSI C Emulation: 0.3 X.Org Video Driver: 1.2 X.Org XInput driver : 0.7 X.Org Server Extension : 0.3 X.Org Font Renderer : 0.5 (II) Loader running on linux (II) LoadModule: "pcidata" (II) Loading /usr/lib/xorg/modules//libpcidata.so (II) Module pcidata: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 1.0.0 ABI class: X.Org Video Driver, version 1.2 (++) using VT number 9 (II) PCI: PCI scan (all values are in hex) (II) PCI: 00:00:0: chip 8086,29a0 card 8086,514d rev 02 class 06,00,00 hdr 00 (II) PCI: 00:02:0: chip 8086,29a2 card 8086,514d rev 02 class 03,00,00 hdr 80 (II) PCI: 00:02:1: chip 8086,29a3 card 8086,514d rev 02 class 03,80,00 hdr 80 (II) PCI: 00:03:0: chip 8086,29a4 card 8086,514d rev 02 class 07,80,00 hdr 80 (II) PCI: 00:19:0: chip 8086,104b card 8086,0001 rev 02 class 02,00,00 hdr 00 (II) PCI: 00:1a:0: chip 8086,2834 card 8086,514d rev 02 class 0c,03,00 hdr 80 (II) PCI: 00:1a:1: chip 8086,2835 card 8086,514d rev 02 class 0c,03,00 hdr 00 (II) PCI: 00:1a:7: chip 8086,283a card 8086,514d rev 02 class 0c,03,20 hdr 00 (II) PCI: 00:1b:0: chip 8086,284b card 8086,2504 rev 02 class 04,03,00 hdr 00 (II) PCI: 00:1c:0: chip 8086,283f card 0000,0000 rev 02 class 06,04,00 hdr 81 (II) PCI: 00:1c:1: chip 8086,2841 card 0000,0000 rev 02 class 06,04,00 hdr 81 (II) PCI: 00:1c:2: chip 8086,2843 card 0000,0000 rev 02 class 06,04,00 hdr 81 (II) PCI: 00:1c:3: chip 8086,2845 card 0000,0000 rev 02 class 06,04,00 hdr 81 (II) PCI: 00:1c:4: chip 8086,2847 card 0000,0000 rev 02 class 06,04,00 hdr 81 (II) PCI: 00:1d:0: chip 8086,2830 card 8086,514d rev 02 class 0c,03,00 hdr 80 (II) PCI: 00:1d:1: chip 8086,2831 card 8086,514d rev 02 class 0c,03,00 hdr 00 (II) PCI: 00:1d:2: chip 8086,2832 card 8086,514d rev 02 class 0c,03,00 hdr 00 (II) PCI: 00:1d:7: chip 8086,2836 card 8086,514d rev 02 class 0c,03,20 hdr 00 (II) PCI: 00:1e:0: chip 8086,244e card 0000,0000 rev f2 class 06,04,01 hdr 01 (II) PCI: 00:1f:0: chip 8086,2812 card 8086,514d rev 02 class 06,01,00 hdr 80 (II) PCI: 00:1f:2: chip 8086,2822 card 8086,514d rev 02 class 01,04,00 hdr 00 (II) PCI: 00:1f:3: chip 8086,283e card 8086,514d rev 02 class 0c,05,00 hdr 00 (II) PCI: 02:00:0: chip 11ab,6101 card 11ab,6101 rev b1 class 01,01,8f hdr 00 (II) PCI: 06:00:0: chip 109e,036e card 0000,0000 rev 11 class 04,00,00 hdr 80 (II) PCI: 06:00:1: chip 109e,0878 card 0000,0000 rev 11 class 04,80,00 hdr 80 (II) PCI: 06:01:0: chip 104c,8400 card 1186,3b01 rev 00 class 02,80,00 hdr 00 (II) PCI: 06:02:0: chip 1102,0002 card 1102,8064 rev 08 class 04,01,00 hdr 80 (II) PCI: 06:02:1: chip 1102,7002 card 1102,0020 rev 08 class 09,80,00 hdr 80 (II) PCI: 06:03:0: chip 104c,8023 card 8086,514d rev 00 class 0c,00,10 hdr 00 (II) PCI: End of PCI scan (II) Intel Bridge workaround enabled (II) Host-to-PCI bridge: (II) Bus 0: bridge is at (0:0:0), (0,0,6), BCTRL: 0x0008 (VGA_EN is set) (II) Bus 0 I/O range: [0] -1 0 0x00000000 - 0x0000ffff (0x10000) IX[B] (II) Bus 0 non-prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[B] (II) Bus 0 prefetchable memory range: [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[B] (II) PCI-to-PCI bridge: (II) Bus 1: bridge is at (0:28:0), (0,1,1), BCTRL: 0x0004 (VGA_EN is cleared) (II) Bus 1 non-prefetchable memory range: [0] -1 0 0x50600000 - 0x506fffff (0x100000) MX[B] (II) PCI-to-PCI bridge: (II) Bus 2: bridge is at (0:28:1), (0,2,2), BCTRL: 0x0004 (VGA_EN is cleared) (II) Bus 2 I/O range: [0] -1 0 0x00002000 - 0x000020ff (0x100) IX[B] [1] -1 0 0x00002400 - 0x000024ff (0x100) IX[B] [2] -1 0 0x00002800 - 0x000028ff (0x100) IX[B] [3] -1 0 0x00002c00 - 0x00002cff (0x100) IX[B] (II) Bus 2 non-prefetchable memory range: [0] -1 0 0x50200000 - 0x502fffff (0x100000) MX[B] (II) PCI-to-PCI bridge: (II) Bus 3: bridge is at (0:28:2), (0,3,3), BCTRL: 0x0004 (VGA_EN is cleared) (II) Bus 3 non-prefetchable memory range: [0] -1 0 0x50700000 - 0x507fffff (0x100000) MX[B] (II) PCI-to-PCI bridge: (II) Bus 4: bridge is at (0:28:3), (0,4,4), BCTRL: 0x0004 (VGA_EN is cleared) (II) Bus 4 non-prefetchable memory range: [0] -1 0 0x50800000 - 0x508fffff (0x100000) MX[B] (II) PCI-to-PCI bridge: (II) Bus 5: bridge is at (0:28:4), (0,5,5), BCTRL: 0x0004 (VGA_EN is cleared) (II) Bus 5 non-prefetchable memory range: [0] -1 0 0x50900000 - 0x509fffff (0x100000) MX[B] (II) Subtractive PCI-to-PCI bridge: (II) Bus 6: bridge is at (0:30:0), (0,6,6), BCTRL: 0x0004 (VGA_EN is cleared) (II) Bus 6 I/O range: [0] -1 0 0x00001000 - 0x000010ff (0x100) IX[B] [1] -1 0 0x00001400 - 0x000014ff (0x100) IX[B] [2] -1 0 0x00001800 - 0x000018ff (0x100) IX[B] [3] -1 0 0x00001c00 - 0x00001cff (0x100) IX[B] (II) Bus 6 non-prefetchable memory range: [0] -1 0 0x50100000 - 0x501fffff (0x100000) MX[B] (II) Bus 6 prefetchable memory range: [0] -1 0 0x50000000 - 0x500fffff (0x100000) MX[B] (II) PCI-to-ISA bridge: (II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set) (--) PCI:*(0:2:0) Intel Corporation 82G965 Integrated Graphics Controller rev 2, Mem @ 0x50400000/20, 0x40000000/28, I/O @ 0x3110/3 (--) PCI: (0:2:1) Intel Corporation 82G965 Integrated Graphics Controller rev 2, Mem @ 0x50300000/20 (--) PCI: (6:0:0) Brooktree Corporation Bt878 Video Capture rev 17, Mem @ 0x50001000/12 (II) Addressable bus resource ranges are [0] -1 0 0x00000000 - 0xffffffff (0x0) MX[B] [1] -1 0 0x00000000 - 0x0000ffff (0x10000) IX[B] (II) OS-reported resource ranges: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [5] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] (II) Active PCI resource ranges: [0] -1 0 0x50110000 - 0x50113fff (0x4000) MX[B] [1] -1 0 0x50115000 - 0x501157ff (0x800) MX[B] [2] -1 0 0x50100000 - 0x5010ffff (0x10000) MX[B] [3] -1 0 0x50114000 - 0x50114fff (0x1000) MX[B] [4] -1 0 0x50000000 - 0x50000fff (0x1000) MX[B] [5] -1 0 0x50200000 - 0x502001ff (0x200) MX[B] [6] -1 0 0x50526000 - 0x505260ff (0x100) MX[B] [7] -1 0 0x50525000 - 0x505257ff (0x800) MX[B] [8] -1 0 0x50525800 - 0x50525bff (0x400) MX[B] [9] -1 0 0x50520000 - 0x50523fff (0x4000) MX[B] [10] -1 0 0x50525c00 - 0x50525fff (0x400) MX[B] [11] -1 0 0x50524000 - 0x50524fff (0x1000) MX[B] [12] -1 0 0x50500000 - 0x5051ffff (0x20000) MX[B] [13] -1 0 0x50526100 - 0x5052610f (0x10) MX[B] [14] -1 0 0x50001000 - 0x50001fff (0x1000) MX[B](B) [15] -1 0 0x50300000 - 0x503fffff (0x100000) MX[B](B) [16] -1 0 0x40000000 - 0x4fffffff (0x10000000) MX[B](B) [17] -1 0 0x50400000 - 0x504fffff (0x100000) MX[B](B) [18] -1 0 0x00001040 - 0x00001047 (0x8) IX[B] [19] -1 0 0x00001000 - 0x0000101f (0x20) IX[B] [20] -1 0 0x00001020 - 0x0000103f (0x20) IX[B] [21] -1 0 0x00002000 - 0x0000200f (0x10) IX[B] [22] -1 0 0x00002020 - 0x00002023 (0x4) IX[B] [23] -1 0 0x00002010 - 0x00002017 (0x8) IX[B] [24] -1 0 0x00002024 - 0x00002027 (0x4) IX[B] [25] -1 0 0x00002018 - 0x0000201f (0x8) IX[B] [26] -1 0 0x00003000 - 0x0000301f (0x20) IX[B] [27] -1 0 0x00003020 - 0x0000303f (0x20) IX[B] [28] -1 0 0x00003118 - 0x0000311b (0x4) IX[B] [29] -1 0 0x00003100 - 0x00003107 (0x8) IX[B] [30] -1 0 0x0000311c - 0x0000311f (0x4) IX[B] [31] -1 0 0x00003108 - 0x0000310f (0x8) IX[B] [32] -1 0 0x00003040 - 0x0000305f (0x20) IX[B] [33] -1 0 0x00003060 - 0x0000307f (0x20) IX[B] [34] -1 0 0x00003080 - 0x0000309f (0x20) IX[B] [35] -1 0 0x000030a0 - 0x000030bf (0x20) IX[B] [36] -1 0 0x000030c0 - 0x000030df (0x20) IX[B] [37] -1 0 0x000030e0 - 0x000030ff (0x20) IX[B] [38] -1 0 0x00003110 - 0x00003117 (0x8) IX[B](B) (II) Active PCI resource ranges after removing overlaps: [0] -1 0 0x50110000 - 0x50113fff (0x4000) MX[B] [1] -1 0 0x50115000 - 0x501157ff (0x800) MX[B] [2] -1 0 0x50100000 - 0x5010ffff (0x10000) MX[B] [3] -1 0 0x50114000 - 0x50114fff (0x1000) MX[B] [4] -1 0 0x50000000 - 0x50000fff (0x1000) MX[B] [5] -1 0 0x50200000 - 0x502001ff (0x200) MX[B] [6] -1 0 0x50526000 - 0x505260ff (0x100) MX[B] [7] -1 0 0x50525000 - 0x505257ff (0x800) MX[B] [8] -1 0 0x50525800 - 0x50525bff (0x400) MX[B] [9] -1 0 0x50520000 - 0x50523fff (0x4000) MX[B] [10] -1 0 0x50525c00 - 0x50525fff (0x400) MX[B] [11] -1 0 0x50524000 - 0x50524fff (0x1000) MX[B] [12] -1 0 0x50500000 - 0x5051ffff (0x20000) MX[B] [13] -1 0 0x50526100 - 0x5052610f (0x10) MX[B] [14] -1 0 0x50001000 - 0x50001fff (0x1000) MX[B](B) [15] -1 0 0x50300000 - 0x503fffff (0x100000) MX[B](B) [16] -1 0 0x40000000 - 0x4fffffff (0x10000000) MX[B](B) [17] -1 0 0x50400000 - 0x504fffff (0x100000) MX[B](B) [18] -1 0 0x00001040 - 0x00001047 (0x8) IX[B] [19] -1 0 0x00001000 - 0x0000101f (0x20) IX[B] [20] -1 0 0x00001020 - 0x0000103f (0x20) IX[B] [21] -1 0 0x00002000 - 0x0000200f (0x10) IX[B] [22] -1 0 0x00002020 - 0x00002023 (0x4) IX[B] [23] -1 0 0x00002010 - 0x00002017 (0x8) IX[B] [24] -1 0 0x00002024 - 0x00002027 (0x4) IX[B] [25] -1 0 0x00002018 - 0x0000201f (0x8) IX[B] [26] -1 0 0x00003000 - 0x0000301f (0x20) IX[B] [27] -1 0 0x00003020 - 0x0000303f (0x20) IX[B] [28] -1 0 0x00003118 - 0x0000311b (0x4) IX[B] [29] -1 0 0x00003100 - 0x00003107 (0x8) IX[B] [30] -1 0 0x0000311c - 0x0000311f (0x4) IX[B] [31] -1 0 0x00003108 - 0x0000310f (0x8) IX[B] [32] -1 0 0x00003040 - 0x0000305f (0x20) IX[B] [33] -1 0 0x00003060 - 0x0000307f (0x20) IX[B] [34] -1 0 0x00003080 - 0x0000309f (0x20) IX[B] [35] -1 0 0x000030a0 - 0x000030bf (0x20) IX[B] [36] -1 0 0x000030c0 - 0x000030df (0x20) IX[B] [37] -1 0 0x000030e0 - 0x000030ff (0x20) IX[B] [38] -1 0 0x00003110 - 0x00003117 (0x8) IX[B](B) (II) OS-reported resource ranges after removing overlaps with PCI: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [5] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] (II) All system resource ranges: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x50110000 - 0x50113fff (0x4000) MX[B] [5] -1 0 0x50115000 - 0x501157ff (0x800) MX[B] [6] -1 0 0x50100000 - 0x5010ffff (0x10000) MX[B] [7] -1 0 0x50114000 - 0x50114fff (0x1000) MX[B] [8] -1 0 0x50000000 - 0x50000fff (0x1000) MX[B] [9] -1 0 0x50200000 - 0x502001ff (0x200) MX[B] [10] -1 0 0x50526000 - 0x505260ff (0x100) MX[B] [11] -1 0 0x50525000 - 0x505257ff (0x800) MX[B] [12] -1 0 0x50525800 - 0x50525bff (0x400) MX[B] [13] -1 0 0x50520000 - 0x50523fff (0x4000) MX[B] [14] -1 0 0x50525c00 - 0x50525fff (0x400) MX[B] [15] -1 0 0x50524000 - 0x50524fff (0x1000) MX[B] [16] -1 0 0x50500000 - 0x5051ffff (0x20000) MX[B] [17] -1 0 0x50526100 - 0x5052610f (0x10) MX[B] [18] -1 0 0x50001000 - 0x50001fff (0x1000) MX[B](B) [19] -1 0 0x50300000 - 0x503fffff (0x100000) MX[B](B) [20] -1 0 0x40000000 - 0x4fffffff (0x10000000) MX[B](B) [21] -1 0 0x50400000 - 0x504fffff (0x100000) MX[B](B) [22] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [23] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] [24] -1 0 0x00001040 - 0x00001047 (0x8) IX[B] [25] -1 0 0x00001000 - 0x0000101f (0x20) IX[B] [26] -1 0 0x00001020 - 0x0000103f (0x20) IX[B] [27] -1 0 0x00002000 - 0x0000200f (0x10) IX[B] [28] -1 0 0x00002020 - 0x00002023 (0x4) IX[B] [29] -1 0 0x00002010 - 0x00002017 (0x8) IX[B] [30] -1 0 0x00002024 - 0x00002027 (0x4) IX[B] [31] -1 0 0x00002018 - 0x0000201f (0x8) IX[B] [32] -1 0 0x00003000 - 0x0000301f (0x20) IX[B] [33] -1 0 0x00003020 - 0x0000303f (0x20) IX[B] [34] -1 0 0x00003118 - 0x0000311b (0x4) IX[B] [35] -1 0 0x00003100 - 0x00003107 (0x8) IX[B] [36] -1 0 0x0000311c - 0x0000311f (0x4) IX[B] [37] -1 0 0x00003108 - 0x0000310f (0x8) IX[B] [38] -1 0 0x00003040 - 0x0000305f (0x20) IX[B] [39] -1 0 0x00003060 - 0x0000307f (0x20) IX[B] [40] -1 0 0x00003080 - 0x0000309f (0x20) IX[B] [41] -1 0 0x000030a0 - 0x000030bf (0x20) IX[B] [42] -1 0 0x000030c0 - 0x000030df (0x20) IX[B] [43] -1 0 0x000030e0 - 0x000030ff (0x20) IX[B] [44] -1 0 0x00003110 - 0x00003117 (0x8) IX[B](B) (II) LoadModule: "dbe" (II) Loading /usr/lib/xorg/modules/extensions//libdbe.so (II) Module dbe: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 0.3 (II) Loading extension DOUBLE-BUFFER (II) LoadModule: "extmod" (II) Loading /usr/lib/xorg/modules/extensions//libextmod.so (II) Module extmod: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 0.3 (II) Loading extension SHAPE (II) Loading extension MIT-SUNDRY-NONSTANDARD (II) Loading extension BIG-REQUESTS (II) Loading extension SYNC (II) Loading extension MIT-SCREEN-SAVER (II) Loading extension XC-MISC (II) Loading extension XFree86-VidModeExtension (II) Loading extension XFree86-Misc (II) Loading extension XFree86-DGA (II) Loading extension DPMS (II) Loading extension TOG-CUP (II) Loading extension Extended-Visual-Information (II) Loading extension XVideo (II) Loading extension XVideo-MotionCompensation (II) Loading extension X-Resource (II) LoadModule: "record" (II) Loading /usr/lib/xorg/modules/extensions//librecord.so (II) Module record: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 1.13.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 0.3 (II) Loading extension RECORD (II) LoadModule: "xtrap" (II) Loading /usr/lib/xorg/modules/extensions//libxtrap.so (II) Module xtrap: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 1.0.0 Module class: X.Org Server Extension ABI class: X.Org Server Extension, version 0.3 (II) Loading extension DEC-XTRAP (II) LoadModule: "glx" (II) Loading /usr/lib/xorg/modules/extensions//libglx.so (II) Module glx: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 1.0.0 ABI class: X.Org Server Extension, version 0.3 (==) AIGLX enabled (II) Loading extension GLX (II) LoadModule: "dri" (II) Loading /usr/lib/xorg/modules/extensions//libdri.so (II) Module dri: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 1.0.0 ABI class: X.Org Server Extension, version 0.3 (II) Loading extension XFree86-DRI (II) LoadModule: "freetype" (II) Loading /usr/lib/xorg/modules/fonts//libfreetype.so (II) Module freetype: vendor="X.Org Foundation & the After X-TT Project" compiled for 1.2.99.903, module version = 2.1.0 Module class: X.Org Font Renderer ABI class: X.Org Font Renderer, version 0.5 (II) Loading font FreeType (II) LoadModule: "type1" (II) Loading /usr/lib/xorg/modules/fonts//libtype1.so (II) Module type1: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 1.0.2 Module class: X.Org Font Renderer ABI class: X.Org Font Renderer, version 0.5 (II) Loading font Type1 (II) LoadModule: "i810" (II) Loading /usr/lib/xorg/modules/drivers//i810_drv.so (II) Module i810: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 13.93.93 Module class: X.Org Video Driver ABI class: X.Org Video Driver, version 1.2 (II) LoadModule: "mouse" (II) Loading /usr/lib/xorg/modules/input//mouse_drv.so (II) Module mouse: vendor="X.Org Foundation" compiled for 7.2.0, module version = 1.1.1 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 0.7 (II) LoadModule: "kbd" (II) Loading /usr/lib/xorg/modules/input//kbd_drv.so (II) Module kbd: vendor="X.Org Foundation" compiled for 7.1.99.2, module version = 1.1.0 Module class: X.Org XInput Driver ABI class: X.Org XInput driver, version 0.6 (II) intel: Driver for Intel Integrated Graphics Chipsets: i810, i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G, E7221 (i915), 915GM, 945G, 945GM, 965G, 965G, 965Q, 946GZ (II) Primary Device is: PCI 00:02:0 (--) Assigning device section with no busID to primary device (WW) intel: No matching Device section for instance (BusID PCI:0:2:1) found (--) Chipset 965G found (II) resource ranges after xf86ClaimFixedResources() call: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x50110000 - 0x50113fff (0x4000) MX[B] [5] -1 0 0x50115000 - 0x501157ff (0x800) MX[B] [6] -1 0 0x50100000 - 0x5010ffff (0x10000) MX[B] [7] -1 0 0x50114000 - 0x50114fff (0x1000) MX[B] [8] -1 0 0x50000000 - 0x50000fff (0x1000) MX[B] [9] -1 0 0x50200000 - 0x502001ff (0x200) MX[B] [10] -1 0 0x50526000 - 0x505260ff (0x100) MX[B] [11] -1 0 0x50525000 - 0x505257ff (0x800) MX[B] [12] -1 0 0x50525800 - 0x50525bff (0x400) MX[B] [13] -1 0 0x50520000 - 0x50523fff (0x4000) MX[B] [14] -1 0 0x50525c00 - 0x50525fff (0x400) MX[B] [15] -1 0 0x50524000 - 0x50524fff (0x1000) MX[B] [16] -1 0 0x50500000 - 0x5051ffff (0x20000) MX[B] [17] -1 0 0x50526100 - 0x5052610f (0x10) MX[B] [18] -1 0 0x50001000 - 0x50001fff (0x1000) MX[B](B) [19] -1 0 0x50300000 - 0x503fffff (0x100000) MX[B](B) [20] -1 0 0x40000000 - 0x4fffffff (0x10000000) MX[B](B) [21] -1 0 0x50400000 - 0x504fffff (0x100000) MX[B](B) [22] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [23] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] [24] -1 0 0x00001040 - 0x00001047 (0x8) IX[B] [25] -1 0 0x00001000 - 0x0000101f (0x20) IX[B] [26] -1 0 0x00001020 - 0x0000103f (0x20) IX[B] [27] -1 0 0x00002000 - 0x0000200f (0x10) IX[B] [28] -1 0 0x00002020 - 0x00002023 (0x4) IX[B] [29] -1 0 0x00002010 - 0x00002017 (0x8) IX[B] [30] -1 0 0x00002024 - 0x00002027 (0x4) IX[B] [31] -1 0 0x00002018 - 0x0000201f (0x8) IX[B] [32] -1 0 0x00003000 - 0x0000301f (0x20) IX[B] [33] -1 0 0x00003020 - 0x0000303f (0x20) IX[B] [34] -1 0 0x00003118 - 0x0000311b (0x4) IX[B] [35] -1 0 0x00003100 - 0x00003107 (0x8) IX[B] [36] -1 0 0x0000311c - 0x0000311f (0x4) IX[B] [37] -1 0 0x00003108 - 0x0000310f (0x8) IX[B] [38] -1 0 0x00003040 - 0x0000305f (0x20) IX[B] [39] -1 0 0x00003060 - 0x0000307f (0x20) IX[B] [40] -1 0 0x00003080 - 0x0000309f (0x20) IX[B] [41] -1 0 0x000030a0 - 0x000030bf (0x20) IX[B] [42] -1 0 0x000030c0 - 0x000030df (0x20) IX[B] [43] -1 0 0x000030e0 - 0x000030ff (0x20) IX[B] [44] -1 0 0x00003110 - 0x00003117 (0x8) IX[B](B) (II) resource ranges after probing: [0] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [1] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [2] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [3] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [4] -1 0 0x50110000 - 0x50113fff (0x4000) MX[B] [5] -1 0 0x50115000 - 0x501157ff (0x800) MX[B] [6] -1 0 0x50100000 - 0x5010ffff (0x10000) MX[B] [7] -1 0 0x50114000 - 0x50114fff (0x1000) MX[B] [8] -1 0 0x50000000 - 0x50000fff (0x1000) MX[B] [9] -1 0 0x50200000 - 0x502001ff (0x200) MX[B] [10] -1 0 0x50526000 - 0x505260ff (0x100) MX[B] [11] -1 0 0x50525000 - 0x505257ff (0x800) MX[B] [12] -1 0 0x50525800 - 0x50525bff (0x400) MX[B] [13] -1 0 0x50520000 - 0x50523fff (0x4000) MX[B] [14] -1 0 0x50525c00 - 0x50525fff (0x400) MX[B] [15] -1 0 0x50524000 - 0x50524fff (0x1000) MX[B] [16] -1 0 0x50500000 - 0x5051ffff (0x20000) MX[B] [17] -1 0 0x50526100 - 0x5052610f (0x10) MX[B] [18] -1 0 0x50001000 - 0x50001fff (0x1000) MX[B](B) [19] -1 0 0x50300000 - 0x503fffff (0x100000) MX[B](B) [20] -1 0 0x40000000 - 0x4fffffff (0x10000000) MX[B](B) [21] -1 0 0x50400000 - 0x504fffff (0x100000) MX[B](B) [22] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B] [23] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B] [24] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B] [25] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [26] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] [27] -1 0 0x00001040 - 0x00001047 (0x8) IX[B] [28] -1 0 0x00001000 - 0x0000101f (0x20) IX[B] [29] -1 0 0x00001020 - 0x0000103f (0x20) IX[B] [30] -1 0 0x00002000 - 0x0000200f (0x10) IX[B] [31] -1 0 0x00002020 - 0x00002023 (0x4) IX[B] [32] -1 0 0x00002010 - 0x00002017 (0x8) IX[B] [33] -1 0 0x00002024 - 0x00002027 (0x4) IX[B] [34] -1 0 0x00002018 - 0x0000201f (0x8) IX[B] [35] -1 0 0x00003000 - 0x0000301f (0x20) IX[B] [36] -1 0 0x00003020 - 0x0000303f (0x20) IX[B] [37] -1 0 0x00003118 - 0x0000311b (0x4) IX[B] [38] -1 0 0x00003100 - 0x00003107 (0x8) IX[B] [39] -1 0 0x0000311c - 0x0000311f (0x4) IX[B] [40] -1 0 0x00003108 - 0x0000310f (0x8) IX[B] [41] -1 0 0x00003040 - 0x0000305f (0x20) IX[B] [42] -1 0 0x00003060 - 0x0000307f (0x20) IX[B] [43] -1 0 0x00003080 - 0x0000309f (0x20) IX[B] [44] -1 0 0x000030a0 - 0x000030bf (0x20) IX[B] [45] -1 0 0x000030c0 - 0x000030df (0x20) IX[B] [46] -1 0 0x000030e0 - 0x000030ff (0x20) IX[B] [47] -1 0 0x00003110 - 0x00003117 (0x8) IX[B](B) [48] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B] [49] 0 0 0x000003c0 - 0x000003df (0x20) IS[B] (II) Setting vga for screen 0. (II) Loading sub module "int10" (II) LoadModule: "int10" (II) Loading /usr/lib/xorg/modules//libint10.so (II) Module int10: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 1.0.0 ABI class: X.Org Video Driver, version 1.2 (II) Loading sub module "vbe" (II) LoadModule: "vbe" (II) Loading /usr/lib/xorg/modules//libvbe.so (II) Module vbe: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 1.1.0 ABI class: X.Org Video Driver, version 1.2 (II) Loading sub module "vgahw" (II) LoadModule: "vgahw" (II) Loading /usr/lib/xorg/modules//libvgahw.so (II) Module vgahw: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 0.1.0 ABI class: X.Org Video Driver, version 1.2 (**) intel(0): Depth 24, (--) framebuffer bpp 32 (==) intel(0): RGB weight 888 (==) intel(0): Default visual is TrueColor (II) intel(0): Integrated Graphics Chipset: Intel(R) 965G (--) intel(0): Chipset: "965G" (--) intel(0): Linear framebuffer at 0x40000000 (--) intel(0): IO registers at addr 0x50400000 (II) intel(0): Hardware state on X startup: (II) intel(0): DumpRegsBegin (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) (II) intel(0): DPLL_TEST: 0x00010001 () (II) intel(0): D_STATE: 0x00000000 (II) intel(0): DSPCLK_GATE_D: 0x00040000 (II) intel(0): RENCLK_GATE_D1: 0x70000000 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x0008001c (disabled, pipe A, stall disabled, detected) (II) intel(0): SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x00001d9c (II) intel(0): DSPFW1: 0x1f8f0f0f (II) intel(0): DSPFW2: 0x00000f0f (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x80008018 (enabled, pipe A, +hsync, +vsync) (II) intel(0): LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (II) intel(0): DVOB: 0x0008001c (II) intel(0): DVOC: 0x00080018 (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000000 (power target: off) (II) intel(0): PP_STATUS: 0x00000000 (off, not ready, sequencing idle) (II) intel(0): PFIT_CONTROL: 0x00000000 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000020 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000000 (II) intel(0): DSPACNTR: 0x18000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000c80 (3200 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0xc0000000 (enabled, active) (II) intel(0): PIPEASRC: 0x031f0257 (800, 600) (II) intel(0): FPA0: 0x00011008 (n = 1, m1 = 16, m2 = 8) (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_A: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) (II) intel(0): DPLL_A_MD: 0x00000003 (II) intel(0): HTOTAL_A: 0x041f031f (800 active, 1056 total) (II) intel(0): HBLANK_A: 0x041f031f (800 start, 1056 end) (II) intel(0): HSYNC_A: 0x03c70347 (840 start, 968 end) (II) intel(0): VTOTAL_A: 0x02730257 (600 active, 628 total) (II) intel(0): VBLANK_A: 0x02730257 (600 start, 628 end) (II) intel(0): VSYNC_A: 0x025c0258 (601 start, 605 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0x01000000 (disabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) (II) intel(0): DSPBBASE: 0x00000000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0xc0000000 (enabled, active) (II) intel(0): PIPEBSRC: 0x027f01df (640, 480) (II) intel(0): FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_B: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) (II) intel(0): DPLL_B_MD: 0x00000303 (II) intel(0): HTOTAL_B: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_B: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_B: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_B: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_B: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_B: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x00020002 (II) intel(0): VGACNTRL: 0x0000008e (enabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): SR00: 0x03 (II) intel(0): SR01: 0x00 (II) intel(0): SR02: 0x03 (II) intel(0): SR03: 0x04 (II) intel(0): SR04: 0x02 (II) intel(0): SR05: 0x00 (II) intel(0): SR06: 0x00 (II) intel(0): SR07: 0x00 (II) intel(0): MSR: 0x67 (II) intel(0): CR00: 0x5f (II) intel(0): CR01: 0x4f (II) intel(0): CR02: 0x50 (II) intel(0): CR03: 0x82 (II) intel(0): CR04: 0x55 (II) intel(0): CR05: 0x81 (II) intel(0): CR06: 0xbf (II) intel(0): CR07: 0x1f (II) intel(0): CR08: 0x00 (II) intel(0): CR09: 0x4d (II) intel(0): CR0a: 0x1f (II) intel(0): CR0b: 0x1e (II) intel(0): CR0c: 0x00 (II) intel(0): CR0d: 0x00 (II) intel(0): CR0e: 0x00 (II) intel(0): CR0f: 0x00 (II) intel(0): CR10: 0x9c (II) intel(0): CR11: 0x8e (II) intel(0): CR12: 0x87 (II) intel(0): CR13: 0x28 (II) intel(0): CR14: 0x1f (II) intel(0): CR15: 0x96 (II) intel(0): CR16: 0xb9 (II) intel(0): CR17: 0xa3 (II) intel(0): CR18: 0xff (II) intel(0): CR19: 0x00 (II) intel(0): CR1a: 0x00 (II) intel(0): CR1b: 0x00 (II) intel(0): CR1c: 0x00 (II) intel(0): CR1d: 0x00 (II) intel(0): CR1e: 0x00 (II) intel(0): CR1f: 0x00 (II) intel(0): CR20: 0x00 (II) intel(0): CR21: 0x00 (II) intel(0): CR22: 0x20 (II) intel(0): CR23: 0x00 (II) intel(0): CR24: 0x00 (II) intel(0): pipe A dot 40000 n 1 m1 16 m2 8 p1 8 p2 10 (II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10 (II) intel(0): DumpRegsEnd (II) intel(0): 2 display pipes available. (==) intel(0): Using XAA for acceleration (--) intel(0): Will try to allocate texture pool for old Mesa 3D driver. (II) intel(0): Will try to reserve 32768 kiB of AGP aperture space for the DRM memory manager. (II) Loading sub module "ddc" (II) LoadModule: "ddc"(II) Module alread ybuilt-in(II) Loading sub module "i2c" (II) LoadModule: "i2c"(II) Module alread ybuilt-in(**) intel(0): Option "PreferredMode" "1280x1024" (II) intel(0): I2C bus "CRTDDC_A" initialized. (II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized. (II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70. (II) intel(0): I2C bus "SDVOB DDC Bus" initialized. (II) intel(0): SDVO: W: 02 (SDVO_CMD_GET_DEVICE_CAPS) (II) intel(0): SDVO: R: 02 47 01 01 01 01 01 00 (Success) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 1D (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE) (II) intel(0): SDVO: R: C4 09 74 40 (Success) (II) intel(0): SDVO device VID/DID: 02:47.01, clock range 25.0MHz - 165.0MHz, input 1: Y, input 2: N, output 1: Y, output 2: N (II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized. (II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x72. (II) intel(0): I2C bus "SDVOC DDC Bus" initialized. (II) intel(0): SDVO: W: 02 (SDVO_CMD_GET_DEVICE_CAPS) (II) intel(0): SDVO: R: 02 C2 02 01 01 3D 3E 00 (Success) (EE) intel(0): SDVO: No active TMDS outputs (0x3e00) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 1D (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE) (II) intel(0): SDVO: R: C4 09 80 3E (Success) (II) intel(0): SDVO device VID/DID: 02:C2.02, clock range 25.0MHz - 160.0MHz, input 1: Y, input 2: N, output 1: N, output 2: N (II) intel(0): SDVO: W: 20 (SDVO_CMD_GET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: 01 (Success) (II) intel(0): Current clock rate multiplier: 1 (II) intel(0): SDVO: W: 04 (SDVO_CMD_GET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: 00 00 (Success) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 12 (SDVO_CMD_GET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 64 19 00 40 41 00 26 30 (Success) (II) intel(0): SDVO: W: 13 (SDVO_CMD_GET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 18 88 36 00 18 00 00 00 (Success) (II) intel(0): SDVO: W: 11 01 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 64 19 00 40 41 00 26 30 (Success) (II) intel(0): SDVO: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 18 88 36 00 18 00 00 00 (Success) (II) intel(0): SDVO: W: 20 (SDVO_CMD_GET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: 01 (Success) (II) intel(0): Current clock rate multiplier: 1 (II) intel(0): SDVO: W: 04 (SDVO_CMD_GET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: 00 00 (Success) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 12 (SDVO_CMD_GET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success) (II) intel(0): SDVO: W: 13 (SDVO_CMD_GET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 00 00 00 00 16 20 00 00 (Success) (II) intel(0): SDVO: W: 11 02 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success) (II) intel(0): SDVO: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success) (II) intel(0): SDVO: W: 11 04 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success) (II) intel(0): SDVO: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success) (II) intel(0): SDVO: W: 11 08 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success) (II) intel(0): SDVO: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success) (II) intel(0): SDVO: W: 11 10 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success) (II) intel(0): SDVO: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success) (II) intel(0): SDVO: W: 11 20 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success) (II) intel(0): SDVO: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success) (II) intel(0): I2C device "CRTDDC_A:ddc2" registered at address 0xA0. (II) intel(0): I2C device "CRTDDC_A:ddc2" removed. (II) intel(0): EDID for output VGA (II) intel(0): Not using default mode "640x350" (vrefresh out of range) (II) intel(0): Not using default mode "640x400" (vrefresh out of range) (II) intel(0): Not using default mode "720x400" (vrefresh out of range) (II) intel(0): Not using default mode "640x480" (vrefresh out of range) (II) intel(0): Not using default mode "800x600" (vrefresh out of range) (II) intel(0): Not using default mode "1024x768" (vrefresh out of range) (II) intel(0): Not using default mode "1024x768" (vrefresh out of range) (II) intel(0): Not using default mode "1280x960" (vrefresh out of range) (II) intel(0): Not using default mode "1280x1024" (vrefresh out of range) (II) intel(0): Not using default mode "1280x1024" (vrefresh out of range) (II) intel(0): Not using default mode "1600x1200" (hsync out of range) (II) intel(0): Not using default mode "1600x1200" (hsync out of range) (II) intel(0): Not using default mode "1600x1200" (hsync out of range) (II) intel(0): Not using default mode "1600x1200" (vrefresh out of range) (II) intel(0): Not using default mode "1792x1344" (hsync out of range) (II) intel(0): Not using default mode "1792x1344" (hsync out of range) (II) intel(0): Not using default mode "1856x1392" (hsync out of range) (II) intel(0): Not using default mode "1856x1392" (hsync out of range) (II) intel(0): Not using default mode "1920x1440" (hsync out of range) (II) intel(0): Not using default mode "1920x1440" (hsync out of range) (II) intel(0): Not using default mode "1152x768" (vrefresh out of range) (II) intel(0): Not using default mode "1400x1050" (hsync out of range) (II) intel(0): Not using default mode "1920x1440" (vrefresh out of range) (II) intel(0): Not using default mode "2048x1536" (hsync out of range) (II) intel(0): Not using default mode "2048x1536" (vrefresh out of range) (II) intel(0): Not using default mode "2048x1536" (vrefresh out of range) (II) intel(0): Printing probed modes for output VGA (II) intel(0): Modeline "1280x1024"x60.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz) (II) intel(0): Modeline "1600x1200"x60.0 162.00 1600 1664 1856 2160 1200 1201 1204 1250 +hsync +vsync (75.0 kHz) (II) intel(0): Modeline "1600x1024"x60.0 106.91 1600 1620 1640 1670 1024 1027 1030 1067 -hsync -vsync (64.0 kHz) (II) intel(0): Modeline "1400x1050"x60.0 122.00 1400 1488 1640 1880 1050 1052 1064 1082 +hsync +vsync (64.9 kHz) (II) intel(0): Modeline "1280x960"x60.0 108.00 1280 1376 1488 1800 960 961 964 1000 +hsync +vsync (60.0 kHz) (II) intel(0): Modeline "1152x864"x75.0 108.00 1152 1216 1344 1600 864 865 868 900 +hsync +vsync (67.5 kHz) (II) intel(0): Modeline "1024x768"x70.1 75.00 1024 1048 1184 1328 768 771 777 806 -hsync -vsync (56.5 kHz) (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) (II) intel(0): Modeline "832x624"x74.6 57.28 832 864 928 1152 624 625 628 667 -hsync -vsync (49.7 kHz) (II) intel(0): Modeline "800x600"x72.2 50.00 800 856 976 1040 600 637 643 666 +hsync +vsync (48.1 kHz) (II) intel(0): Modeline "800x600"x75.0 49.50 800 816 896 1056 600 601 604 625 +hsync +vsync (46.9 kHz) (II) intel(0): Modeline "800x600"x60.3 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz) (II) intel(0): Modeline "800x600"x56.2 36.00 800 824 896 1024 600 601 603 625 +hsync +vsync (35.2 kHz) (II) intel(0): Modeline "640x480"x72.8 31.50 640 664 704 832 480 489 492 520 -hsync -vsync (37.9 kHz) (II) intel(0): Modeline "640x480"x75.0 31.50 640 656 720 840 480 481 484 500 -hsync -vsync (37.5 kHz) (II) intel(0): Modeline "640x480"x59.9 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz) (II) intel(0): SDVO: W: 0B (SDVO_CMD_GET_ATTACHED_DISPLAYS) (II) intel(0): SDVO: R: 01 00 (Success) (II) intel(0): I2C device "SDVOB DDC Bus:ddc2" registered at address 0xA0. (II) intel(0): SDVO: W: 7A 02 (SDVO_CMD_SET_CONTROL_BUS_SWITCH) (II) intel(0): SDVO: W: 7A 02 (SDVO_CMD_SET_CONTROL_BUS_SWITCH) (II) intel(0): SDVO: W: 7A 02 (SDVO_CMD_SET_CONTROL_BUS_SWITCH) (II) intel(0): SDVO: W: 7A 02 (SDVO_CMD_SET_CONTROL_BUS_SWITCH) (II) intel(0): I2C device "SDVOB DDC Bus:ddc2" removed. (II) intel(0): EDID for output TMDS-1 (II) intel(0): Not using default mode "640x350" (vrefresh out of range) (II) intel(0): Not using default mode "640x400" (vrefresh out of range) (II) intel(0): Not using default mode "720x400" (vrefresh out of range) (II) intel(0): Not using default mode "640x480" (vrefresh out of range) (II) intel(0): Not using default mode "640x480" (vrefresh out of range) (II) intel(0): Not using default mode "640x480" (vrefresh out of range) (II) intel(0): Not using default mode "800x600" (vrefresh out of range) (II) intel(0): Not using default mode "800x600" (vrefresh out of range) (II) intel(0): Not using default mode "800x600" (vrefresh out of range) (II) intel(0): Not using default mode "800x600" (vrefresh out of range) (II) intel(0): Not using default mode "1024x768" (vrefresh out of range) (II) intel(0): Not using default mode "1024x768" (vrefresh out of range) (II) intel(0): Not using default mode "1024x768" (vrefresh out of range) (II) intel(0): Not using default mode "1152x864" (vrefresh out of range) (II) intel(0): Not using default mode "1280x960" (hsync out of range) (II) intel(0): Not using default mode "1280x960" (vrefresh out of range) (II) intel(0): Not using default mode "1280x1024" (hsync out of range) (II) intel(0): Not using default mode "1280x1024" (vrefresh out of range) (II) intel(0): Not using default mode "1280x1024" (vrefresh out of range) (II) intel(0): Not using default mode "1600x1200" (hsync out of range) (II) intel(0): Not using default mode "1600x1200" (vrefresh out of range) (II) intel(0): Not using default mode "1600x1200" (vrefresh out of range) (II) intel(0): Not using default mode "1600x1200" (vrefresh out of range) (II) intel(0): Not using default mode "1600x1200" (vrefresh out of range) (II) intel(0): Not using default mode "1792x1344" (hsync out of range) (II) intel(0): Not using default mode "1792x1344" (vrefresh out of range) (II) intel(0): Not using default mode "1856x1392" (hsync out of range) (II) intel(0): Not using default mode "1856x1392" (vrefresh out of range) (II) intel(0): Not using default mode "1920x1440" (hsync out of range) (II) intel(0): Not using default mode "1920x1440" (vrefresh out of range) (II) intel(0): Not using default mode "832x624" (vrefresh out of range) (II) intel(0): Not using default mode "1152x768" (vrefresh out of range) (II) intel(0): Not using default mode "1400x1050" (hsync out of range) (II) intel(0): Not using default mode "1400x1050" (vrefresh out of range) (II) intel(0): Not using default mode "1600x1024" (hsync out of range) (II) intel(0): Not using default mode "1920x1440" (vrefresh out of range) (II) intel(0): Not using default mode "2048x1536" (hsync out of range) (II) intel(0): Not using default mode "2048x1536" (vrefresh out of range) (II) intel(0): Not using default mode "2048x1536" (vrefresh out of range) (II) intel(0): Printing probed modes for output TMDS-1 (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) (II) intel(0): Modeline "800x600"x60.3 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz) (II) intel(0): Modeline "640x480"x59.9 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz) (II) intel(0): SDVO: W: 0B (SDVO_CMD_GET_ATTACHED_DISPLAYS) (II) intel(0): SDVO: R: 04 00 (Pending) (II) intel(0): I2C device "SDVOC DDC Bus:ddc2" registered at address 0xA0. (II) intel(0): SDVO: W: 7A 02 (SDVO_CMD_SET_CONTROL_BUS_SWITCH) (II) intel(0): SDVO: W: 7A 02 (SDVO_CMD_SET_CONTROL_BUS_SWITCH) (II) intel(0): SDVO: W: 7A 02 (SDVO_CMD_SET_CONTROL_BUS_SWITCH) (II) intel(0): SDVO: W: 7A 02 (SDVO_CMD_SET_CONTROL_BUS_SWITCH) (II) intel(0): I2C device "SDVOC DDC Bus:ddc2" removed. (II) intel(0): EDID for output Unknown-2 (II) intel(0): Not using default mode "640x350" (vrefresh out of range) (II) intel(0): Not using default mode "640x400" (vrefresh out of range) (II) intel(0): Not using default mode "720x400" (vrefresh out of range) (II) intel(0): Not using default mode "640x480" (vrefresh out of range) (II) intel(0): Not using default mode "640x480" (vrefresh out of range) (II) intel(0): Not using default mode "640x480" (vrefresh out of range) (II) intel(0): Not using default mode "800x600" (vrefresh out of range) (II) intel(0): Not using default mode "800x600" (vrefresh out of range) (II) intel(0): Not using default mode "800x600" (vrefresh out of range) (II) intel(0): Not using default mode "800x600" (vrefresh out of range) (II) intel(0): Not using default mode "1024x768" (vrefresh out of range) (II) intel(0): Not using default mode "1024x768" (vrefresh out of range) (II) intel(0): Not using default mode "1024x768" (vrefresh out of range) (II) intel(0): Not using default mode "1152x864" (vrefresh out of range) (II) intel(0): Not using default mode "1280x960" (hsync out of range) (II) intel(0): Not using default mode "1280x960" (vrefresh out of range) (II) intel(0): Not using default mode "1280x1024" (hsync out of range) (II) intel(0): Not using default mode "1280x1024" (vrefresh out of range) (II) intel(0): Not using default mode "1280x1024" (vrefresh out of range) (II) intel(0): Not using default mode "1600x1200" (hsync out of range) (II) intel(0): Not using default mode "1600x1200" (vrefresh out of range) (II) intel(0): Not using default mode "1600x1200" (vrefresh out of range) (II) intel(0): Not using default mode "1600x1200" (vrefresh out of range) (II) intel(0): Not using default mode "1600x1200" (vrefresh out of range) (II) intel(0): Not using default mode "1792x1344" (hsync out of range) (II) intel(0): Not using default mode "1792x1344" (vrefresh out of range) (II) intel(0): Not using default mode "1856x1392" (hsync out of range) (II) intel(0): Not using default mode "1856x1392" (vrefresh out of range) (II) intel(0): Not using default mode "1920x1440" (hsync out of range) (II) intel(0): Not using default mode "1920x1440" (vrefresh out of range) (II) intel(0): Not using default mode "832x624" (vrefresh out of range) (II) intel(0): Not using default mode "1152x768" (vrefresh out of range) (II) intel(0): Not using default mode "1400x1050" (hsync out of range) (II) intel(0): Not using default mode "1400x1050" (vrefresh out of range) (II) intel(0): Not using default mode "1600x1024" (hsync out of range) (II) intel(0): Not using default mode "1920x1440" (vrefresh out of range) (II) intel(0): Not using default mode "2048x1536" (hsync out of range) (II) intel(0): Not using default mode "2048x1536" (vrefresh out of range) (II) intel(0): Not using default mode "2048x1536" (vrefresh out of range) (II) intel(0): Printing probed modes for output Unknown-2 (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) (II) intel(0): Modeline "800x600"x60.3 40.00 800 840 968 1056 600 601 605 628 +hsync +vsync (37.9 kHz) (II) intel(0): Modeline "640x480"x59.9 25.18 640 656 752 800 480 490 492 525 -hsync -vsync (31.5 kHz) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 01 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 21 01 (SDVO_CMD_SET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 02 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 04 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 08 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 10 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 20 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 14 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 15 00 00 00 00 16 20 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 21 01 (SDVO_CMD_SET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): detected 512 kB GTT. (II) intel(0): detected 7676 kB stolen memory. (==) intel(0): video overlay key set to 0x101fe (==) intel(0): Will not try to enable page flipping (==) intel(0): Triple buffering disabled (==) intel(0): Using gamma correction (1.0, 1.0, 1.0) (**) intel(0): Display dimensions: (338, 270) mm (**) intel(0): DPI set to (120, 150) (II) Loading sub module "fb" (II) LoadModule: "fb" (II) Loading /usr/lib/xorg/modules//libfb.so (II) Module fb: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 1.0.0 ABI class: X.Org ANSI C Emulation, version 0.3 (II) Loading sub module "xaa" (II) LoadModule: "xaa" (II) Loading /usr/lib/xorg/modules//libxaa.so (II) Module xaa: vendor="X.Org Foundation" compiled for 1.2.99.903, module version = 1.2.0 ABI class: X.Org Video Driver, version 1.2 (II) Loading sub module "ramdac" (II) LoadModule: "ramdac"(II) Module alread ybuilt-in(II) intel(0): Comparing regs from server start up to After PreInit (WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x00000b00 (==) Depth 24 pixmap format is 32 bpp (II) do I need RAC? No, I don't. (II) resource ranges after preInit: [0] 0 0 0x40000000 - 0x4fffffff (0x10000000) MS[B] [1] 0 0 0x50400000 - 0x504fffff (0x100000) MS[B] [2] -1 0 0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B) [3] -1 0 0x000f0000 - 0x000fffff (0x10000) MX[B] [4] -1 0 0x000c0000 - 0x000effff (0x30000) MX[B] [5] -1 0 0x00000000 - 0x0009ffff (0xa0000) MX[B] [6] -1 0 0x50110000 - 0x50113fff (0x4000) MX[B] [7] -1 0 0x50115000 - 0x501157ff (0x800) MX[B] [8] -1 0 0x50100000 - 0x5010ffff (0x10000) MX[B] [9] -1 0 0x50114000 - 0x50114fff (0x1000) MX[B] [10] -1 0 0x50000000 - 0x50000fff (0x1000) MX[B] [11] -1 0 0x50200000 - 0x502001ff (0x200) MX[B] [12] -1 0 0x50526000 - 0x505260ff (0x100) MX[B] [13] -1 0 0x50525000 - 0x505257ff (0x800) MX[B] [14] -1 0 0x50525800 - 0x50525bff (0x400) MX[B] [15] -1 0 0x50520000 - 0x50523fff (0x4000) MX[B] [16] -1 0 0x50525c00 - 0x50525fff (0x400) MX[B] [17] -1 0 0x50524000 - 0x50524fff (0x1000) MX[B] [18] -1 0 0x50500000 - 0x5051ffff (0x20000) MX[B] [19] -1 0 0x50526100 - 0x5052610f (0x10) MX[B] [20] -1 0 0x50001000 - 0x50001fff (0x1000) MX[B](B) [21] -1 0 0x50300000 - 0x503fffff (0x100000) MX[B](B) [22] -1 0 0x40000000 - 0x4fffffff (0x10000000) MX[B](B) [23] -1 0 0x50400000 - 0x504fffff (0x100000) MX[B](B) [24] 0 0 0x000a0000 - 0x000affff (0x10000) MS[B](OprD) [25] 0 0 0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD) [26] 0 0 0x000b8000 - 0x000bffff (0x8000) MS[B](OprD) [27] 0 0 0x00003110 - 0x00003117 (0x8) IS[B] [28] -1 0 0x0000ffff - 0x0000ffff (0x1) IX[B] [29] -1 0 0x00000000 - 0x000000ff (0x100) IX[B] [30] -1 0 0x00001040 - 0x00001047 (0x8) IX[B] [31] -1 0 0x00001000 - 0x0000101f (0x20) IX[B] [32] -1 0 0x00001020 - 0x0000103f (0x20) IX[B] [33] -1 0 0x00002000 - 0x0000200f (0x10) IX[B] [34] -1 0 0x00002020 - 0x00002023 (0x4) IX[B] [35] -1 0 0x00002010 - 0x00002017 (0x8) IX[B] [36] -1 0 0x00002024 - 0x00002027 (0x4) IX[B] [37] -1 0 0x00002018 - 0x0000201f (0x8) IX[B] [38] -1 0 0x00003000 - 0x0000301f (0x20) IX[B] [39] -1 0 0x00003020 - 0x0000303f (0x20) IX[B] [40] -1 0 0x00003118 - 0x0000311b (0x4) IX[B] [41] -1 0 0x00003100 - 0x00003107 (0x8) IX[B] [42] -1 0 0x0000311c - 0x0000311f (0x4) IX[B] [43] -1 0 0x00003108 - 0x0000310f (0x8) IX[B] [44] -1 0 0x00003040 - 0x0000305f (0x20) IX[B] [45] -1 0 0x00003060 - 0x0000307f (0x20) IX[B] [46] -1 0 0x00003080 - 0x0000309f (0x20) IX[B] [47] -1 0 0x000030a0 - 0x000030bf (0x20) IX[B] [48] -1 0 0x000030c0 - 0x000030df (0x20) IX[B] [49] -1 0 0x000030e0 - 0x000030ff (0x20) IX[B] [50] -1 0 0x00003110 - 0x00003117 (0x8) IX[B](B) [51] 0 0 0x000003b0 - 0x000003bb (0xc) IS[B](OprU) [52] 0 0 0x000003c0 - 0x000003df (0x20) IS[B](OprU) (II) intel(0): Kernel reported 234752 total, 1 used (II) intel(0): I830CheckAvailableMemory: 939004 kB available (==) intel(0): VideoRam: 262144 KB (II) intel(0): Attempting memory allocation with tiled buffers and large DRI memory manager reservation: (II) intel(0): Allocating 6056 scanlines for pixmap cache (II) intel(0): Success. (II) intel(0): Increasing the scanline pitch to allow tiling mode (1600 -> 1664). (II) intel(0): Memory allocation layout: (II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB) (II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB) (II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB) (II) intel(0): 0x00040000-0x030d8fff: front buffer (49764 kB) (II) intel(0): 0x0077f000: end of stolen memory (II) intel(0): 0x030d9000-0x030e8fff: xaa scratch (64 kB) (II) intel(0): 0x030e9000-0x03b10fff: back buffer (10400 kB) (II) intel(0): 0x03b11000-0x04538fff: depth buffer (10400 kB) (II) intel(0): 0x04539000-0x06538fff: textures (32768 kB) (II) intel(0): 0x10000000: end of aperture (II) intel(0): front buffer is not tiled (II) intel(0): back buffer is tiled (II) intel(0): depth buffer is tiled drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is -1, (No such device or address) drmOpenDevice: open result is -1, (No such device or address) drmOpenDevice: Open failed drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is -1, (No such device or address) drmOpenDevice: open result is -1, (No such device or address) drmOpenDevice: Open failed drmOpenByBusid: Searching for BusID pci:0000:00:02.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 8, (OK) drmOpenByBusid: drmOpenMinor returns 8 drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0 (II) intel(0): [drm] loaded kernel module for "i915" driver (II) intel(0): [drm] DRM interface version 1.3 (II) intel(0): [drm] created "i915" driver at busid "pci:0000:00:02.0" (II) intel(0): [drm] added 8192 byte SAREA at 0xf8ec6000 (II) intel(0): [drm] mapped SAREA 0xf8ec6000 to 0xb7f5a000 (II) intel(0): [drm] framebuffer handle = 0x40040000 (II) intel(0): [drm] added 1 reserved context for kernel (II) intel(0): [drm] Registers = 0x50400000 (II) intel(0): [drm] ring buffer = 0x40000000 (II) intel(0): [drm] init sarea width,height = 1600 x 1600 (pitch 1664) (II) intel(0): [drm] Back Buffer = 0x430e9000 (II) intel(0): [drm] Depth Buffer = 0x43b11000 (II) intel(0): [drm] textures = 0x44539000 (II) intel(0): [drm] Initialized kernel agp heap manager, 33554432 (II) intel(0): [dri] visual configs initialized (II) intel(0): Page Flipping disabled (==) intel(0): Write-combining range (0x40000000,0x10000000) (II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000 (II) intel(0): Using XFree86 Acceleration Architecture (XAA) Screen to screen bit blits Solid filled rectangles 8x8 mono pattern filled rectangles Indirect CPU to Screen color expansion Solid Horizontal and Vertical Lines Offscreen Pixmaps Setting up tile and stipple cache: 32 128x128 slots 32 256x256 slots 16 512x512 slots (==) intel(0): Backing store disabled (==) intel(0): Silken mouse enabled (II) intel(0): Initializing HW Cursor (II) intel(0): SDVO: W: 20 (SDVO_CMD_GET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: 01 (Success) (II) intel(0): Current clock rate multiplier: 1 (II) intel(0): SDVO: W: 04 (SDVO_CMD_GET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: 00 00 (Success) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 12 (SDVO_CMD_GET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 64 19 00 40 41 00 26 30 (Success) (II) intel(0): SDVO: W: 13 (SDVO_CMD_GET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 18 88 36 00 18 00 00 00 (Success) (II) intel(0): SDVO: W: 11 01 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 64 19 00 40 41 00 26 30 (Success) (II) intel(0): SDVO: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 18 88 36 00 18 00 00 00 (Success) (II) intel(0): SDVO: W: 20 (SDVO_CMD_GET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: 01 (Success) (II) intel(0): Current clock rate multiplier: 1 (II) intel(0): SDVO: W: 04 (SDVO_CMD_GET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: 00 00 (Success) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 12 (SDVO_CMD_GET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success) (II) intel(0): SDVO: W: 13 (SDVO_CMD_GET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 00 00 00 00 16 20 00 00 (Success) (II) intel(0): SDVO: W: 11 02 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success) (II) intel(0): SDVO: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success) (II) intel(0): SDVO: W: 11 04 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success) (II) intel(0): SDVO: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success) (II) intel(0): SDVO: W: 11 08 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success) (II) intel(0): SDVO: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success) (II) intel(0): SDVO: W: 11 10 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success) (II) intel(0): SDVO: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success) (II) intel(0): SDVO: W: 11 20 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 18 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Success) (II) intel(0): SDVO: W: 19 (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: 00 00 00 00 1E 00 00 00 (Success) (II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0077f000 (pgoffset 1919) (II) intel(0): xf86BindGARTMemory: bind key 1 at 0x030d9000 (pgoffset 12505) (II) intel(0): xf86BindGARTMemory: bind key 2 at 0x030e9000 (pgoffset 12521) (II) intel(0): xf86BindGARTMemory: bind key 3 at 0x03b11000 (pgoffset 15121) (II) intel(0): xf86BindGARTMemory: bind key 4 at 0x04539000 (pgoffset 17721) (II) intel(0): Mode for pipe A: (II) intel(0): Modeline "1280x1024"x60.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz) chosen: dotclock 107520 vco 2150400 ((m 112, m1 19, m2 5), n 3, (p 20, p1 2, p2 10)) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): Mode for pipe B: (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) (II) intel(0): Adjusted mode for pipe B: (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) chosen: dotclock 280320 vco 1401600 ((m 73, m1 11, m2 6), n 3, (p 5, p1 1, p2 5)) (II) intel(0): SDVO: W: 11 01 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 21 02 (SDVO_CMD_SET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 00 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Invalid arg) (II) intel(0): SDVO: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Target not specified) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 21 02 (SDVO_CMD_SET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 03 (SDVO_CMD_GET_TRAINED_INPUTS) (II) intel(0): SDVO: R: 01 (Success) (II) intel(0): SDVO: W: 05 01 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 03 (SDVO_CMD_GET_TRAINED_INPUTS) (II) intel(0): SDVO: R: 01 (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): DumpRegsBegin (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) (II) intel(0): DPLL_TEST: 0x00010001 () (II) intel(0): D_STATE: 0x00000000 (II) intel(0): DSPCLK_GATE_D: 0x00040000 (II) intel(0): RENCLK_GATE_D1: 0x70000000 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0xc0080084 (enabled, pipe B, stall disabled, detected) (II) intel(0): SDVOC: 0xc0080080 (enabled, pipe B, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x00001d9c (II) intel(0): DSPFW1: 0x1f8f0f0f (II) intel(0): DSPFW2: 0x00000f0f (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x80000018 (enabled, pipe A, +hsync, +vsync) (II) intel(0): LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (II) intel(0): DVOB: 0xc0080084 (II) intel(0): DVOC: 0xc0080080 (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000000 (power target: off) (II) intel(0): PP_STATUS: 0x00000000 (off, not ready, sequencing idle) (II) intel(0): PFIT_CONTROL: 0x00000000 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000020 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000b00 (II) intel(0): DSPACNTR: 0xd8000000 (enabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00001a00 (6656 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00040000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0xc0000000 (enabled, active) (II) intel(0): PIPEASRC: 0x04ff03ff (1280, 1024) (II) intel(0): FPA0: 0x00031305 (n = 3, m1 = 19, m2 = 5) (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_A: 0x94020c00 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x069704ff (1280 active, 1688 total) (II) intel(0): HBLANK_A: 0x069704ff (1280 start, 1688 end) (II) intel(0): HSYNC_A: 0x059f052f (1328 start, 1440 end) (II) intel(0): VTOTAL_A: 0x042903ff (1024 active, 1066 total) (II) intel(0): VBLANK_A: 0x042903ff (1024 start, 1066 end) (II) intel(0): VSYNC_A: 0x04030400 (1025 start, 1028 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0xd9000000 (enabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00001a00 (6656 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) (II) intel(0): DSPBBASE: 0x00000000 (II) intel(0): DSPBSURF: 0x00040000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0xc0000000 (enabled, active) (II) intel(0): PIPEBSRC: 0x03ff02ff (1024, 768) (II) intel(0): FPB0: 0x00030b06 (n = 3, m1 = 11, m2 = 6) (II) intel(0): FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_B: 0xd5010c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 1, p2 = 5) (II) intel(0): DPLL_B_MD: 0x00000300 (II) intel(0): HTOTAL_B: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_B: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_B: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_B: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_B: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x00020002 (II) intel(0): VGACNTRL: 0x80000000 (disabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): SR00: 0x03 (II) intel(0): SR01: 0x00 (II) intel(0): SR02: 0x03 (II) intel(0): SR03: 0x04 (II) intel(0): SR04: 0x02 (II) intel(0): SR05: 0x00 (II) intel(0): SR06: 0x00 (II) intel(0): SR07: 0x00 (II) intel(0): MSR: 0x67 (II) intel(0): CR00: 0x5f (II) intel(0): CR01: 0x4f (II) intel(0): CR02: 0x50 (II) intel(0): CR03: 0x82 (II) intel(0): CR04: 0x55 (II) intel(0): CR05: 0x81 (II) intel(0): CR06: 0xbf (II) intel(0): CR07: 0x1f (II) intel(0): CR08: 0x00 (II) intel(0): CR09: 0x4d (II) intel(0): CR0a: 0x1f (II) intel(0): CR0b: 0x1e (II) intel(0): CR0c: 0x00 (II) intel(0): CR0d: 0x00 (II) intel(0): CR0e: 0x00 (II) intel(0): CR0f: 0x00 (II) intel(0): CR10: 0x9c (II) intel(0): CR11: 0x0e (II) intel(0): CR12: 0x87 (II) intel(0): CR13: 0x28 (II) intel(0): CR14: 0x1f (II) intel(0): CR15: 0x96 (II) intel(0): CR16: 0xb9 (II) intel(0): CR17: 0xa3 (II) intel(0): CR18: 0xff (II) intel(0): CR19: 0x00 (II) intel(0): CR1a: 0x00 (II) intel(0): CR1b: 0x00 (II) intel(0): CR1c: 0x00 (II) intel(0): CR1d: 0x00 (II) intel(0): CR1e: 0x00 (II) intel(0): CR1f: 0x00 (II) intel(0): CR20: 0x00 (II) intel(0): CR21: 0x00 (II) intel(0): CR22: 0x00 (II) intel(0): CR23: 0x00 (II) intel(0): CR24: 0x00 (II) intel(0): pipe A dot 107520 n 3 m1 19 m2 5 p1 2 p2 10 (II) intel(0): pipe B dot 280320 n 3 m1 11 m2 6 p1 1 p2 5 (II) intel(0): DumpRegsEnd (II) intel(0): Output configuration: (II) intel(0): Pipe A is on (II) intel(0): Display plane A is now enabled and connected to pipe A. (II) intel(0): Pipe B is on (II) intel(0): Display plane B is now enabled and connected to pipe B. (II) intel(0): Output VGA is connected to pipe A (II) intel(0): Output TMDS-1 is connected to pipe B (II) intel(0): Output Unknown-2 is connected to pipe B (**) Option "dpms" (**) intel(0): DPMS enabled (II) intel(0): Set up textured video (II) intel(0): X context handle = 0x1 (II) intel(0): [drm] installed DRM signal handler (II) intel(0): [DRI] installation complete (II) intel(0): [drm] dma control initialized, using IRQ 17 (II) intel(0): direct rendering: Enabled (II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message. (WW) intel(0): Option "PreferredMode" is not used (--) RandR disabled (II) Initializing built-in extension MIT-SHM (II) Initializing built-in extension XInputExtension (II) Initializing built-in extension XTEST (II) Initializing built-in extension XKEYBOARD (II) Initializing built-in extension XC-APPGROUP (II) Initializing built-in extension XAccessControlExtension (II) Initializing built-in extension SECURITY (II) Initializing built-in extension XINERAMA (II) Initializing built-in extension XFIXES (II) Initializing built-in extension XFree86-Bigfont (II) Initializing built-in extension RENDER (II) Initializing built-in extension RANDR (II) Initializing built-in extension COMPOSITE (II) Initializing built-in extension DAMAGE (II) Initializing built-in extension XEVIE drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 9, (OK) drmOpenByBusid: Searching for BusID pci:0000:00:02.0 drmOpenDevice: node name is /dev/dri/card0 drmOpenDevice: open result is 9, (OK) drmOpenByBusid: drmOpenMinor returns 9 drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0 (WW) AIGLX: 3D driver claims to not support visual 0x23 (WW) AIGLX: 3D driver claims to not support visual 0x24 (WW) AIGLX: 3D driver claims to not support visual 0x25 (WW) AIGLX: 3D driver claims to not support visual 0x26 (WW) AIGLX: 3D driver claims to not support visual 0x27 (WW) AIGLX: 3D driver claims to not support visual 0x28 (WW) AIGLX: 3D driver claims to not support visual 0x29 (WW) AIGLX: 3D driver claims to not support visual 0x2a (WW) AIGLX: 3D driver claims to not support visual 0x2b (WW) AIGLX: 3D driver claims to not support visual 0x2c (WW) AIGLX: 3D driver claims to not support visual 0x2d (WW) AIGLX: 3D driver claims to not support visual 0x2e (WW) AIGLX: 3D driver claims to not support visual 0x2f (WW) AIGLX: 3D driver claims to not support visual 0x30 (WW) AIGLX: 3D driver claims to not support visual 0x31 (WW) AIGLX: 3D driver claims to not support visual 0x32 (II) AIGLX: Loaded and initialized /usr/lib/xorg/modules/dri/i965_dri.so (II) GLX: Initialized DRI GL provider for screen 0 (II) intel(0): Setting screen physical size to 338 x 270 (**) Option "Protocol" "ImPS/2" (**) Mouse0: Device: "/dev/input/mice" (**) Mouse0: Protocol: "ImPS/2" (**) Option "CorePointer" (**) Mouse0: Core Pointer (**) Option "Device" "/dev/input/mice" (==) Mouse0: Emulate3Buttons, Emulate3Timeout: 50 (**) Option "ZAxisMapping" "4 5" (**) Mouse0: ZAxisMapping: buttons 4 and 5 (**) Mouse0: Buttons: 9 (**) Option "CoreKeyboard" (**) Keyboard0: Core Keyboard (**) Option "Protocol" "standard" (**) Keyboard0: Protocol: standard (**) Option "AutoRepeat" "500 30" (**) Option "XkbRules" "xorg" (**) Keyboard0: XkbRules: "xorg" (**) Option "XkbModel" "pc104" (**) Keyboard0: XkbModel: "pc104" (**) Option "XkbLayout" "pl" (**) Keyboard0: XkbLayout: "pl" (**) Option "CustomKeycodes" "off" (**) Keyboard0: CustomKeycodes disabled (II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD) (II) XINPUT: Adding extended input device "Mouse0" (type: MOUSE) (II) Mouse0: ps2EnableDataReporting: succeeded (II) intel(0): SDVO: W: 03 (SDVO_CMD_GET_TRAINED_INPUTS) (II) intel(0): SDVO: R: 01 (Success) (II) intel(0): SDVO: W: 05 01 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 03 (SDVO_CMD_GET_TRAINED_INPUTS) (II) intel(0): SDVO: R: 01 (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) AUDIT: Tue Mar 27 19:56:28 2007: 3473 X: client 32 rejected from local host (uid 0) (II) 3rd Button detected: disabling emulate3Button (II) AIGLX: Suspending AIGLX clients for VT switch (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 01 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 21 01 (SDVO_CMD_SET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 02 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 04 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 08 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 10 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 20 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 14 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 15 00 00 00 00 16 20 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 21 01 (SDVO_CMD_SET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): Comparing regs from server start up to After LeaveVT (WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x00000b00 (II) intel(0): DumpRegsBegin (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) (II) intel(0): DPLL_TEST: 0x00010001 () (II) intel(0): D_STATE: 0x00000000 (II) intel(0): DSPCLK_GATE_D: 0x00040000 (II) intel(0): RENCLK_GATE_D1: 0x70000000 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x0008001c (disabled, pipe A, stall disabled, detected) (II) intel(0): SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x00001d9c (II) intel(0): DSPFW1: 0x1f8f0f0f (II) intel(0): DSPFW2: 0x00000f0f (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x80008018 (enabled, pipe A, +hsync, +vsync) (II) intel(0): LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (II) intel(0): DVOB: 0x0008001c (II) intel(0): DVOC: 0x00080018 (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000000 (power target: off) (II) intel(0): PP_STATUS: 0x00000000 (off, not ready, sequencing idle) (II) intel(0): PFIT_CONTROL: 0x00000000 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000020 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000b00 (II) intel(0): DSPACNTR: 0x18000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000c80 (3200 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0xc0000000 (enabled, active) (II) intel(0): PIPEASRC: 0x031f0257 (800, 600) (II) intel(0): FPA0: 0x00011008 (n = 1, m1 = 16, m2 = 8) (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_A: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) (II) intel(0): DPLL_A_MD: 0x00000003 (II) intel(0): HTOTAL_A: 0x041f031f (800 active, 1056 total) (II) intel(0): HBLANK_A: 0x041f031f (800 start, 1056 end) (II) intel(0): HSYNC_A: 0x03c70347 (840 start, 968 end) (II) intel(0): VTOTAL_A: 0x02730257 (600 active, 628 total) (II) intel(0): VBLANK_A: 0x02730257 (600 start, 628 end) (II) intel(0): VSYNC_A: 0x025c0258 (601 start, 605 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0x01000000 (disabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) (II) intel(0): DSPBBASE: 0x00000000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0xc0000000 (enabled, active) (II) intel(0): PIPEBSRC: 0x027f01df (640, 480) (II) intel(0): FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_B: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) (II) intel(0): DPLL_B_MD: 0x00000303 (II) intel(0): HTOTAL_B: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_B: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_B: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_B: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_B: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_B: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x00020002 (II) intel(0): VGACNTRL: 0x0000008e (enabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): SR00: 0x03 (II) intel(0): SR01: 0x00 (II) intel(0): SR02: 0x03 (II) intel(0): SR03: 0x04 (II) intel(0): SR04: 0x02 (II) intel(0): SR05: 0x00 (II) intel(0): SR06: 0x00 (II) intel(0): SR07: 0x00 (II) intel(0): MSR: 0x67 (II) intel(0): CR00: 0x5f (II) intel(0): CR01: 0x4f (II) intel(0): CR02: 0x50 (II) intel(0): CR03: 0x82 (II) intel(0): CR04: 0x55 (II) intel(0): CR05: 0x81 (II) intel(0): CR06: 0xbf (II) intel(0): CR07: 0x1f (II) intel(0): CR08: 0x00 (II) intel(0): CR09: 0x4d (II) intel(0): CR0a: 0x1f (II) intel(0): CR0b: 0x1e (II) intel(0): CR0c: 0x00 (II) intel(0): CR0d: 0x00 (II) intel(0): CR0e: 0xc0 (II) intel(0): CR0f: 0x00 (II) intel(0): CR10: 0x9c (II) intel(0): CR11: 0x8e (II) intel(0): CR12: 0x87 (II) intel(0): CR13: 0x28 (II) intel(0): CR14: 0x1f (II) intel(0): CR15: 0x96 (II) intel(0): CR16: 0xb9 (II) intel(0): CR17: 0xa3 (II) intel(0): CR18: 0xff (II) intel(0): CR19: 0x00 (II) intel(0): CR1a: 0x00 (II) intel(0): CR1b: 0x00 (II) intel(0): CR1c: 0x00 (II) intel(0): CR1d: 0x00 (II) intel(0): CR1e: 0x00 (II) intel(0): CR1f: 0x00 (II) intel(0): CR20: 0x00 (II) intel(0): CR21: 0x00 (II) intel(0): CR22: 0x00 (II) intel(0): CR23: 0x00 (II) intel(0): CR24: 0x00 (II) intel(0): pipe A dot 40000 n 1 m1 16 m2 8 p1 8 p2 10 (II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10 (II) intel(0): DumpRegsEnd (II) intel(0): xf86UnbindGARTMemory: unbind key 0 (II) intel(0): xf86UnbindGARTMemory: unbind key 1 (II) intel(0): xf86UnbindGARTMemory: unbind key 2 (II) intel(0): xf86UnbindGARTMemory: unbind key 3 (II) intel(0): xf86UnbindGARTMemory: unbind key 4 (II) Open ACPI successful (/var/run/acpid.socket) (II) AIGLX: Resuming AIGLX clients after VT switch (II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0077f000 (pgoffset 1919) (II) intel(0): xf86BindGARTMemory: bind key 1 at 0x030d9000 (pgoffset 12505) (II) intel(0): xf86BindGARTMemory: bind key 2 at 0x030e9000 (pgoffset 12521) (II) intel(0): xf86BindGARTMemory: bind key 3 at 0x03b11000 (pgoffset 15121) (II) intel(0): xf86BindGARTMemory: bind key 4 at 0x04539000 (pgoffset 17721) (WW) intel(0): PRB0_HEAD (0x00000000) and PRB0_TAIL (0x00016068) indicate ring buffer not flushed (WW) intel(0): Existing errors found in hardware state. (II) intel(0): Mode for pipe A: (II) intel(0): Modeline "1280x1024"x60.0 108.00 1280 1328 1440 1688 1024 1025 1028 1066 +hsync +vsync (64.0 kHz) chosen: dotclock 107520 vco 2150400 ((m 112, m1 19, m2 5), n 3, (p 20, p1 2, p2 10)) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): Mode for pipe B: (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) (II) intel(0): Adjusted mode for pipe B: (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 806 -hsync -vsync (48.4 kHz) chosen: dotclock 280320 vco 1401600 ((m 73, m1 11, m2 6), n 3, (p 5, p1 1, p2 5)) (II) intel(0): SDVO: W: 11 01 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 21 02 (SDVO_CMD_SET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 00 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Invalid arg) (II) intel(0): SDVO: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Target not specified) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 21 02 (SDVO_CMD_SET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 03 (SDVO_CMD_GET_TRAINED_INPUTS) (II) intel(0): SDVO: R: 01 (Success) (II) intel(0): SDVO: W: 05 01 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 03 (SDVO_CMD_GET_TRAINED_INPUTS) (II) intel(0): SDVO: R: 01 (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): DumpRegsBegin (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) (II) intel(0): DPLL_TEST: 0x00010001 () (II) intel(0): D_STATE: 0x00000000 (II) intel(0): DSPCLK_GATE_D: 0x00040000 (II) intel(0): RENCLK_GATE_D1: 0x70000000 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0xc0080084 (enabled, pipe B, stall disabled, detected) (II) intel(0): SDVOC: 0xc0080080 (enabled, pipe B, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x00001d9c (II) intel(0): DSPFW1: 0x1f8f0f0f (II) intel(0): DSPFW2: 0x00000f0f (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x80000018 (enabled, pipe A, +hsync, +vsync) (II) intel(0): LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (II) intel(0): DVOB: 0xc0080084 (II) intel(0): DVOC: 0xc0080080 (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000000 (power target: off) (II) intel(0): PP_STATUS: 0x00000000 (off, not ready, sequencing idle) (II) intel(0): PFIT_CONTROL: 0x00000000 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000020 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000b00 (II) intel(0): DSPACNTR: 0xd8000000 (enabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00001a00 (6656 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00040000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0xc0000000 (enabled, active) (II) intel(0): PIPEASRC: 0x04ff03ff (1280, 1024) (II) intel(0): FPA0: 0x00031305 (n = 3, m1 = 19, m2 = 5) (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_A: 0x94020c00 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10) (II) intel(0): DPLL_A_MD: 0x00000000 (II) intel(0): HTOTAL_A: 0x069704ff (1280 active, 1688 total) (II) intel(0): HBLANK_A: 0x069704ff (1280 start, 1688 end) (II) intel(0): HSYNC_A: 0x059f052f (1328 start, 1440 end) (II) intel(0): VTOTAL_A: 0x042903ff (1024 active, 1066 total) (II) intel(0): VBLANK_A: 0x042903ff (1024 start, 1066 end) (II) intel(0): VSYNC_A: 0x04030400 (1025 start, 1028 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0xd9000000 (enabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00001a00 (6656 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) (II) intel(0): DSPBBASE: 0x00000000 (II) intel(0): DSPBSURF: 0x00040000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0xc0000000 (enabled, active) (II) intel(0): PIPEBSRC: 0x03ff02ff (1024, 768) (II) intel(0): FPB0: 0x00030b06 (n = 3, m1 = 11, m2 = 6) (II) intel(0): FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_B: 0xd5010c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 1, p2 = 5) (II) intel(0): DPLL_B_MD: 0x00000300 (II) intel(0): HTOTAL_B: 0x053f03ff (1024 active, 1344 total) (II) intel(0): HBLANK_B: 0x053f03ff (1024 start, 1344 end) (II) intel(0): HSYNC_B: 0x049f0417 (1048 start, 1184 end) (II) intel(0): VTOTAL_B: 0x032502ff (768 active, 806 total) (II) intel(0): VBLANK_B: 0x032502ff (768 start, 806 end) (II) intel(0): VSYNC_B: 0x03080302 (771 start, 777 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x00020002 (II) intel(0): VGACNTRL: 0x80000000 (disabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): SR00: 0x03 (II) intel(0): SR01: 0x00 (II) intel(0): SR02: 0x03 (II) intel(0): SR03: 0x04 (II) intel(0): SR04: 0x02 (II) intel(0): SR05: 0x00 (II) intel(0): SR06: 0x00 (II) intel(0): SR07: 0x00 (II) intel(0): MSR: 0x67 (II) intel(0): CR00: 0x5f (II) intel(0): CR01: 0x4f (II) intel(0): CR02: 0x50 (II) intel(0): CR03: 0x82 (II) intel(0): CR04: 0x55 (II) intel(0): CR05: 0x81 (II) intel(0): CR06: 0xbf (II) intel(0): CR07: 0x1f (II) intel(0): CR08: 0x00 (II) intel(0): CR09: 0x4d (II) intel(0): CR0a: 0x1f (II) intel(0): CR0b: 0x1e (II) intel(0): CR0c: 0x00 (II) intel(0): CR0d: 0x00 (II) intel(0): CR0e: 0x00 (II) intel(0): CR0f: 0x00 (II) intel(0): CR10: 0x9c (II) intel(0): CR11: 0x8e (II) intel(0): CR12: 0x87 (II) intel(0): CR13: 0x28 (II) intel(0): CR14: 0x1f (II) intel(0): CR15: 0x96 (II) intel(0): CR16: 0xb9 (II) intel(0): CR17: 0xa3 (II) intel(0): CR18: 0xff (II) intel(0): CR19: 0x00 (II) intel(0): CR1a: 0x00 (II) intel(0): CR1b: 0x00 (II) intel(0): CR1c: 0x00 (II) intel(0): CR1d: 0x00 (II) intel(0): CR1e: 0x00 (II) intel(0): CR1f: 0x00 (II) intel(0): CR20: 0x00 (II) intel(0): CR21: 0x00 (II) intel(0): CR22: 0x20 (II) intel(0): CR23: 0x00 (II) intel(0): CR24: 0x00 (II) intel(0): pipe A dot 107520 n 3 m1 19 m2 5 p1 2 p2 10 (II) intel(0): pipe B dot 280320 n 3 m1 11 m2 6 p1 1 p2 5 (II) intel(0): DumpRegsEnd (II) intel(0): Output configuration: (II) intel(0): Pipe A is on (II) intel(0): Display plane A is now enabled and connected to pipe A. (II) intel(0): Pipe B is on (II) intel(0): Display plane B is now enabled and connected to pipe B. (II) intel(0): Output VGA is connected to pipe A (II) intel(0): Output TMDS-1 is connected to pipe B (II) intel(0): Output Unknown-2 is connected to pipe B (II) intel(0): [drm] dma control initialized, using IRQ 17 Backtrace: 0: /usr/bin/X(xf86SigHandler+0x81) [0x80c58ac] 1: /lib/libc.so.6 [0xb7db2528] 2: /usr/bin/X [0x80d128c] 3: /usr/bin/X(TraverseTree+0x1e) [0x80722de] 4: /usr/bin/X(WalkTree+0x38) [0x807235e] 5: /usr/bin/X [0x80d1312] 6: /usr/lib/xorg/modules/extensions//libglx.so [0xb7c7b5f9] 7: /usr/bin/X(xf86Wakeup+0x3f1) [0x80c6f47] 8: /usr/bin/X(WakeupHandler+0x4d) [0x808ae6d] 9: /usr/bin/X(WaitForSomething+0x1ca) [0x81a2a08] 10: /usr/bin/X(Dispatch+0x82) [0x808714e] 11: /usr/bin/X(main+0x489) [0x8070179] 12: /lib/libc.so.6(__libc_start_main+0xe3) [0xb7d9de53] Fatal server error: Caught signal 11. Server aborting (II) AIGLX: Suspending AIGLX clients for VT switch (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 01 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 21 01 (SDVO_CMD_SET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 02 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 04 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 08 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 10 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 11 20 00 (SDVO_CMD_SET_TARGET_OUTPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 17 00 00 00 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 10 00 (SDVO_CMD_SET_TARGET_INPUT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 14 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART1) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 15 00 00 00 00 16 20 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 21 01 (SDVO_CMD_SET_CLOCK_RATE_MULT) (II) intel(0): SDVO: R: (Success) (II) intel(0): SDVO: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) (II) intel(0): SDVO: R: (Success) (II) intel(0): Comparing regs from server start up to After LeaveVT (WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x00000b00 (II) intel(0): DumpRegsBegin (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) (II) intel(0): VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2) (II) intel(0): DPLL_TEST: 0x00010001 () (II) intel(0): D_STATE: 0x00000000 (II) intel(0): DSPCLK_GATE_D: 0x00040000 (II) intel(0): RENCLK_GATE_D1: 0x70000000 (II) intel(0): RENCLK_GATE_D2: 0x00000000 (II) intel(0): SDVOB: 0x0008001c (disabled, pipe A, stall disabled, detected) (II) intel(0): SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected) (II) intel(0): SDVOUDI: 0x00000000 (II) intel(0): DSPARB: 0x00001d9c (II) intel(0): DSPFW1: 0x1f8f0f0f (II) intel(0): DSPFW2: 0x00000f0f (II) intel(0): DSPFW3: 0x00000000 (II) intel(0): ADPA: 0x80008018 (enabled, pipe A, +hsync, +vsync) (II) intel(0): LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel) (II) intel(0): DVOA: 0x00000000 (II) intel(0): DVOB: 0x0008001c (II) intel(0): DVOC: 0x00080018 (II) intel(0): DVOA_SRCDIM: 0x00000000 (II) intel(0): DVOB_SRCDIM: 0x00000000 (II) intel(0): DVOC_SRCDIM: 0x00000000 (II) intel(0): PP_CONTROL: 0x00000000 (power target: off) (II) intel(0): PP_STATUS: 0x00000000 (off, not ready, sequencing idle) (II) intel(0): PFIT_CONTROL: 0x00000000 (II) intel(0): PFIT_PGM_RATIOS: 0x00000000 (II) intel(0): PORT_HOTPLUG_EN: 0x00000020 (II) intel(0): PORT_HOTPLUG_STAT: 0x00000b00 (II) intel(0): DSPACNTR: 0x18000000 (disabled, pipe A) (II) intel(0): DSPASTRIDE: 0x00000c80 (3200 bytes) (II) intel(0): DSPAPOS: 0x00000000 (0, 0) (II) intel(0): DSPASIZE: 0x00000000 (1, 1) (II) intel(0): DSPABASE: 0x00000000 (II) intel(0): DSPASURF: 0x00000000 (II) intel(0): DSPATILEOFF: 0x00000000 (II) intel(0): PIPEACONF: 0xc0000000 (enabled, active) (II) intel(0): PIPEASRC: 0x031f0257 (800, 600) (II) intel(0): FPA0: 0x00011008 (n = 1, m1 = 16, m2 = 8) (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_A: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) (II) intel(0): DPLL_A_MD: 0x00000003 (II) intel(0): HTOTAL_A: 0x041f031f (800 active, 1056 total) (II) intel(0): HBLANK_A: 0x041f031f (800 start, 1056 end) (II) intel(0): HSYNC_A: 0x03c70347 (840 start, 968 end) (II) intel(0): VTOTAL_A: 0x02730257 (600 active, 628 total) (II) intel(0): VBLANK_A: 0x02730257 (600 start, 628 end) (II) intel(0): VSYNC_A: 0x025c0258 (601 start, 605 end) (II) intel(0): BCLRPAT_A: 0x00000000 (II) intel(0): VSYNCSHIFT_A: 0x00000000 (II) intel(0): DSPBCNTR: 0x01000000 (disabled, pipe B) (II) intel(0): DSPBSTRIDE: 0x00000000 (0 bytes) (II) intel(0): DSPBPOS: 0x00000000 (0, 0) (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) (II) intel(0): DSPBBASE: 0x00000000 (II) intel(0): DSPBSURF: 0x00000000 (II) intel(0): DSPBTILEOFF: 0x00000000 (II) intel(0): PIPEBCONF: 0xc0000000 (enabled, active) (II) intel(0): PIPEBSRC: 0x027f01df (640, 480) (II) intel(0): FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) (II) intel(0): DPLL_B: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10) (II) intel(0): DPLL_B_MD: 0x00000303 (II) intel(0): HTOTAL_B: 0x031f027f (640 active, 800 total) (II) intel(0): HBLANK_B: 0x03170287 (648 start, 792 end) (II) intel(0): HSYNC_B: 0x02ef028f (656 start, 752 end) (II) intel(0): VTOTAL_B: 0x020c01df (480 active, 525 total) (II) intel(0): VBLANK_B: 0x020401e7 (488 start, 517 end) (II) intel(0): VSYNC_B: 0x01eb01e9 (490 start, 492 end) (II) intel(0): BCLRPAT_B: 0x00000000 (II) intel(0): VSYNCSHIFT_B: 0x00000000 (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (II) intel(0): VCLK_POST_DIV: 0x00020002 (II) intel(0): VGACNTRL: 0x0000008e (enabled) (II) intel(0): TV_CTL: 0x00000000 (II) intel(0): TV_DAC: 0x00000000 (II) intel(0): TV_CSC_Y: 0x00000000 (II) intel(0): TV_CSC_Y2: 0x00000000 (II) intel(0): TV_CSC_U: 0x00000000 (II) intel(0): TV_CSC_U2: 0x00000000 (II) intel(0): TV_CSC_V: 0x00000000 (II) intel(0): TV_CSC_V2: 0x00000000 (II) intel(0): TV_CLR_KNOBS: 0x00000000 (II) intel(0): TV_CLR_LEVEL: 0x00000000 (II) intel(0): TV_H_CTL_1: 0x00000000 (II) intel(0): TV_H_CTL_2: 0x00000000 (II) intel(0): TV_H_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_1: 0x00000000 (II) intel(0): TV_V_CTL_2: 0x00000000 (II) intel(0): TV_V_CTL_3: 0x00000000 (II) intel(0): TV_V_CTL_4: 0x00000000 (II) intel(0): TV_V_CTL_5: 0x00000000 (II) intel(0): TV_V_CTL_6: 0x00000000 (II) intel(0): TV_V_CTL_7: 0x00000000 (II) intel(0): TV_SC_CTL_1: 0x00000000 (II) intel(0): TV_SC_CTL_2: 0x00000000 (II) intel(0): TV_SC_CTL_3: 0x00000000 (II) intel(0): TV_WIN_POS: 0x00000000 (II) intel(0): TV_WIN_SIZE: 0x00000000 (II) intel(0): TV_FILTER_CTL_1: 0x00000000 (II) intel(0): TV_FILTER_CTL_2: 0x00000000 (II) intel(0): TV_FILTER_CTL_3: 0x00000000 (II) intel(0): TV_CC_CONTROL: 0x00000000 (II) intel(0): TV_CC_DATA: 0x00000000 (II) intel(0): TV_H_LUMA_0: 0x00000000 (II) intel(0): TV_H_LUMA_59: 0x00000000 (II) intel(0): TV_H_CHROMA_0: 0x00000000 (II) intel(0): TV_H_CHROMA_59: 0x00000000 (II) intel(0): SR00: 0x03 (II) intel(0): SR01: 0x00 (II) intel(0): SR02: 0x03 (II) intel(0): SR03: 0x04 (II) intel(0): SR04: 0x02 (II) intel(0): SR05: 0x00 (II) intel(0): SR06: 0x00 (II) intel(0): SR07: 0x00 (II) intel(0): MSR: 0x67 (II) intel(0): CR00: 0x5f (II) intel(0): CR01: 0x4f (II) intel(0): CR02: 0x50 (II) intel(0): CR03: 0x82 (II) intel(0): CR04: 0x55 (II) intel(0): CR05: 0x81 (II) intel(0): CR06: 0xbf (II) intel(0): CR07: 0x1f (II) intel(0): CR08: 0x00 (II) intel(0): CR09: 0x4d (II) intel(0): CR0a: 0x1f (II) intel(0): CR0b: 0x1e (II) intel(0): CR0c: 0x00 (II) intel(0): CR0d: 0x00 (II) intel(0): CR0e: 0x00 (II) intel(0): CR0f: 0x00 (II) intel(0): CR10: 0x9c (II) intel(0): CR11: 0x8e (II) intel(0): CR12: 0x87 (II) intel(0): CR13: 0x28 (II) intel(0): CR14: 0x1f (II) intel(0): CR15: 0x96 (II) intel(0): CR16: 0xb9 (II) intel(0): CR17: 0xa3 (II) intel(0): CR18: 0xff (II) intel(0): CR19: 0x00 (II) intel(0): CR1a: 0x00 (II) intel(0): CR1b: 0x00 (II) intel(0): CR1c: 0x00 (II) intel(0): CR1d: 0x00 (II) intel(0): CR1e: 0x00 (II) intel(0): CR1f: 0x00 (II) intel(0): CR20: 0x00 (II) intel(0): CR21: 0x00 (II) intel(0): CR22: 0x20 (II) intel(0): CR23: 0x00 (II) intel(0): CR24: 0x00 (II) intel(0): pipe A dot 40000 n 1 m1 16 m2 8 p1 8 p2 10 (II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10 (II) intel(0): DumpRegsEnd (II) intel(0): xf86UnbindGARTMemory: unbind key 0 (II) intel(0): xf86UnbindGARTMemory: unbind key 1 (II) intel(0): xf86UnbindGARTMemory: unbind key 2 (II) intel(0): xf86UnbindGARTMemory: unbind key 3 (II) intel(0): xf86UnbindGARTMemory: unbind key 4