Attachment 99984 Details for Bug 78795 – quick_dump with LCD Panel on with drm.debug=6

quick_dump with LCD Panel on with drm.debug=6

on with drm.debug=6.txt (text/plain), 21.87 KB, created by Dominik Rozek on 2014-05-27 20:46:56 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: Dominik Rozek

Created: 2014-05-27 20:46:56 UTC

Size: 21.87 KB

patch

obsolete

>  offset   |       vlv_display.txt        |   value   
>------------------------------------------------------
>0x00186014 | DPLLA_CTRL                   | 0xf000a00f
>0x00186018 | DPLLB_CTRL                   | 0x00006000
>0x0018601c | DPLLAMD_CRTL                 | 0x00000000
>0x00186020 | DPLLBMD_CRTL                 | 0x00000003
>0x00186024 | RAWCLK_FREQ                  | 0x0000007d
>0x00186104 | D_STAT                       | 0x20d00400
>0x00186200 | DISPCLK_GATE_D               | 0x10000000
>0x00186204 | DPPSR_CGDIS                  | 0x00000a00
>0x00186210 | RAMCLK_GATE_D                | 0x00000000
>0x001c1000 | CPU_VGACNTRL                 | 0xffffffff
>0x001e0000 | HTOTAL_A                     | 0x07050555
>0x001e0004 | HBLANK_A                     | 0x07050555
>0x001e0008 | HSYNC_A                      | 0x06050595
>0x001e000c | VTOTAL_A                     | 0x031a02ff
>0x001e0010 | VBLANK_A                     | 0x031a02ff
>0x001e0014 | VSYNC_A                      | 0x03080302
>0x001e001c | PIPEASRC                     | 0x055502ff
>0x001e0028 | VSYNCSHIFT_A                 | 0x00000000
>0x001e0030 | PIPEA_DATA_M1                | 0x7e3d0197
>0x001e0034 | PIPEA_DATA_N1                | 0x00400000
>0x001e0038 | PIPEA_DATA_M2                | 0x00000000
>0x001e003c | PIPEA_DATA_N2                | 0x00000000
>0x001e0040 | PIPEA_LINK_M1                | 0x00028abb
>0x001e0044 | PIPEA_LINK_N1                | 0x00080000
>0x001e0048 | PIPEA_LINK_M2                | 0x00000000
>0x001e004c | PIPEA_LINK_N2                | 0x00000000
>0x001e1000 | HTOTAL_B                     | 0x00000000
>0x001e1004 | HBLANK_B                     | 0x00000000
>0x001e1008 | HSYNC_B                      | 0x00000000
>0x001e100c | VTOTAL_B                     | 0x00000000
>0x001e1010 | VBLANK_B                     | 0x00000000
>0x001e1014 | VSYNC_B                      | 0x00000000
>0x001e101c | PIPEBSRC                     | 0x00000000
>0x001e1028 | VSYNCSHIFT_B                 | 0x00000000
>0x001e1030 | PIPEB_DATA_M1                | 0x7e000000
>0x001e1034 | PIPEB_DATA_N1                | 0x00000000
>0x001e1038 | PIPEB_DATA_M2                | 0x00000000
>0x001e103c | PIPEB_DATA_N2                | 0x00000000
>0x001e1040 | PIPEB_LINK_M1                | 0x00000000
>0x001e1044 | PIPEB_LINK_N1                | 0x00000000
>0x001e1048 | PIPEB_LINK_M2                | 0x00000000
>0x001e104c | PIPEB_LINK_N2                | 0x00000000
>0x001e1100 | ADPA                         | 0x00040000
>0x001e1110 | PORT_HOTPLUG_EN              | 0x30000000
>0x001e1114 | PORT_HOTPLUG_STAT            | 0x10000000
>0x001e1140 | SDVO_HDMIB                   | 0x0000001c
>0x001e1154 | SDVO_DP2                     | 0x00000000
>0x001e1160 | HDMIC                        | 0x0000001c
>0x001e1164 | PORT_HOTPLUG_CTRL            | 0x00000000
>0x001e4100 | DP_B                         | 0x0000001c
>0x001e4200 | DP_C                         | 0xb004001c
>0x001f002c | DPINVGTT                     | 0x00000000
>0x001f0030 | DSPARB                       | 0x80008000
>0x001f0034 | FW1                          | 0x21820272
>0x001f0038 | FW2                          | 0x0b0f060f
>0x001f003c | FW3                          | 0x0a000000
>0x001f0070 | FW4                          | 0x00040404
>0x001f0074 | FW5                          | 0x04040404
>0x001f0078 | FW6                          | 0x00000078
>0x001f007c | FW7                          | 0x040f040f
>0x001f0050 | DDL1                         | 0x98000098
>0x001f0052 | DDL2                         | 0x00009800
>0x001f0060 | DSPARB2                      | 0x00001111
>0x001f0064 | DSPHOWM                      | 0x00000000
>0x001f0068 | DSPHOWM1                     | 0x00000000
>0x001f0008 | PIPEACONF                    | 0xc0000000
>0x001f0024 | PIPEASTAT                    | 0x1c000207
>0x001f0180 | DSPACNTR                     | 0xd8000400
>0x001f0184 | DSPABASE                     | 0x00000000
>0x001f0188 | DSPASTRIDE                   | 0x00001601
>0x001f019c | DSPASURF                     | 0x03793008
>0x001f01a4 | DSPATILEOFF                  | 0x00000000
>0x001f1008 | PIPEBCONF                    | 0x00000000
>0x001f1024 | PIPEBSTAT                    | 0x14000000
>0x001f1180 | DSPBCNTR                     | 0x00000000
>0x001f1184 | DSPBBASE                     | 0x00000000
>0x001f1188 | DSPBSTRIDE                   | 0x00000000
>0x001f119c | DSPBSURF                     | 0x00000000
>0x001f11a4 | DSPBTILEOFF                  | 0x00000000
>0x001f2008 | PIPECCONF                    | 0x00000000
>0x001f2180 | DSPCCNTR                     | 0x00000000
>0x001f2184 | DSPCBASE                     | 0x00000000
>0x001f2188 | DSPCSTRIDE                   | 0x00000000
>0x001f219c | DSPCSURF                     | 0x00000000
>0x001f21a4 | DSPCTILEOFF                  | 0x00000000
>0x001e1200 | PIPEA_PP_STATUS              | 0x00000000
>0x001e1204 | PIPEA_PP_CONTROL             | 0x00000000
>0x001e1208 | PIPEA_PP_ON_DELAYS           | 0x00000000
>0x001e120c | PIPEA_PP_OFF_DELAYS          | 0x00000000
>0x001e1210 | PIPEA_PP_DIVISOR             | 0x00270f04
>0x001e1300 | PIPEB_PP_STATUS              | 0x00000000
>0x001e1304 | PIPEB_PP_CONTROL             | 0x00000000
>0x001e1308 | PIPEB_PP_ON_DELAYS           | 0x00000000
>0x001e130c | PIPEB_PP_OFF_DELAYS          | 0x00000000
>0x001e1310 | PIPEB_PP_DIVISOR             | 0x00270f04
>0x001e1250 | BLC_PWM_CTL2                 | 0x00000000
>0x001e1254 | BLC_PWM_CTL                  | 0x00000000
>
>  offset   |         vlv_dsi.txt          |   value   
>------------------------------------------------------
>0x001e1190 | MIPIA_PORT_CTRL              | 0x00000000
>0x001e1194 | MIPIA_TEARING_CTRL           | 0x00000000
>0x001e11a0 | MIPIA_AUTOPWG                | 0x00000000
>0x0018b000 | MIPIA_DEVICE_READY           | 0x00000000
>0x0018b004 | MIPIA_INTR_STAT              | 0x00000000
>0x0018b008 | MIPIA_INTR_EN                | 0x00000000
>0x0018b00c | MIPIA_DSI_FUNC_PRG           | 0x00000001
>0x0018b010 | MIPIA_HS_TX_TIMEOUT          | 0x00000000
>0x0018b014 | MIPIA_LP_RX_TIMEOUT          | 0x00000000
>0x0018b018 | MIPIA_TURN_AROUND_TIMEOUT    | 0x00000000
>0x0018b01c | MIPIA_DEVICE_RESET_TIMER     | 0x00000000
>0x0018b020 | MIPIA_DPI_RESOLUTION         | 0x00000000
>0x0018b024 | MIPIA_DBI_FIFO_THROTTLE      | 0x00000000
>0x0018b028 | MIPIA_HSYNC_PADDING_COUNT    | 0x00000000
>0x0018b02c | MIPIA_HBP_COUNT              | 0x00000000
>0x0018b030 | MIPIA_HFP_COUNT              | 0x00000000
>0x0018b034 | MIPIA_HACTIVE_AREA_COUNT     | 0x00000000
>0x0018b038 | MIPIA_VSYNC_PADDING_COUNT    | 0x00000000
>0x0018b03c | MIPIA_VBP_COUNT              | 0x00000000
>0x0018b040 | MIPIA_VFP_COUNT              | 0x00000000
>0x0018b044 | MIPIA_HIGH_LOW_SWITCH_COUNT  | 0x00000000
>0x0018b048 | MIPIA_DPI_CONTROL            | 0x00000000
>0x0018b04c | MIPIA_DPI_DATA               | 0x00000000
>0x0018b050 | MIPIA_INIT_COUNT             | 0x00000000
>0x0018b054 | MIPIA_MAX_RETURN_PKT_SIZE    | 0x00000000
>0x0018b058 | MIPIA_VIDEO_MODE_FORMAT      | 0x00000000
>0x0018b05c | MIPIA_EOT_DISABLE            | 0x00000000
>0x0018b060 | MIPIA_LP_BYTECLK             | 0x00000000
>0x0018b064 | MIPIA_LP_GEN_DATA            | 0x00000000
>0x0018b068 | MIPIA_HS_GEN_DATA            | 0x00000000
>0x0018b06c | MIPIA_LP_GEN_CTRL            | 0x00000000
>0x0018b070 | MIPIA_HS_GEN_CTRL            | 0x00000000
>0x0018b074 | MIPIA_GEN_FIFO_STAT          | 0x0e060606
>0x0018b078 | MIPIA_HS_LS_DBI_ENABLE       | 0x00000000
>0x0018b080 | MIPIA_DPHY_PARAM             | 0x0b061a04
>0x0018b084 | MIPIA_DBI_BW_CTRL            | 0x00000000
>0x0018b088 | MIPIA_CLK_LANE_SWITCH_TIME_CNT | 0x00000000
>0x0018b08c | MIPIA_STOP_STATE_STALL       | 0x00000000
>0x0018b090 | MIPIA_INTR_STAT_REG_1        | 0x00000000
>0x0018b094 | MIPIA_INTR_EN_REG_1          | 0x00000000
>0x0018b100 | MIPIA_DBI_TYPEC_CTRL         | 0x00000200
>0x0018b104 | MIPIA_CTRL                   | 0x00000000
>0x0018b108 | MIPIA_DATA_ADDRESS           | 0x00000000
>0x0018b10c | MIPIA_DATA_LENGTH            | 0x00000000
>0x0018b110 | MIPIA_COMMAND_ADDRESS        | 0x00000000
>0x0018b114 | MIPIA_COMMAND_LENGTH         | 0x00000000
>0x0018b118 | MIPIA_READ_DATA_RETURN0      | 0x00000000
>0x0018b11c | MIPIA_READ_DATA_RETURN1      | 0x00000000
>0x0018b120 | MIPIA_READ_DATA_RETURN2      | 0x00000000
>0x0018b124 | MIPIA_READ_DATA_RETURN3      | 0x00000000
>0x0018b128 | MIPIA_READ_DATA_RETURN4      | 0x00000000
>0x0018b12c | MIPIA_READ_DATA_RETURN5      | 0x00000000
>0x0018b130 | MIPIA_READ_DATA_RETURN6      | 0x00000000
>0x0018b134 | MIPIA_READ_DATA_RETURN7      | 0x00000000
>0x0018b138 | MIPIA_READ_DATA_VALID        | 0x00000000
>0x001e1700 | MIPIB_PORT_CTRL              | 0x00000000
>0x001e1704 | MIPIB_TEARING_CTRL           | 0x00000000
>0x0018b800 | MIPIB_DEVICE_READY           | 0x00000000
>0x0018b804 | MIPIB_INTR_STAT              | 0x00000000
>0x0018b808 | MIPIB_INTR_EN                | 0x00000000
>0x0018b80c | MIPIB_DSI_FUNC_PRG           | 0x00000001
>0x0018b810 | MIPIB_HS_TX_TIMEOUT          | 0x00000000
>0x0018b814 | MIPIB_LP_RX_TIMEOUT          | 0x00000000
>0x0018b818 | MIPIB_TURN_AROUND_TIMEOUT    | 0x00000000
>0x0018b81c | MIPIB_DEVICE_RESET_TIMER     | 0x00000000
>0x0018b820 | MIPIB_DPI_RESOLUTION         | 0x00000000
>0x0018b824 | MIPIB_DBI_FIFO_THROTTLE      | 0x00000000
>0x0018b828 | MIPIB_HSYNC_PADDING_COUNT    | 0x00000000
>0x0018b82c | MIPIB_HBP_COUNT              | 0x00000000
>0x0018b830 | MIPIB_HFP_COUNT              | 0x00000000
>0x0018b834 | MIPIB_HACTIVE_AREA_COUNT     | 0x00000000
>0x0018b838 | MIPIB_VSYNC_PADDING_COUNT    | 0x00000000
>0x0018b83c | MIPIB_VBP_COUNT              | 0x00000000
>0x0018b840 | MIPIB_VFP_COUNT              | 0x00000000
>0x0018b844 | MIPIB_HIGH_LOW_SWITCH_COUNT  | 0x00000000
>0x0018b848 | MIPIB_DPI_CONTROL            | 0x00000000
>0x0018b84c | MIPIB_DPI_DATA               | 0x00000000
>0x0018b850 | MIPIB_INIT_COUNT             | 0x00000000
>0x0018b854 | MIPIB_MAX_RETURN_PKT_SIZE    | 0x00000000
>0x0018b858 | MIPIB_VIDEO_MODE_FORMAT      | 0x00000000
>0x0018b85c | MIPIB_EOT_DISABLE            | 0x00000000
>0x0018b860 | MIPIB_LP_BYTECLK             | 0x00000000
>0x0018b864 | MIPIB_LP_GEN_DATA            | 0x00000000
>0x0018b868 | MIPIB_HS_GEN_DATA            | 0x00000000
>0x0018b86c | MIPIB_LP_GEN_CTRL            | 0x00000000
>0x0018b870 | MIPIB_HS_GEN_CTRL            | 0x00000000
>0x0018b874 | MIPIB_GEN_FIFO_STAT          | 0x0e060606
>0x0018b878 | MIPIB_HS_LS_DBI_ENABLE       | 0x00000000
>0x0018b880 | MIPIB_DPHY_PARAM             | 0x0b061a04
>0x0018b884 | MIPIB_DBI_BW_CTRL            | 0x00000000
>0x0018b888 | MIPIB_CLK_LANE_SWITCH_TIME_CNT | 0x00000000
>0x0018b88c | MIPIB_STOP_STATE_STALL       | 0x00000000
>0x0018b890 | MIPIB_INTR_STAT_REG_1        | 0x00000000
>0x0018b894 | MIPIB_INTR_EN_REG_1          | 0x00000000
>0x0018b904 | MIPIB_CTRL                   | 0x00000000
>0x0018b908 | MIPIB_DATA_ADDRESS           | 0x00000000
>0x0018b90c | MIPIB_DATA_LENGTH            | 0x00000000
>0x0018b910 | MIPIB_COMMAND_ADDRESS        | 0x00000000
>0x0018b914 | MIPIB_COMMAND_LENGTH         | 0x00000000
>0x0018b918 | MIPIB_READ_DATA_RETURN0      | 0x00000000
>0x0018b91c | MIPIB_READ_DATA_RETURN1      | 0x00000000
>0x0018b920 | MIPIB_READ_DATA_RETURN2      | 0x00000000
>0x0018b924 | MIPIB_READ_DATA_RETURN3      | 0x00000000
>0x0018b928 | MIPIB_READ_DATA_RETURN4      | 0x00000000
>0x0018b92c | MIPIB_READ_DATA_RETURN5      | 0x00000000
>0x0018b930 | MIPIB_READ_DATA_RETURN6      | 0x00000000
>0x0018b934 | MIPIB_READ_DATA_RETURN7      | 0x00000000
>0x0018b938 | MIPIB_READ_DATA_VALID        | 0x00000000
>
>  offset   |      base_interrupt.txt      |   value   
>------------------------------------------------------
>0x0000a168 | GEN6_PMINTRMSK               | 0x0000005a
>0x00044000 | DEISR                        | 0x00000000
>0x00044004 | DEIMR                        | 0x00000000
>0x00044008 | DEIIR                        | 0x00000000
>0x0004400c | DEIER                        | 0x80000000
>0x00044010 | GTISR                        | 0x00000000
>0x00044014 | GTIMR                        | 0xffffffff
>0x00044018 | GTIIR                        | 0x00000000
>0x0004401c | GTIER                        | 0x00401001
>0x00044020 | GEN6_PMISR                   | 0x00000000
>0x00044024 | GEN6_PMIMR                   | 0xffffff8f
>0x00044028 | GEN6_PMIIR                   | 0x00000000
>0x0004402c | GEN6_PMIER                   | 0x00000070
>0x000c4000 | SDEISR                       | 0x00000000
>0x000c4004 | SDEIMR                       | 0x00000000
>0x000c4008 | SDEIIR                       | 0x00000000
>0x000c400c | SDEIER                       | 0x00000000
>0x000020a8 | RENDER_IMR                   | 0xffffffff
>0x000120a8 | BSD_IMR                      | 0xffe00fff
>0x000220a8 | BLT_IMR                      | 0xffffffff
>
>  offset   |        base_other.txt        |   value   
>------------------------------------------------------
>0x00002020 | PGETBL_CTL                   | 0x00000000
>0x0000209c | MI_MODE                      | 0x00004200
>0x00002180 | CCID                         | 0x00e8010d
>0x000040a0 | ERROR_GEN6                   | 0x00000000
>0x00002098 | RENDER_HWSTAM                | 0xffffffff
>0x00012098 | GEN6_BSD_HWSTAM              | 0xffffffff
>0x00022098 | GEN6_BLITTER_HWSTAM          | 0xffffffff
>
>  offset   |        base_power.txt        |   value   
>------------------------------------------------------
>0x0000a008 | GEN6_RPNSWREQ                | 0x00000000
>0x0000a00c | GEN6_RC_VIDEO_FREQ           | 0x00000000
>0x0000a010 | GEN6_RP_DOWN_TIMEOUT         | 0x000f4240
>0x0000a014 | GEN6_RP_INTERRUPT_LIMITS     | 0x00000000
>0x0000a024 | GEN6_RP_CONTROL              | 0x00000d91
>0x0000a02c | GEN6_RP_UP_THRESHOLD         | 0x0000e808
>0x0000a068 | GEN6_RP_UP_EI                | 0x000101d0
>0x0000a06c | GEN6_RP_DOWN_EI              | 0x00055730
>0x0000a070 | GEN6_RP_IDLE_HYSTERSIS       | 0x0000000a
>0x0000a090 | GEN6_RC_CONTROL              | 0x11000000
>0x0000a094 | GEN6_RC_STATE                | 0x00000000
>0x0000a098 | GEN6_RC1_WAKE_RATE_LIMIT     | 0x00000000
>0x0000a09c | GEN6_RC6_WAKE_RATE_LIMIT     | 0x00280000
>0x0000a0a8 | GEN6_RC_EVALUATION_INTERVAL  | 0x0001e848
>0x0000a0ac | GEN6_RC_IDLE_HYSTERSIS       | 0x00000019
>0x0000a0b0 | GEN6_RC_SLEEP                | 0x00000000
>0x0000a0b4 | GEN6_RC1e_THRESHOLD          | 0x00000000
>0x0000a0b8 | GEN6_RC6_THRESHOLD           | 0x00000557
>0x00138108 | RC6_RESIDENCY_TIME           | 0xaf915279
>0x0013810c | RC6p_RESIDENCY_TIME          | 0xb2566b9a
>0x00138110 | RC6pp_RESIDENCY_TIME         | 0x00000000
>
>  offset   |        base_rings.txt        |   value   
>------------------------------------------------------
>0x000020c0 | RENDER_INSTPM                | 0x00008080
>0x000120c0 | BSD_INSTPM                   | 0x00000000
>0x000220c0 | BLT_INSTPM                   | 0x00000000
>0x00002030 | RENDER_RING_TAIL             | 0x00005b90
>0x00012030 | BSD_RING_TAIL                | 0x00000000
>0x00022030 | BLT_RING_TAIL                | 0x00002810
>0x00002034 | RENDER_RING_HEAD             | 0x01005b90
>0x00012034 | BSD_RING_HEAD                | 0x00000000
>0x00022034 | BLT_RING_HEAD                | 0x00602810
>0x00002038 | RENDER_RING_START            | 0x001da000
>0x00012038 | BSD_RING_START               | 0x001fe000
>0x00022038 | BLT_RING_START               | 0x00221000
>0x0000203c | RENDER_RING_CTL              | 0x0001f001
>0x0001203c | BSD_RING_CTL                 | 0x0001f001
>0x0002203c | BLT_RING_CTL                 | 0x0001f001
>0x00002064 | RENDER_IPEIR                 | 0x00000000
>0x00012064 | BSD_IPEIR                    | 0x00000000
>0x00022064 | BLT_IPEIR                    | 0x00000000
>0x00002068 | RENDER_IPEHR                 | 0x680b0000
>0x00012068 | BSD_IPEHR                    | 0x00000000
>0x00022068 | BLT_IPEHR                    | 0x00000000
>0x0000206c | RENDER_INSTDONE              | 0xfffffffe
>0x0001206c | BSD_INSTDONE                 | 0xfffffffe
>0x0002206c | BLT_INSTDONE                 | 0xfffffffe
>0x00002070 | RENDER_INSTPS                | 0x00000000
>0x00012070 | BSD_INSTPS                   | 0x00000000
>0x00022070 | BLT_INSTPS                   | 0x00000000
>0x00002074 | RENDER_RING_ACTHD            | 0x01005b90
>0x00012074 | BSD_RING_ACTHD               | 0x00000000
>0x00022074 | BLT_RING_ACTHD               | 0x00602810
>0x00002078 | RENDER_FADDR                 | 0x001dfb90
>0x00012078 | BSD_FADDR                    | 0x001fe000
>0x00022078 | BLT_FADDR                    | 0x00223810
>
>  offset   |        gen7_other.txt        |   value   
>------------------------------------------------------
>0x0000229c | RCS_MODE_GEN7                | 0x00002800
>0x0001229c | VCS_MODE_GEN7                | 0x00000000
>0x0002229c | BCS_MODE_GEN7                | 0x00000000
>
>  offset   |         vlv_dpio.txt         |   value   
>------------------------------------------------------
>0x00182110 | DPIO_CTL                     | 0x00000001
>0x00000690 | DPIO_TX3_DW4_CH0             | 0x00000000
>0x00002a90 | DPIO_TX3_DW4_CH1             | 0x00000000
>0x0000800c | DPIO_PLL_DW3_CH0             | 0x00000000
>0x0000802c | DPIO_PLL_DW3_CH1             | 0x00000000
>0x00008014 | DPIO_PLL_DW5_CH0             | 0x00000000
>0x00008034 | DPIO_PLL_DW5_CH1             | 0x00000000
>0x0000801c | DPIO_PLL_DW7_CH0             | 0x00000000
>0x0000803c | DPIO_PLL_DW7_CH1             | 0x00000000
>0x00008040 | DPIO_PLL_DW8_CH0             | 0x00000000
>0x00008060 | DPIO_PLL_DW8_CH1             | 0x00000000
>0x0000c044 | DPIO_PLL_DW9_BCAST           | 0x00000000
>0x00008044 | DPIO_PLL_DW9_CH0             | 0x00000000
>0x00008064 | DPIO_PLL_DW9_CH1             | 0x00000000
>0x00008048 | DPIO_PLL_DW10_CH0            | 0x00000000
>0x00008068 | DPIO_PLL_DW10_CH1            | 0x00000000
>0x0000804c | DPIO_PLL_DW11_CH0            | 0x00000000
>0x0000806c | DPIO_PLL_DW11_CH1            | 0x00000000
>0x000080ac | DPIO_REF_DW13                | 0x00000000
>0x00008100 | DPIO_CMN_DW0                 | 0x00000000
>0x0000810c | DPIO_CMN_DW4                 | 0x00000000
>0x00008200 | DPIO_PCS_DW0_CH0             | 0x00000004
>0x00008400 | DPIO_PCS_DW0_CH1             | 0x00000000
>0x00008204 | DPIO_PCS_DW1_CH0             | 0x00000000
>0x00008404 | DPIO_PCS_DW1_CH1             | 0x00000000
>0x00000220 | DPIO_PCS01_DW8_CH0           | 0x00000000
>0x00000420 | DPIO_PCS23_DW8_CH0           | 0x00000000
>0x00002620 | DPIO_PCS01_DW8_CH1           | 0x00000000
>0x00002820 | DPIO_PCS23_DW8_CH1           | 0x00000000
>0x00008220 | DPIO_PCS_DW8_CH0             | 0x00000000
>0x00008420 | DPIO_PCS_DW8_CH1             | 0x00000000
>0x00008224 | DPIO_PCS_DW9_CH0             | 0x00000000
>0x00008424 | DPIO_PCS_DW9_CH1             | 0x00000000
>0x0000822c | DPIO_PCS_DW11_CH0            | 0x00000000
>0x0000842c | DPIO_PCS_DW11_CH1            | 0x00000000
>0x00008230 | DPIO_PCS_DW12_CH0            | 0x00000000
>0x00008430 | DPIO_PCS_DW12_CH1            | 0x00000000
>0x00008238 | DPIO_PCS_DW14_CH0            | 0x00000000
>0x00008438 | DPIO_PCS_DW14_CH1            | 0x00000000
>0x0000825c | DPIO_PCS_DW23_CH0            | 0x00000000
>0x0000845c | DPIO_PCS_DW23_CH1            | 0x00000000
>0x00008288 | DPIO_TX_DW2_CH0              | 0x00000000
>0x00008488 | DPIO_TX_DW2_CH1              | 0x00000000
>0x0000828c | DPIO_TX_DW3_CH0              | 0x00000000
>0x0000848c | DPIO_TX_DW3_CH1              | 0x00000000
>0x00008290 | DPIO_TX_DW4_CH0              | 0x00000000
>0x00008490 | DPIO_TX_DW4_CH1              | 0x00000000
>0x00008294 | DPIO_TX_DW5_CH0              | 0x00000000
>0x00008494 | DPIO_TX_DW5_CH1              | 0x00000000
>0x000082ac | DPIO_TX_DW11_CH0             | 0x00000000
>0x000084ac | DPIO_TX_DW11_CH1             | 0x00000000
>0x000082b8 | DPIO_TX_DW14_CH0             | 0x00000000
>0x000084b8 | DPIO_TX_DW14_CH1             | 0x00000000
>0x00002600 | lane1 ctl ddi1               | 0x00000000
>0x00002604 | lane1 ctl ddi1               | 0x00000000
>0x00002800 | lane2 ctl ddi1               | 0x00000000
>0x00002804 | lane3 ctl ddi1               | 0x00000000
>0x00000200 | lane1 ctl ddi0               | 0x00000000
>0x00000204 | lane1 ctl ddi0               | 0x00000000
>0x00000400 | lane2 ctl ddi0               | 0x00000000
>0x00000404 | lane3 ctl ddi0               | 0x00000000
>
>  offset   |       vlv_flisdsi.txt        |   value   
>------------------------------------------------------
>0x00000000 | MIPI4DPHY_RCOMP_IOSFSB_REG0  | 0x00161616
>0x00000001 | MIPI4DPHY_RCOMP_IOSFSB_REG1  | 0x39ce0e0e
>0x00000002 | MIPI4DPHY_RCOMP_IOSFSB_REG2  | 0x39ce0e0e
>0x00000003 | MIPI4DPHY_RCOMP_IOSFSB_REG3  | 0x00000000
>0x00000004 | MIPI4DPHY_RCOMP_IOSFSB_REG4  | 0x00000080
>0x00000005 | MIPI4DPHY_RCOMP_IOSFSB_REG5  | 0x00000000
>0x00000006 | MIPI4DPHY_RCOMP_IOSFSB_REG6  | 0x00000001
>0x00000007 | MIPI4DPHY_RCOMP_IOSFSB_REG7  | 0x00000001
>0x00000008 | DSI_CFG                      | 0x00000000
>0x00000009 | DSI_DLLCOUNTCD_STATUS        | 0x00000004
>0x0000000a | DSI_RXCDCNTRL                | 0x00000000
>0x0000000b | DSI_HSRCOMP_STAT             | 0x00000b16
>0x0000000c | DSI_LPRCOMP_STAT             | 0x000739ce
>0x0000000d | DSI_LPRCOMP2                 | 0x00000108
>0x0000000e | DSI_LPRCOMP1                 | 0x10842108
>0x0000000f | DSI_BGCTL                    | 0x00000000
>0x00000010 | DSI_RCCCFG                   | 0x00000000
>0x00000011 | DSI_MISRDOUTLP               | 0xffffffff
>0x00000012 | DSI_RCCRCOMP                 | 0x00001428
>0x00000013 | DSI_BSCOMPARE                | 0x00000000
>0x00000014 | DSI_RCOMPCTL1                | 0x00000000
>0x00000015 | DSI_TXCNTRL                  | 0x00000000
>0x00000016 | DSI_MISRDOUT1                | 0xcdff777c
>0x00000017 | DSI_DLLCTL2                  | 0x00000000
>0x00000018 | DSI_DLLCTL1                  | 0x00000008
>0x00000019 | DSI_ACIOCFG2                 | 0x00000000
>0x0000001a | DSI_ACIOCFG1                 | 0x00000000
>0x0000001b | DSI_ACIOSS                   | 0x00000000
>0x0000001c | DSI_ACIOERR1                 | 0x1005009e
>0x0000001d | DSI_ACIOERR2                 | 0x10080011
>0x0000001e | DSI_MISRDOUT2                | 0x37f37fff
>0x0000001f | DSI_RCOMPCTL2                | 0x00000000
>0x00000020 | DSI_ALL01                    | 0x00000000
>0x00000021 | DSI_DLLCTL3                  | 0x00000000
>0x00000022 | DSI_DATAEYE1                 | 0x006fd3ff
>0x00000023 | DSI_DATAEYE2                 | 0xafefeefb
>0x00000024 | DSI_DATAEYE3                 | 0xfffdeff3
>0x00000025 | DSI_DATAEYE4                 | 0xfdebdfdf
>0x00000026 | DSI_DATAEYE5                 | 0xffffffff
>

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Attachments on bug 78795: 99335 | 99359 | 99360 | 99407 | 99409 | 99439 | 99440 | 99444 | 99445 | 99446 | 99984 | 99985 | 99986 | 100043 | 100401

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